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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-08-28 02:50:19 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-09-05 13:12:37 +0100 |
| commit | 4ab25d1aa6c17f29cac029d91cd5b920e0c2929d (patch) | |
| tree | 7e0f0809813a931ef2a7c399d390a14f838ff55e | |
| parent | 76dd36660b2553616b099ca6cd914f01a7997b2c (diff) | |
| download | qemu-4ab25d1aa6c17f29cac029d91cd5b920e0c2929d.zip qemu-4ab25d1aa6c17f29cac029d91cd5b920e0c2929d.tar.gz qemu-4ab25d1aa6c17f29cac029d91cd5b920e0c2929d.tar.bz2 | |
hw/arm/xilinx_zynq: Enable Security Extensions
The system supports the Security Extensions (core and GIC). This change is
necessary to run tests which pass on the real hardware.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-id: 20240828005019.57705-1-sebastian.huber@embedded-brains.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/arm/xilinx_zynq.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 3c56b9a..37c234f 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -219,14 +219,6 @@ static void zynq_init(MachineState *machine) for (n = 0; n < smp_cpus; n++) { Object *cpuobj = object_new(machine->cpu_type); - /* - * By default A9 CPUs have EL3 enabled. This board does not currently - * support EL3 so the CPU EL3 property is disabled before realization. - */ - if (object_property_find(cpuobj, "has_el3")) { - object_property_set_bool(cpuobj, "has_el3", false, &error_fatal); - } - object_property_set_int(cpuobj, "midr", ZYNQ_BOARD_MIDR, &error_fatal); object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE, |