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authorAlireza Sanaee <alireza.sanaee@huawei.com>2025-01-10 22:51:15 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2025-02-25 16:18:12 +0100
commit47fc56f36d333263a5865caad306336e3e61e348 (patch)
treefb3f70f3c957b8ef4194f5fdf393c1a7cd96b47a
parent90df2cac3700188acadd12948fdad8e9b1459646 (diff)
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i386/cpu: add has_caches flag to check smp_cache configuration
Add has_caches flag to SMPCompatProps, which helps in avoiding extra checks for every single layer of caches in x86 (and ARM in future). Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Link: https://lore.kernel.org/r/20250110145115.1574345-6-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--hw/core/machine-smp.c2
-rw-r--r--include/hw/boards.h3
-rw-r--r--target/i386/cpu.c11
3 files changed, 10 insertions, 6 deletions
diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
index 4e020c3..0be0ac0 100644
--- a/hw/core/machine-smp.c
+++ b/hw/core/machine-smp.c
@@ -332,6 +332,8 @@ bool machine_parse_smp_cache(MachineState *ms,
return false;
}
}
+
+ mc->smp_props.has_caches = true;
return true;
}
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 9360d1c..f22b2e7 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -156,6 +156,8 @@ typedef struct {
* @modules_supported - whether modules are supported by the machine
* @cache_supported - whether cache (l1d, l1i, l2 and l3) configuration are
* supported by the machine
+ * @has_caches - whether cache properties are explicitly specified in the
+ * user provided smp-cache configuration
*/
typedef struct {
bool prefer_sockets;
@@ -166,6 +168,7 @@ typedef struct {
bool drawers_supported;
bool modules_supported;
bool cache_supported[CACHE_LEVEL_AND_TYPE__MAX];
+ bool has_caches;
} SMPCompatProps;
/**
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 005ca42..2f9c604 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8203,13 +8203,12 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
#ifndef CONFIG_USER_ONLY
MachineState *ms = MACHINE(qdev_get_machine());
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
- /*
- * TODO: Add a SMPCompatProps.has_caches flag to avoid useless updates
- * if user didn't set smp_cache.
- */
- if (!x86_cpu_update_smp_cache_topo(ms, cpu, errp)) {
- return;
+ if (mc->smp_props.has_caches) {
+ if (!x86_cpu_update_smp_cache_topo(ms, cpu, errp)) {
+ return;
+ }
}
qemu_register_reset(x86_cpu_machine_reset_cb, cpu);