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authorPeter Maydell <peter.maydell@linaro.org>2024-12-11 15:31:07 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-12-11 15:31:07 +0000
commit45fb2cd61eee6d7f500eb96dba73023cf0057b40 (patch)
treedc81bf88a7b7606859847151cd21ef541f405d7d
parent5ab49c3a0991447d2f5b32e2b453ed111e4c968f (diff)
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target/sparc: Set default NaN pattern explicitly
Set the default NaN pattern explicitly for SPARC, and remove the ifdef from parts64_default_nan. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-50-peter.maydell@linaro.org
-rw-r--r--fpu/softfloat-specialize.c.inc5
-rw-r--r--target/sparc/cpu.c2
2 files changed, 3 insertions, 4 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index ecb7a52..0618523 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -136,10 +136,7 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status)
uint8_t dnan_pattern = status->default_nan_pattern;
if (dnan_pattern == 0) {
-#if defined(TARGET_SPARC)
- /* Sign bit clear, all frac bits set */
- dnan_pattern = 0b01111111;
-#elif defined(TARGET_HEXAGON)
+#if defined(TARGET_HEXAGON)
/* Sign bit set, all frac bits set. */
dnan_pattern = 0b11111111;
#else
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 0f2997a..6b66ecb 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -818,6 +818,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
set_float_3nan_prop_rule(float_3nan_prop_s_cba, &env->fp_status);
/* For inf * 0 + NaN, return the input NaN */
set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status);
+ /* Default NaN value: sign bit clear, all frac bits set */
+ set_float_default_nan_pattern(0b01111111, &env->fp_status);
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {