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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-02-02 09:34:14 +1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-02-03 16:46:10 +1000 |
| commit | 45bf0e7aa648369cf8ab2333bd20144806fc1be3 (patch) | |
| tree | 523f44f0e2e467c253c22d04aa6000cd38680448 | |
| parent | da4038d2da6d3a3d5f86665bd51b2ba49df5d652 (diff) | |
| download | qemu-45bf0e7aa648369cf8ab2333bd20144806fc1be3.zip qemu-45bf0e7aa648369cf8ab2333bd20144806fc1be3.tar.gz qemu-45bf0e7aa648369cf8ab2333bd20144806fc1be3.tar.bz2 | |
tcg/loongarch64: Set vector registers call clobbered
Because there are more call clobbered registers than
call saved registers, we begin with all registers as
call clobbered and then reset those that are saved.
This was missed when we introduced the LSX support.
Cc: qemu-stable@nongnu.org
Fixes: 16288ded944 ("tcg/loongarch64: Lower basic tcg vec ops to LSX")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2136
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240201233414.500588-1-richard.henderson@linaro.org>
| -rw-r--r-- | tcg/loongarch64/tcg-target.c.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index bab0a17..dcf0205 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -2327,7 +2327,7 @@ static void tcg_target_init(TCGContext *s) tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS; tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS; - tcg_target_call_clobber_regs = ALL_GENERAL_REGS; + tcg_target_call_clobber_regs = ALL_GENERAL_REGS | ALL_VECTOR_REGS; tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S0); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S1); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S2); |