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author | Richard Henderson <richard.henderson@linaro.org> | 2017-11-05 11:02:40 +0100 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2018-01-30 10:22:26 -0800 |
commit | 43a97b81b5ae791bfdb2470b9be749155a968604 (patch) | |
tree | 7c2c051f2ab9b3b432deb81e92ef9d6881866f63 | |
parent | 2dfcca9ffc0131f0d740dea27ebff04be01f871b (diff) | |
download | qemu-43a97b81b5ae791bfdb2470b9be749155a968604.zip qemu-43a97b81b5ae791bfdb2470b9be749155a968604.tar.gz qemu-43a97b81b5ae791bfdb2470b9be749155a968604.tar.bz2 |
target/hppa: Implement LCI
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | target/hppa/translate.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 082221f..41e28ff 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2462,6 +2462,25 @@ static DisasJumpType trans_lpa(DisasContext *ctx, uint32_t insn, return nullify_end(ctx, DISAS_NEXT); } + +static DisasJumpType trans_lci(DisasContext *ctx, uint32_t insn, + const DisasInsn *di) +{ + unsigned rt = extract32(insn, 0, 5); + TCGv_reg ci; + + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + + /* The Coherence Index is an implementation-defined function of the + physical address. Two addresses with the same CI have a coherent + view of the cache. Our implementation is to return 0 for all, + since the entire address space is coherent. */ + ci = tcg_const_reg(0); + save_gpr(ctx, rt, ci); + tcg_temp_free(ci); + + return DISAS_NEXT; +} #endif /* !CONFIG_USER_ONLY */ static const DisasInsn table_mem_mgmt[] = { @@ -2490,6 +2509,7 @@ static const DisasInsn table_mem_mgmt[] = { { 0x04001200u, 0xfc001fdfu, trans_pxtlbx }, /* pdtlb */ { 0x04001240u, 0xfc001fdfu, trans_pxtlbx }, /* pdtlbe */ { 0x04001340u, 0xfc003fc0u, trans_lpa }, + { 0x04001300u, 0xfc003fe0u, trans_lci }, #endif }; |