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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-12-28 14:44:56 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-01-16 20:57:17 -0800 |
| commit | 41736e7ce1f810594abad540c48f8390228a4d81 (patch) | |
| tree | 9da5b2c4b6dc7b9f3b5b783136d2bbe74e786d6d | |
| parent | d9336b727ffd3430254663c8a37850242f6f07ea (diff) | |
| download | qemu-41736e7ce1f810594abad540c48f8390228a4d81.zip qemu-41736e7ce1f810594abad540c48f8390228a4d81.tar.gz qemu-41736e7ce1f810594abad540c48f8390228a4d81.tar.bz2 | |
tcg/tci: Remove assertions for deposit and extract
We already have these assertions during opcode creation.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | tcg/tci/tcg-target.c.inc | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 88cecbd..8dedddc 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -775,28 +775,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, break; CASE_32_64(deposit) /* Optional (TCG_TARGET_HAS_deposit_*). */ - { - TCGArg pos = args[3], len = args[4]; - TCGArg max = opc == INDEX_op_deposit_i32 ? 32 : 64; - - tcg_debug_assert(pos < max); - tcg_debug_assert(pos + len <= max); - - tcg_out_op_rrrbb(s, opc, args[0], args[1], args[2], pos, len); - } + tcg_out_op_rrrbb(s, opc, args[0], args[1], args[2], args[3], args[4]); break; CASE_32_64(extract) /* Optional (TCG_TARGET_HAS_extract_*). */ CASE_32_64(sextract) /* Optional (TCG_TARGET_HAS_sextract_*). */ - { - TCGArg pos = args[2], len = args[3]; - TCGArg max = type == TCG_TYPE_I32 ? 32 : 64; - - tcg_debug_assert(pos < max); - tcg_debug_assert(pos + len <= max); - - tcg_out_op_rrbb(s, opc, args[0], args[1], pos, len); - } + tcg_out_op_rrbb(s, opc, args[0], args[1], args[2], args[3]); break; CASE_32_64(brcond) |