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author | Richard Henderson <rth@twiddle.net> | 2010-02-20 11:32:23 -0800 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-03-23 22:00:47 +0100 |
commit | 3f90f252ecbbb1a0872b72d57965f0db860e22a3 (patch) | |
tree | ef34d5a351283c45cfa9fa70455f767447107e7f | |
parent | 3436332ed6eeb379d6d545d357362b8bcea40495 (diff) | |
download | qemu-3f90f252ecbbb1a0872b72d57965f0db860e22a3.zip qemu-3f90f252ecbbb1a0872b72d57965f0db860e22a3.tar.gz qemu-3f90f252ecbbb1a0872b72d57965f0db860e22a3.tar.bz2 |
tcg-hppa: Fix 64-bit argument ordering
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r-- | tcg/tcg.c | 12 |
1 files changed, 11 insertions, 1 deletions
@@ -596,7 +596,17 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, real_args++; } #endif -#ifdef TCG_TARGET_WORDS_BIGENDIAN + /* If stack grows up, then we will be placing successive + arguments at lower addresses, which means we need to + reverse the order compared to how we would normally + treat either big or little-endian. For those arguments + that will wind up in registers, this still works for + HPPA (the only current STACK_GROWSUP target) since the + argument registers are *also* allocated in decreasing + order. If another such target is added, this logic may + have to get more complicated to differentiate between + stack arguments and register arguments. */ +#if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) *gen_opparam_ptr++ = args[i] + 1; *gen_opparam_ptr++ = args[i]; #else |