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author | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:31:07 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:31:07 +0000 |
commit | 38ea9ade29e1e3208dc0e82708388c0a1d73ebf2 (patch) | |
tree | 2479ca813e5c79c2c6bfcf0166e1522593d9a6fa | |
parent | b9aa1e5658dacca25b2970bba6f3bf79351ca46c (diff) | |
download | qemu-38ea9ade29e1e3208dc0e82708388c0a1d73ebf2.zip qemu-38ea9ade29e1e3208dc0e82708388c0a1d73ebf2.tar.gz qemu-38ea9ade29e1e3208dc0e82708388c0a1d73ebf2.tar.bz2 |
target/hexagon: Set default NaN pattern explicitly
Set the default NaN pattern explicitly for hexagon.
Remove the ifdef from parts64_default_nan(); the only
remaining unconverted targets all use the default case.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-52-peter.maydell@linaro.org
-rw-r--r-- | fpu/softfloat-specialize.c.inc | 5 | ||||
-rw-r--r-- | target/hexagon/cpu.c | 2 |
2 files changed, 2 insertions, 5 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 0618523..5954a62 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -136,10 +136,6 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status) uint8_t dnan_pattern = status->default_nan_pattern; if (dnan_pattern == 0) { -#if defined(TARGET_HEXAGON) - /* Sign bit set, all frac bits set. */ - dnan_pattern = 0b11111111; -#else /* * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V, * S390, SH4, TriCore, and Xtensa. Our other supported targets @@ -152,7 +148,6 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status) /* sign bit clear, set frac msb */ dnan_pattern = 0b01000000; } -#endif } assert(dnan_pattern != 0); diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 020038f..c9aa940 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -286,6 +286,8 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type) set_default_nan_mode(1, &env->fp_status); set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status); + /* Default NaN value: sign bit set, all frac bits set */ + set_float_default_nan_pattern(0b11111111, &env->fp_status); } static void hexagon_cpu_disas_set_info(CPUState *s, disassemble_info *info) |