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authorPeter Maydell <peter.maydell@linaro.org>2024-01-08 10:28:26 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-01-08 10:28:26 +0000
commit33252ebde15a238a1dbf07104aa0e5d5d487143c (patch)
tree74254c24b0dd5a3b96c4b306f762f14d83c53df8
parent8188c3cda586dc445cac875b7d21c0c960dbe97e (diff)
parent8a780cd212647a6013c8ea59e0929dad996e2c54 (diff)
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Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2024-01-05 # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmWYWJEPHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5Z4PEH/2vA3XIPf96IlrZilBFIOYfb8wkw6AGI7BG8 # R3xps+j4ih/RreQdJzswFzfCDaBZvdEPlHtu3YFsIKqfa/svLdVU6GKqjNiDq6XY # FvoQAUZCSg6NaF8Xgd4AETcw7FedW0nodDzpE/jBj5WQjd1eJoD26uF4cYicVzIt # gtb6tJJ3LtYc0pNIzxk2hPFTUrXTpfA5kdIADmd6Tg1sH87JJpWnmR49/a89Kpst # mU/j2KtmqL94YFH93qbkNQ2jkcnQ6DimsOpgPBNVMmKdXSUA9eF3DHo54nzIbhnN # rvWXiUp6d7EjyqTI0IquuajFnlRBRyn4VvtJPbxuzr78GH8XJ9o= # =Iz+M # -----END PGP SIGNATURE----- # gpg: Signature made Fri 05 Jan 2024 19:29:21 GMT # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: docs: use "buses" rather than "busses" edu: fix DMA range upper bound check hw/net: cadence_gem: Fix MDIO_OP_xxx values audio/audio.c: remove trailing newline in error_setg chardev/char.c: fix "abstract device type" error message target/riscv: Fix mcycle/minstret increment behavior Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--audio/audio.c2
-rw-r--r--chardev/char.c2
-rw-r--r--docs/system/arm/palm.rst2
-rw-r--r--docs/system/arm/xscale.rst2
-rw-r--r--docs/system/devices/can.rst6
-rw-r--r--hw/misc/edu.c2
-rw-r--r--hw/net/cadence_gem.c4
-rw-r--r--target/riscv/csr.c14
8 files changed, 17 insertions, 17 deletions
diff --git a/audio/audio.c b/audio/audio.c
index a1097bb..af0ae33 100644
--- a/audio/audio.c
+++ b/audio/audio.c
@@ -1744,7 +1744,7 @@ static AudioState *audio_init(Audiodev *dev, Error **errp)
if (driver) {
done = !audio_driver_init(s, driver, dev, errp);
} else {
- error_setg(errp, "Unknown audio driver `%s'\n", drvname);
+ error_setg(errp, "Unknown audio driver `%s'", drvname);
}
if (!done) {
goto out;
diff --git a/chardev/char.c b/chardev/char.c
index 996a024..119b548 100644
--- a/chardev/char.c
+++ b/chardev/char.c
@@ -518,7 +518,7 @@ static const ChardevClass *char_get_class(const char *driver, Error **errp)
if (object_class_is_abstract(oc)) {
error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "driver",
- "an abstract device type");
+ "a non-abstract device type");
return NULL;
}
diff --git a/docs/system/arm/palm.rst b/docs/system/arm/palm.rst
index 47ff9b3..61bc8d3 100644
--- a/docs/system/arm/palm.rst
+++ b/docs/system/arm/palm.rst
@@ -14,7 +14,7 @@ following elements:
- On-chip Real Time Clock
- TI TSC2102i touchscreen controller / analog-digital converter /
- Audio CODEC, connected through MicroWire and |I2S| busses
+ Audio CODEC, connected through MicroWire and |I2S| buses
- GPIO-connected matrix keypad
diff --git a/docs/system/arm/xscale.rst b/docs/system/arm/xscale.rst
index d2d5949..e239136 100644
--- a/docs/system/arm/xscale.rst
+++ b/docs/system/arm/xscale.rst
@@ -32,4 +32,4 @@ The clamshell PDA models emulation includes the following peripherals:
- Three on-chip UARTs
-- WM8750 audio CODEC on |I2C| and |I2S| busses
+- WM8750 audio CODEC on |I2C| and |I2S| buses
diff --git a/docs/system/devices/can.rst b/docs/system/devices/can.rst
index 0af3d99..0912183 100644
--- a/docs/system/devices/can.rst
+++ b/docs/system/devices/can.rst
@@ -1,12 +1,12 @@
CAN Bus Emulation Support
=========================
The CAN bus emulation provides mechanism to connect multiple
-emulated CAN controller chips together by one or multiple CAN busses
-(the controller device "canbus" parameter). The individual busses
+emulated CAN controller chips together by one or multiple CAN buses
+(the controller device "canbus" parameter). The individual buses
can be connected to host system CAN API (at this time only Linux
SocketCAN is supported).
-The concept of busses is generic and different CAN controllers
+The concept of buses is generic and different CAN controllers
can be implemented.
The initial submission implemented SJA1000 controller which
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index a1f8bc7..e64a246 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -115,7 +115,7 @@ static void edu_check_range(uint64_t addr, uint64_t size1, uint64_t start,
uint64_t end2 = start + size2;
if (within(addr, start, end2) &&
- end1 > addr && within(end1, start, end2)) {
+ end1 > addr && end1 <= end2) {
return;
}
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index d7b7b13..ec7bf56 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -199,8 +199,8 @@ REG32(PHYMNTNC, 0x34) /* Phy Maintenance reg */
FIELD(PHYMNTNC, PHY_ADDR, 23, 5)
FIELD(PHYMNTNC, OP, 28, 2)
FIELD(PHYMNTNC, ST, 30, 2)
-#define MDIO_OP_READ 0x3
-#define MDIO_OP_WRITE 0x2
+#define MDIO_OP_READ 0x2
+#define MDIO_OP_WRITE 0x1
REG32(RXPAUSE, 0x38) /* RX Pause Time reg */
REG32(TXPAUSE, 0x3c) /* TX Pause Time reg */
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index fde7ce1..c50a333 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -907,11 +907,11 @@ static int write_mhpmcounterh(CPURISCVState *env, int csrno, target_ulong val)
static RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val,
bool upper_half, uint32_t ctr_idx)
{
- PMUCTRState counter = env->pmu_ctrs[ctr_idx];
- target_ulong ctr_prev = upper_half ? counter.mhpmcounterh_prev :
- counter.mhpmcounter_prev;
- target_ulong ctr_val = upper_half ? counter.mhpmcounterh_val :
- counter.mhpmcounter_val;
+ PMUCTRState *counter = &env->pmu_ctrs[ctr_idx];
+ target_ulong ctr_prev = upper_half ? counter->mhpmcounterh_prev :
+ counter->mhpmcounter_prev;
+ target_ulong ctr_val = upper_half ? counter->mhpmcounterh_val :
+ counter->mhpmcounter_val;
if (get_field(env->mcountinhibit, BIT(ctr_idx))) {
/*
@@ -919,12 +919,12 @@ static RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val,
* stop the icount counting. Just return the counter value written by
* the supervisor to indicate that counter was not incremented.
*/
- if (!counter.started) {
+ if (!counter->started) {
*val = ctr_val;
return RISCV_EXCP_NONE;
} else {
/* Mark that the counter has been stopped */
- counter.started = false;
+ counter->started = false;
}
}