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authorPeter Maydell <peter.maydell@linaro.org>2014-05-13 16:09:38 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-13 16:09:38 +0100
commit2f0d8631b74c873c8867a7b509335bc2bf8d8886 (patch)
treea3f384c8b4bfc7adba1ed83d1de2f94affe6ed06
parent2e1198672759eda6e122ff38fcf6df06f27e0fe2 (diff)
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target-arm/helper.c: Don't flush the TLB if SCTLR is rewritten unchanged
Linux makes a habit of writing the same value to the SCTLR that it already holds. In a sample boot of the kernel to a shell prompt it wrote the SCTLR with the value it already held 325465 times, and wrote different values just 3 times. Skip flushing the TLB if the SCTLR value isn't actually being changed; this speeds up my sample boot by 3-5%. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1399560029-19007-1-git-send-email-peter.maydell@linaro.org
-rw-r--r--target-arm/helper.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3be917c..417161e 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2081,6 +2081,13 @@ static void sctlr_write(CPUARMState *env, const ARMCPRegInfo *ri,
{
ARMCPU *cpu = arm_env_get_cpu(env);
+ if (env->cp15.c1_sys == value) {
+ /* Skip the TLB flush if nothing actually changed; Linux likes
+ * to do a lot of pointless SCTLR writes.
+ */
+ return;
+ }
+
env->cp15.c1_sys = value;
/* ??? Lots of these bits are not implemented. */
/* This may enable/disable the MMU, so do a TLB flush. */