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authorLichang Zhao <zhaolichang@huawei.com>2020-10-09 14:44:46 +0800
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-03-15 00:39:52 +0100
commit2e35dfb634daba466adbc382da64e5fd4ce9d2ed (patch)
tree53a22cc6b558a73bebbf3e40f676c6b8de016858
parent15991968a072bca0f73eaa7929273afd80f70979 (diff)
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target/avr: Fix some comment spelling errors
I found that there are many spelling errors in the comments of qemu/target/avr. I used spellcheck to check the spelling errors and found some errors in the folder. Signed-off-by: Lichang Zhao <zhaolichang@huawei.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org> Message-Id: <20201009064449.2336-12-zhaolichang@huawei.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Michael Rolnik <mrolnik@gmail.com>
-rw-r--r--target/avr/helper.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/avr/helper.c b/target/avr/helper.c
index 65880b9..b4532de 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -98,7 +98,7 @@ int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
- return addr; /* I assume 1:1 address correspondance */
+ return addr; /* I assume 1:1 address correspondence */
}
bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
@@ -299,7 +299,7 @@ void helper_outb(CPUAVRState *env, uint32_t port, uint32_t data)
}
/*
- * this function implements LD instruction when there is a posibility to read
+ * this function implements LD instruction when there is a possibility to read
* from a CPU register
*/
target_ulong helper_fullrd(CPUAVRState *env, uint32_t addr)
@@ -323,7 +323,7 @@ target_ulong helper_fullrd(CPUAVRState *env, uint32_t addr)
}
/*
- * this function implements ST instruction when there is a posibility to write
+ * this function implements ST instruction when there is a possibility to write
* into a CPU register
*/
void helper_fullwr(CPUAVRState *env, uint32_t data, uint32_t addr)