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authorRichard Henderson <richard.henderson@linaro.org>2023-02-24 17:18:52 -1000
committerRichard Henderson <richard.henderson@linaro.org>2023-03-05 13:44:07 -0800
commit2503e60d128a92324bf1f780c11be4f15f882e42 (patch)
treead5bdf17f8879fd15732b7b785785ad006c57d5e
parent6980b80d59183e37d86c50bb0b9f99e15b347e05 (diff)
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target/arm: Drop new_tmp_a64_zero
Only the use within cpu_reg requires a writable temp, so inline new_tmp_a64_zero there. All other uses are fine with a constant temp, so use tcg_constant_i64(0). Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/arm/tcg/translate-a64.c41
-rw-r--r--target/arm/tcg/translate-a64.h1
2 files changed, 18 insertions, 24 deletions
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 38804e7..e7fa649 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -408,13 +408,6 @@ static void gen_goto_tb(DisasContext *s, int n, int64_t diff)
}
}
-TCGv_i64 new_tmp_a64_zero(DisasContext *s)
-{
- TCGv_i64 t = tcg_temp_new_i64();
- tcg_gen_movi_i64(t, 0);
- return t;
-}
-
/*
* Register access functions
*
@@ -433,7 +426,9 @@ TCGv_i64 new_tmp_a64_zero(DisasContext *s)
TCGv_i64 cpu_reg(DisasContext *s, int reg)
{
if (reg == 31) {
- return new_tmp_a64_zero(s);
+ TCGv_i64 t = tcg_temp_new_i64();
+ tcg_gen_movi_i64(t, 0);
+ return t;
} else {
return cpu_X[reg];
}
@@ -1532,7 +1527,7 @@ static void handle_hint(DisasContext *s, uint32_t insn,
case 0b11000: /* PACIAZ */
if (s->pauth_active) {
gen_helper_pacia(cpu_X[30], cpu_env, cpu_X[30],
- new_tmp_a64_zero(s));
+ tcg_constant_i64(0));
}
break;
case 0b11001: /* PACIASP */
@@ -1543,7 +1538,7 @@ static void handle_hint(DisasContext *s, uint32_t insn,
case 0b11010: /* PACIBZ */
if (s->pauth_active) {
gen_helper_pacib(cpu_X[30], cpu_env, cpu_X[30],
- new_tmp_a64_zero(s));
+ tcg_constant_i64(0));
}
break;
case 0b11011: /* PACIBSP */
@@ -1554,7 +1549,7 @@ static void handle_hint(DisasContext *s, uint32_t insn,
case 0b11100: /* AUTIAZ */
if (s->pauth_active) {
gen_helper_autia(cpu_X[30], cpu_env, cpu_X[30],
- new_tmp_a64_zero(s));
+ tcg_constant_i64(0));
}
break;
case 0b11101: /* AUTIASP */
@@ -1565,7 +1560,7 @@ static void handle_hint(DisasContext *s, uint32_t insn,
case 0b11110: /* AUTIBZ */
if (s->pauth_active) {
gen_helper_autib(cpu_X[30], cpu_env, cpu_X[30],
- new_tmp_a64_zero(s));
+ tcg_constant_i64(0));
}
break;
case 0b11111: /* AUTIBSP */
@@ -2285,7 +2280,7 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
if (op4 != 0x1f) {
goto do_unallocated;
}
- modifier = new_tmp_a64_zero(s);
+ modifier = tcg_constant_i64(0);
}
if (s->pauth_active) {
dst = tcg_temp_new_i64();
@@ -3550,10 +3545,10 @@ static void disas_ldst_pac(DisasContext *s, uint32_t insn,
if (s->pauth_active) {
if (use_key_a) {
gen_helper_autda(dirty_addr, cpu_env, dirty_addr,
- new_tmp_a64_zero(s));
+ tcg_constant_i64(0));
} else {
gen_helper_autdb(dirty_addr, cpu_env, dirty_addr,
- new_tmp_a64_zero(s));
+ tcg_constant_i64(0));
}
}
@@ -5628,7 +5623,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_pacia(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_pacia(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x09): /* PACIZB */
@@ -5636,7 +5631,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_pacib(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_pacib(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x0a): /* PACDZA */
@@ -5644,7 +5639,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_pacda(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_pacda(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x0b): /* PACDZB */
@@ -5652,7 +5647,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_pacdb(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_pacdb(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x0c): /* AUTIZA */
@@ -5660,7 +5655,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_autia(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_autia(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x0d): /* AUTIZB */
@@ -5668,7 +5663,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_autib(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_autib(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x0e): /* AUTDZA */
@@ -5676,7 +5671,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_autda(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_autda(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x0f): /* AUTDZB */
@@ -5684,7 +5679,7 @@ static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
goto do_unallocated;
} else if (s->pauth_active) {
tcg_rd = cpu_reg(s, rd);
- gen_helper_autdb(tcg_rd, cpu_env, tcg_rd, new_tmp_a64_zero(s));
+ gen_helper_autdb(tcg_rd, cpu_env, tcg_rd, tcg_constant_i64(0));
}
break;
case MAP(1, 0x01, 0x10): /* XPACI */
diff --git a/target/arm/tcg/translate-a64.h b/target/arm/tcg/translate-a64.h
index 8ac1269..0576c4e 100644
--- a/target/arm/tcg/translate-a64.h
+++ b/target/arm/tcg/translate-a64.h
@@ -18,7 +18,6 @@
#ifndef TARGET_ARM_TRANSLATE_A64_H
#define TARGET_ARM_TRANSLATE_A64_H
-TCGv_i64 new_tmp_a64_zero(DisasContext *s);
TCGv_i64 cpu_reg(DisasContext *s, int reg);
TCGv_i64 cpu_reg_sp(DisasContext *s, int reg);
TCGv_i64 read_cpu_reg(DisasContext *s, int reg, int sf);