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author | Cédric Le Goater <clg@kaod.org> | 2022-01-12 11:28:26 +0100 |
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committer | Cédric Le Goater <clg@kaod.org> | 2022-01-12 11:28:26 +0100 |
commit | 23ab6d8813685c38fd1d87f573dded9fe37ee17f (patch) | |
tree | 17818071ea8d0cc0e63bc02b683aaef6e0db6217 | |
parent | 4d805d43b2ddc5f143fb554f5e2d2da4f35ec432 (diff) | |
download | qemu-23ab6d8813685c38fd1d87f573dded9fe37ee17f.zip qemu-23ab6d8813685c38fd1d87f573dded9fe37ee17f.tar.gz qemu-23ab6d8813685c38fd1d87f573dded9fe37ee17f.tar.bz2 |
target/ppc: Add popcntb instruction to POWER5+ processors
popcntb instruction was added in ISA v2.02. Add support for POWER5+
processors since they implement ISA v2.03.
PPC970 CPUs implement v2.01 and do not support popcntb.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220105095142.3990430-2-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
-rw-r--r-- | target/ppc/cpu_init.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index cc93bff..f15a522 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6957,6 +6957,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_64B | + PPC_POPCNTB | PPC_SEGMENT_64B | PPC_SLBI; pcc->insns_flags2 = PPC2_FP_CVT_S64; pcc->msr_mask = (1ull << MSR_SF) | |