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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2024-01-05 20:05:30 -0300
committerAlistair Francis <alistair.francis@wdc.com>2024-02-09 10:41:46 +1000
commit237a2f8bcf598094f89f1c0526581d9057b392d2 (patch)
tree284aeb40ec6d8d8c35130b6ac0de5af88fd1b16e
parent45982b2897ed51645fa9f054b2d2af8881dc96fb (diff)
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target/riscv/cpu_cfg.h: remove unused fields
user_spec, bext_spec and bext_ver aren't being used. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Vladimir Isaev <vladimir.isaev@syntacore.com> Message-ID: <20240105230546.265053-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
-rw-r--r--target/riscv/cpu.h1
-rw-r--r--target/riscv/cpu_cfg.h2
2 files changed, 0 insertions, 3 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 136fc1d..52648e3 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -181,7 +181,6 @@ struct CPUArchState {
target_ulong guest_phys_fault_addr;
target_ulong priv_ver;
- target_ulong bext_ver;
target_ulong vext_ver;
/* RISCVMXL, but uint32_t for vmstate migration */
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index 780ae6e..06126681 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -140,8 +140,6 @@ struct RISCVCPUConfig {
uint32_t pmu_mask;
char *priv_spec;
- char *user_spec;
- char *bext_spec;
char *vext_spec;
uint16_t vlen;
uint16_t elen;