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authorRichard Henderson <richard.henderson@linaro.org>2019-03-22 15:56:19 -0700
committerRichard Henderson <richard.henderson@linaro.org>2019-06-10 07:03:34 -0700
commit2161a612b4e1d388046320bc464adefd6bba01a0 (patch)
treef544642525436586f932f915702e50f8fc63abf3
parent4f7c64b3819d559417615ed2b1d028ebc1a49580 (diff)
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cpu: Define ArchCPU
For all targets, do this just before including exec/cpu-all.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/alpha/cpu.h1
-rw-r--r--target/arm/cpu.h1
-rw-r--r--target/cris/cpu.h1
-rw-r--r--target/hppa/cpu.h1
-rw-r--r--target/i386/cpu.h1
-rw-r--r--target/lm32/cpu.h1
-rw-r--r--target/m68k/cpu.h1
-rw-r--r--target/microblaze/cpu.h1
-rw-r--r--target/mips/cpu.h1
-rw-r--r--target/moxie/cpu.h1
-rw-r--r--target/nios2/cpu.h1
-rw-r--r--target/openrisc/cpu.h1
-rw-r--r--target/ppc/cpu.h1
-rw-r--r--target/riscv/cpu.h1
-rw-r--r--target/s390x/cpu.h1
-rw-r--r--target/sh4/cpu.h1
-rw-r--r--target/sparc/cpu.h1
-rw-r--r--target/tilegx/cpu.h1
-rw-r--r--target/tricore/cpu.h1
-rw-r--r--target/unicore32/cpu.h1
-rw-r--r--target/xtensa/cpu.h1
21 files changed, 21 insertions, 0 deletions
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 9ec92bf..5af0b6c 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -305,6 +305,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
#define cpu_signal_handler cpu_alpha_signal_handler
typedef CPUAlphaState CPUArchState;
+typedef AlphaCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ccf581a..4ebb634 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3126,6 +3126,7 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
}
typedef CPUARMState CPUArchState;
+typedef ARMCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 2ee5417..e978eb9 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -285,6 +285,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
#define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
typedef CPUCRISState CPUArchState;
+typedef CRISCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 7fd755a..6eef107 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -231,6 +231,7 @@ static inline HPPACPU *hppa_env_get_cpu(CPUHPPAState *env)
#define ENV_OFFSET offsetof(HPPACPU, env)
typedef CPUHPPAState CPUArchState;
+typedef HPPACPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 81931fc..65f8f4d 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1753,6 +1753,7 @@ static inline target_long lshift(target_long x, int n)
void tcg_x86_init(void);
typedef CPUX86State CPUArchState;
+typedef X86CPU ArchCPU;
#include "exec/cpu-all.h"
#include "svm.h"
diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
index 86f6c7b..08c360b 100644
--- a/target/lm32/cpu.h
+++ b/target/lm32/cpu.h
@@ -257,6 +257,7 @@ bool lm32_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
bool probe, uintptr_t retaddr);
typedef CPULM32State CPUArchState;
+typedef LM32CPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 4465a66..1d30b73 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -537,6 +537,7 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
MemTxResult response, uintptr_t retaddr);
typedef CPUM68KState CPUArchState;
+typedef M68kCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 6170fd4..5a7fe3c 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -366,6 +366,7 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
bool probe, uintptr_t retaddr);
typedef CPUMBState CPUArchState;
+typedef MicroBlazeCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 6f65822..12527ca 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1113,6 +1113,7 @@ static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch)
}
typedef CPUMIPSState CPUArchState;
+typedef MIPSCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index 1de0515..b27b0ea 100644
--- a/target/moxie/cpu.h
+++ b/target/moxie/cpu.h
@@ -118,6 +118,7 @@ static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
}
typedef CPUMoxieState CPUArchState;
+typedef MoxieCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index cc8e0ab..5e51f1a 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -247,6 +247,7 @@ static inline int cpu_interrupts_enabled(CPUNios2State *env)
}
typedef CPUNios2State CPUArchState;
+typedef Nios2CPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 98361cb..4968956 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -364,6 +364,7 @@ void cpu_openrisc_count_stop(OpenRISCCPU *cpu);
#define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU
typedef CPUOpenRISCState CPUArchState;
+typedef OpenRISCCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 6478fe7..17e7213 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1376,6 +1376,7 @@ void ppc_compat_add_property(Object *obj, const char *name,
#endif /* defined(TARGET_PPC64) */
typedef CPUPPCState CPUArchState;
+typedef PowerPCCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 509aae0..8ee5051 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -335,6 +335,7 @@ void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops);
void riscv_cpu_register_gdb_regs_for_features(CPUState *cs);
typedef CPURISCVState CPUArchState;
+typedef RISCVCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 6614c05..a8c3d70 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -795,6 +795,7 @@ void s390_init_sigp(void);
S390CPU *s390_cpu_addr2state(uint16_t cpu_addr);
typedef CPUS390XState CPUArchState;
+typedef S390CPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index d7a8723..1bdc997 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -281,6 +281,7 @@ static inline int cpu_mmu_index (CPUSH4State *env, bool ifetch)
}
typedef CPUSH4State CPUArchState;
+typedef SuperHCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index fc392c6..ba5904e 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -730,6 +730,7 @@ static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil)
}
typedef CPUSPARCState CPUArchState;
+typedef SPARCCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h
index 2fbf14d..042a7a0 100644
--- a/target/tilegx/cpu.h
+++ b/target/tilegx/cpu.h
@@ -151,6 +151,7 @@ static inline TileGXCPU *tilegx_env_get_cpu(CPUTLGState *env)
#define MMU_USER_IDX 0 /* Current memory operation is in user mode */
typedef CPUTLGState CPUArchState;
+typedef TileGXCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index 5d3072f..8d660df 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -379,6 +379,7 @@ static inline int cpu_mmu_index(CPUTriCoreState *env, bool ifetch)
}
typedef CPUTriCoreState CPUArchState;
+typedef TriCoreCPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h
index 4856294..5c9c4d9 100644
--- a/target/unicore32/cpu.h
+++ b/target/unicore32/cpu.h
@@ -152,6 +152,7 @@ static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch)
}
typedef CPUUniCore32State CPUArchState;
+typedef UniCore32CPU ArchCPU;
#include "exec/cpu-all.h"
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index e164e18..6e6fb1d 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -800,6 +800,7 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
}
typedef CPUXtensaState CPUArchState;
+typedef XtensaCPU ArchCPU;
#include "exec/cpu-all.h"