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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2023-02-22 15:52:05 -0300
committerPalmer Dabbelt <palmer@rivosinc.com>2023-03-01 13:47:16 -0800
commit1e2de2b8280a518a6178e7d4dda6c9906d8a86f2 (patch)
tree67499d0ad71b0452fbd414de9a91d36acb0eb941
parentdcf654a3e899ac2569393ca3a4747c3776d9c9a3 (diff)
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target/riscv/cpu: remove CPUArchState::features and friends
The attribute is no longer used since we can retrieve all the enabled features in the hart by using cpu->cfg instead. Remove env->feature, riscv_feature() and riscv_set_feature(). We also need to bump vmstate_riscv_cpu version_id and minimal_version_id since 'features' is no longer being migrated. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-ID: <20230222185205.355361-11-dbarboza@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
-rw-r--r--target/riscv/cpu.h12
-rw-r--r--target/riscv/machine.c5
2 files changed, 2 insertions, 15 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index ac33362..b9f69a1 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -175,8 +175,6 @@ struct CPUArchState {
/* 128-bit helpers upper part return value */
target_ulong retxh;
- uint32_t features;
-
#ifdef CONFIG_USER_ONLY
uint32_t elf_flags;
#endif
@@ -525,16 +523,6 @@ static inline int riscv_has_ext(CPURISCVState *env, target_ulong ext)
return (env->misa_ext & ext) != 0;
}
-static inline bool riscv_feature(CPURISCVState *env, int feature)
-{
- return env->features & (1ULL << feature);
-}
-
-static inline void riscv_set_feature(CPURISCVState *env, int feature)
-{
- env->features |= (1ULL << feature);
-}
-
#include "cpu_user.h"
extern const char * const riscv_int_regnames[];
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 67e9e56..9c45593 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -331,8 +331,8 @@ static const VMStateDescription vmstate_pmu_ctr_state = {
const VMStateDescription vmstate_riscv_cpu = {
.name = "cpu",
- .version_id = 6,
- .minimum_version_id = 6,
+ .version_id = 7,
+ .minimum_version_id = 7,
.post_load = riscv_cpu_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINTTL_ARRAY(env.gpr, RISCVCPU, 32),
@@ -351,7 +351,6 @@ const VMStateDescription vmstate_riscv_cpu = {
VMSTATE_UINT32(env.misa_ext, RISCVCPU),
VMSTATE_UINT32(env.misa_mxl_max, RISCVCPU),
VMSTATE_UINT32(env.misa_ext_mask, RISCVCPU),
- VMSTATE_UINT32(env.features, RISCVCPU),
VMSTATE_UINTTL(env.priv, RISCVCPU),
VMSTATE_UINTTL(env.virt, RISCVCPU),
VMSTATE_UINT64(env.resetvec, RISCVCPU),