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| author | Paolo Bonzini <pbonzini@redhat.com> | 2022-09-09 11:08:18 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-10-18 13:58:04 +0200 |
| commit | 1de9e7e61212e332e9bd7145c744bd3f411c7847 (patch) | |
| tree | d901523c07f15949f656038678932d22608d9a35 | |
| parent | f05f9789f57d5394fc118fe31aa2a9f563311140 (diff) | |
| download | qemu-1de9e7e61212e332e9bd7145c744bd3f411c7847.zip qemu-1de9e7e61212e332e9bd7145c744bd3f411c7847.tar.gz qemu-1de9e7e61212e332e9bd7145c744bd3f411c7847.tar.bz2 | |
target/i386: support operand merging in binary scalar helpers
Compared to Paul's implementation, the new decoder will use a different approach
to implement AVX's merging of dst with src1 on scalar operations. Adjust the
helpers to provide this functionality.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/ops_sse.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index 5f0ee9db5..ddedc46 100644 --- a/target/i386/ops_sse.h +++ b/target/i386/ops_sse.h @@ -557,12 +557,20 @@ void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order) \ void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s)\ { \ + int i; \ d->ZMM_S(0) = F(32, v->ZMM_S(0), s->ZMM_S(0)); \ + for (i = 1; i < 2 << SHIFT; i++) { \ + d->ZMM_L(i) = v->ZMM_L(i); \ + } \ } \ \ void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s)\ { \ + int i; \ d->ZMM_D(0) = F(64, v->ZMM_D(0), s->ZMM_D(0)); \ + for (i = 1; i < 1 << SHIFT; i++) { \ + d->ZMM_Q(i) = v->ZMM_Q(i); \ + } \ } #else @@ -1027,12 +1035,20 @@ void glue(helper_addsubpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s) SSE_HELPER_CMP_P(name, F, C) \ void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ { \ + int i; \ d->ZMM_L(0) = C(F(32, v->ZMM_S(0), s->ZMM_S(0))) ? -1 : 0; \ + for (i = 1; i < 2 << SHIFT; i++) { \ + d->ZMM_L(i) = v->ZMM_L(i); \ + } \ } \ \ void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ { \ + int i; \ d->ZMM_Q(0) = C(F(64, v->ZMM_D(0), s->ZMM_D(0))) ? -1 : 0; \ + for (i = 1; i < 1 << SHIFT; i++) { \ + d->ZMM_Q(i) = v->ZMM_Q(i); \ + } \ } #define FPU_EQ(x) (x == float_relation_equal) |