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authorPaolo Bonzini <pbonzini@redhat.com>2025-02-06 17:39:49 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2025-05-20 08:18:53 +0200
commit1d84c2401c48617b8695d292602e2e777e0d1178 (patch)
tree63c554f087add8c920a0f062cbcfa246ce397c10
parent5a62948c91a910de4f9c7332cf8803152c099eac (diff)
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target/riscv: th: make CSR insertion test a bit more intuitive
In preparation for generalizing the custom CSR functionality, make the test return bool instead of int. Make the insertion_test optional, too. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--target/riscv/th_csr.c13
1 files changed, 4 insertions, 9 deletions
diff --git a/target/riscv/th_csr.c b/target/riscv/th_csr.c
index 6c970d4..969a9fe 100644
--- a/target/riscv/th_csr.c
+++ b/target/riscv/th_csr.c
@@ -29,7 +29,7 @@
typedef struct {
int csrno;
- int (*insertion_test)(RISCVCPU *cpu);
+ bool (*insertion_test)(RISCVCPU *cpu);
riscv_csr_operations csr_ops;
} riscv_csr;
@@ -42,13 +42,9 @@ static RISCVException smode(CPURISCVState *env, int csrno)
return RISCV_EXCP_ILLEGAL_INST;
}
-static int test_thead_mvendorid(RISCVCPU *cpu)
+static bool test_thead_mvendorid(RISCVCPU *cpu)
{
- if (cpu->cfg.mvendorid != THEAD_VENDOR_ID) {
- return -1;
- }
-
- return 0;
+ return cpu->cfg.mvendorid == THEAD_VENDOR_ID;
}
static RISCVException read_th_sxstatus(CPURISCVState *env, int csrno,
@@ -66,13 +62,12 @@ static riscv_csr th_csr_list[] = {
.csr_ops = { "th.sxstatus", smode, read_th_sxstatus }
}
};
-
void th_register_custom_csrs(RISCVCPU *cpu)
{
for (size_t i = 0; i < ARRAY_SIZE(th_csr_list); i++) {
int csrno = th_csr_list[i].csrno;
riscv_csr_operations *csr_ops = &th_csr_list[i].csr_ops;
- if (!th_csr_list[i].insertion_test(cpu)) {
+ if (!th_csr_list[i].insertion_test || th_csr_list[i].insertion_test(cpu)) {
riscv_set_csr_ops(csrno, csr_ops);
}
}