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| author | Song Gao <gaosong@loongson.cn> | 2023-10-23 10:40:59 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-11-03 14:13:13 +0800 |
| commit | 1d832c19db1e895b7d8015c3b33fc6311e20a69c (patch) | |
| tree | 39e8a657f12a6546176ea8fd3fd1e395d2b6764c | |
| parent | 31f694b91188d2077c5d85a5064b54b127635718 (diff) | |
| download | qemu-1d832c19db1e895b7d8015c3b33fc6311e20a69c.zip qemu-1d832c19db1e895b7d8015c3b33fc6311e20a69c.tar.gz qemu-1d832c19db1e895b7d8015c3b33fc6311e20a69c.tar.bz2 | |
target/loongarch: Support 4K page size
The LoongArch kernel supports 4K page size.
Change TARGET_PAGE_BITS to 12.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20231023024059.3858349-1-gaosong@loongson.cn>
| -rw-r--r-- | target/loongarch/cpu-param.h | 2 | ||||
| -rw-r--r-- | target/loongarch/tlb_helper.c | 9 |
2 files changed, 5 insertions, 6 deletions
diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h index 1265dc7..cfe195d 100644 --- a/target/loongarch/cpu-param.h +++ b/target/loongarch/cpu-param.h @@ -12,6 +12,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 48 #define TARGET_VIRT_ADDR_SPACE_BITS 48 -#define TARGET_PAGE_BITS 14 +#define TARGET_PAGE_BITS 12 #endif diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c index c8b8b04..449043c 100644 --- a/target/loongarch/tlb_helper.c +++ b/target/loongarch/tlb_helper.c @@ -60,6 +60,9 @@ static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical, tlb_rplv = 0; } + /* Remove sw bit between bit12 -- bit PS*/ + tlb_ppn = tlb_ppn & ~(((0x1UL << (tlb_ps - 12)) -1)); + /* Check access rights */ if (!tlb_v) { return TLBRET_INVALID; @@ -82,10 +85,6 @@ static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical, return TLBRET_DIRTY; } - /* - * tlb_entry contains ppn[47:12] while 16KiB ppn is [47:15] - * need adjust. - */ *physical = (tlb_ppn << R_TLBENTRY_64_PPN_SHIFT) | (address & MAKE_64BIT_MASK(0, tlb_ps)); *prot = PAGE_READ; @@ -774,7 +773,7 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd, /* Move Global bit */ tmp0 = ((tmp0 & (1 << LOONGARCH_HGLOBAL_SHIFT)) >> LOONGARCH_HGLOBAL_SHIFT) << R_TLBENTRY_G_SHIFT | - (tmp0 & (~(1 << R_TLBENTRY_G_SHIFT))); + (tmp0 & (~(1 << LOONGARCH_HGLOBAL_SHIFT))); ps = ptbase + ptwidth - 1; if (odd) { tmp0 += MAKE_64BIT_MASK(ps, 1); |