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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-01-29 09:44:10 +1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-02-03 16:46:09 +1000 |
| commit | 167d6cd0e855eb64d51707fea194833695bac2c4 (patch) | |
| tree | 0f47de56f7cb859c5c0d0b3fddabb88927c8705b | |
| parent | a5a2d7f64f0d71278fb338a25fb9a05f926b6845 (diff) | |
| download | qemu-167d6cd0e855eb64d51707fea194833695bac2c4.zip qemu-167d6cd0e855eb64d51707fea194833695bac2c4.tar.gz qemu-167d6cd0e855eb64d51707fea194833695bac2c4.tar.bz2 | |
target/microblaze: Populate CPUClass.mmu_index
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/microblaze/cpu.c | 18 | ||||
| -rw-r--r-- | target/microblaze/cpu.h | 13 |
2 files changed, 19 insertions, 12 deletions
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 2318ad7..6dad119 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -118,6 +118,22 @@ static bool mb_cpu_has_work(CPUState *cs) return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } +int mb_cpu_mmu_index(CPUState *cs, bool ifetch) +{ + CPUMBState *env = cpu_env(cs); + MicroBlazeCPU *cpu = env_archcpu(env); + + /* Are we in nommu mode?. */ + if (!(env->msr & MSR_VM) || !cpu->cfg.use_mmu) { + return MMU_NOMMU_IDX; + } + + if (env->msr & MSR_UM) { + return MMU_USER_IDX; + } + return MMU_KERNEL_IDX; +} + #ifndef CONFIG_USER_ONLY static void mb_cpu_ns_axi_dp(void *opaque, int irq, int level) { @@ -415,7 +431,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = mb_cpu_class_by_name; cc->has_work = mb_cpu_has_work; - + cc->mmu_index = mb_cpu_mmu_index; cc->dump_state = mb_cpu_dump_state; cc->set_pc = mb_cpu_set_pc; cc->get_pc = mb_cpu_get_pc; diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index b537436..90ab796 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -434,19 +434,10 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, MemTxResult response, uintptr_t retaddr); #endif +int mb_cpu_mmu_index(CPUState *cs, bool ifetch); static inline int cpu_mmu_index(CPUMBState *env, bool ifetch) { - MicroBlazeCPU *cpu = env_archcpu(env); - - /* Are we in nommu mode?. */ - if (!(env->msr & MSR_VM) || !cpu->cfg.use_mmu) { - return MMU_NOMMU_IDX; - } - - if (env->msr & MSR_UM) { - return MMU_USER_IDX; - } - return MMU_KERNEL_IDX; + return mb_cpu_mmu_index(env_cpu(env), ifetch); } #ifndef CONFIG_USER_ONLY |