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authorPeter Maydell <peter.maydell@linaro.org>2020-07-16 21:46:18 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-07-16 21:46:18 +0100
commit151f76c689b1ff4c2c59e6d8469a0d4fe5346f55 (patch)
treea4e13984a7f59306b36031cdf962379ca38d0d29
parent95d1fbabae0cd44156ac4b96d512d143ca7dfd5e (diff)
parent818b9f111d64b40661d08f5e23236ac1ca5df505 (diff)
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Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging
x86 fixes for -rc1 Fixes for x86 that missed hard freeze: * Don't trigger warnings for features set by CPU model versions (Xiaoyao Li) * Missing features in Icelake-Server, Skylake-Server, Cascadelake-Server CPU models (Chenyi Qiang) * Fix hvf x86_64 guest boot crash (Roman Bolshakov) # gpg: Signature made Thu 16 Jul 2020 19:17:18 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: hvf: Explicitly set CR4 guest/host mask target/i386: add the missing vmx features for Skylake-Server and Cascadelake-Server CPU models target/i386: fix model number and add missing features for Icelake-Server CPU model target/i386: add fast short REP MOV support i386/cpu: Don't add unavailable_features to env->user_features i368/cpu: Clear env->user_features after loading versioned CPU model Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/i386/cpu.c38
-rw-r--r--target/i386/cpu.h2
-rw-r--r--target/i386/hvf/vmx.h1
3 files changed, 39 insertions, 2 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1e51232..588f32e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -984,7 +984,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
.type = CPUID_FEATURE_WORD,
.feat_names = {
NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
- NULL, NULL, NULL, NULL,
+ "fsrm", NULL, NULL, NULL,
"avx512-vp2intersect", NULL, "md-clear", NULL,
NULL, NULL, "serialize", NULL,
"tsx-ldtrk", NULL, NULL /* pconfig */, NULL,
@@ -3034,6 +3034,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ }
}
},
+ {
+ .version = 4,
+ .props = (PropValue[]) {
+ { "vmx-eptp-switching", "on" },
+ { /* end of list */ }
+ }
+ },
{ /* end of list */ }
}
},
@@ -3158,6 +3165,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ }
},
},
+ { .version = 4,
+ .note = "ARCH_CAPABILITIES, no TSX",
+ .props = (PropValue[]) {
+ { "vmx-eptp-switching", "on" },
+ { /* end of list */ }
+ },
+ },
{ /* end of list */ }
}
},
@@ -3512,6 +3526,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ }
},
},
+ {
+ .version = 4,
+ .props = (PropValue[]) {
+ { "sha-ni", "on" },
+ { "avx512ifma", "on" },
+ { "rdpid", "on" },
+ { "fsrm", "on" },
+ { "vmx-rdseed-exit", "on" },
+ { "vmx-pml", "on" },
+ { "vmx-eptp-switching", "on" },
+ { "model", "106" },
+ { /* end of list */ }
+ },
+ },
{ /* end of list */ }
}
},
@@ -5159,6 +5187,13 @@ static void x86_cpu_load_model(X86CPU *cpu, X86CPUModel *model)
object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort);
x86_cpu_apply_version_props(cpu, model);
+
+ /*
+ * Properties in versioned CPU model are not user specified features.
+ * We can simply clear env->user_features here since it will be filled later
+ * in x86_cpu_expand_features() based on plus_features and minus_features.
+ */
+ memset(&env->user_features, 0, sizeof(env->user_features));
}
#ifndef CONFIG_USER_ONLY
@@ -6364,7 +6399,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
unavailable_features & env->user_features[d->to.index],
"This feature depends on other features that were not requested");
- env->user_features[d->to.index] |= unavailable_features;
env->features[d->to.index] &= ~unavailable_features;
}
}
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 37fffa5c..e1a5c17 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -775,6 +775,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2)
/* AVX512 Multiply Accumulation Single Precision */
#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3)
+/* Fast Short Rep Mov */
+#define CPUID_7_0_EDX_FSRM (1U << 4)
/* AVX512 Vector Pair Intersection to a Pair of Mask Registers */
#define CPUID_7_0_EDX_AVX512_VP2INTERSECT (1U << 8)
/* SERIALIZE instruction */
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 75ba1e2..587b1b8 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -166,6 +166,7 @@ static inline void macvm_set_cr4(hv_vcpuid_t vcpu, uint64_t cr4)
wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4);
wvmcs(vcpu, VMCS_CR4_SHADOW, cr4);
+ wvmcs(vcpu, VMCS_CR4_MASK, CR4_VMXE);
hv_vcpu_invalidate_tlb(vcpu);
hv_vcpu_flush(vcpu);