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author | Sairaj Kodilkar <sarunkod@amd.com> | 2025-08-01 11:35:06 +0530 |
---|---|---|
committer | Michael S. Tsirkin <mst@redhat.com> | 2025-08-01 10:23:50 -0400 |
commit | 10690920b0efb3ed8b166443bae8077104bb129d (patch) | |
tree | cad6702a142bd16acc4d608c0997e4cba392f025 | |
parent | 47d3b32d6fb1c6ec8afb78d12d2420dbbb4c3499 (diff) | |
download | qemu-10690920b0efb3ed8b166443bae8077104bb129d.zip qemu-10690920b0efb3ed8b166443bae8077104bb129d.tar.gz qemu-10690920b0efb3ed8b166443bae8077104bb129d.tar.bz2 |
hw/i386/amd_iommu: Support MMIO writes to the status register
Support the writes to the status register so that guest can reset the
EventOverflow, EventLogInt, ComWaitIntr, etc bits after servicing the
respective interrupt.
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Message-Id: <20250801060507.3382-6-sarunkod@amd.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r-- | hw/i386/amd_iommu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index c9c32cf..6925085 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -862,6 +862,9 @@ static void amdvi_mmio_write(void *opaque, hwaddr addr, uint64_t val, amdvi_mmio_reg_write(s, size, val, addr); amdvi_handle_pprtail_write(s); break; + case AMDVI_MMIO_STATUS: + amdvi_mmio_reg_write(s, size, val, addr); + break; } } |