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author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-21 12:18:26 +0100 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-23 15:07:32 -0700 |
commit | 0eca13c29a0823850cf3308528b0de0ed4608c02 (patch) | |
tree | 16341808f6b6cc1496951565314958ed3af84c6c | |
parent | eacd8c7cef297bafa53deaf8d9b9d368acff3936 (diff) | |
download | qemu-0eca13c29a0823850cf3308528b0de0ed4608c02.zip qemu-0eca13c29a0823850cf3308528b0de0ed4608c02.tar.gz qemu-0eca13c29a0823850cf3308528b0de0ed4608c02.tar.bz2 |
tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order
In order to use TCG with multiple targets, replace the
compile time use of TCG_GUEST_DEFAULT_MO by a runtime access
to TCGCPUOps::guest_default_memory_order via CPUState.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | accel/tcg/internal-target.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h index 23aac39..f5a3fd7 100644 --- a/accel/tcg/internal-target.h +++ b/accel/tcg/internal-target.h @@ -46,16 +46,15 @@ G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); /** * tcg_req_mo: + * @guest_mo: Guest default memory order * @type: TCGBar * * Filter @type to the barrier that is required for the guest * memory ordering vs the host memory ordering. A non-zero * result indicates that some barrier is required. - * - * This is a macro so that it's constant even without optimization. */ -#define tcg_req_mo(type) \ - ((type) & TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) +#define tcg_req_mo(guest_mo, type) \ + ((type) & guest_mo & ~TCG_TARGET_DEFAULT_MO) /** * cpu_req_mo: @@ -67,7 +66,7 @@ G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); */ #define cpu_req_mo(cpu, type) \ do { \ - if (tcg_req_mo(type)) { \ + if (tcg_req_mo(cpu->cc->tcg_ops->guest_default_memory_order, type)) { \ smp_mb(); \ } \ } while (0) |