diff options
author | Leonardo Bras <leonardo@linux.ibm.com> | 2020-05-11 17:02:02 -0300 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2020-05-27 15:29:36 +1000 |
commit | 0911a60c76b8598f1863c6951b2b690059465153 (patch) | |
tree | bb4f7e24107dea32b36ebf14b60805c9e6398526 | |
parent | 3c89b8d6ac5b8728cd7620f9885bd953edd18a11 (diff) | |
download | qemu-0911a60c76b8598f1863c6951b2b690059465153.zip qemu-0911a60c76b8598f1863c6951b2b690059465153.tar.gz qemu-0911a60c76b8598f1863c6951b2b690059465153.tar.bz2 |
ppc/spapr: Add hotremovable flag on DIMM LMBs on drmem_v2
On reboot, all memory that was previously added using object_add and
device_add is placed in this DIMM area.
The new SPAPR_LMB_FLAGS_HOTREMOVABLE flag helps Linux to put this memory in
the correct memory zone, so no unmovable allocations are made there,
allowing the object to be easily hot-removed by device_del and
object_del.
This new flag was accepted in Power Architecture documentation.
Signed-off-by: Leonardo Bras <leobras.c@gmail.com>
Reviewed-by: Bharata B Rao <bharata@linux.ibm.com>
Message-Id: <20200511200201.58537-1-leobras.c@gmail.com>
[dwg: Fixed syntax error spotted by Cédric Le Goater]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
-rw-r--r-- | hw/ppc/pnv.c | 8 | ||||
-rw-r--r-- | hw/ppc/spapr.c | 3 | ||||
-rw-r--r-- | include/hw/ppc/spapr.h | 1 | ||||
-rw-r--r-- | target/ppc/cpu.h | 21 | ||||
-rw-r--r-- | target/ppc/excp_helper.c | 16 |
5 files changed, 36 insertions, 13 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index f48a61d..806a5d9 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1984,15 +1984,15 @@ static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg) cpu_synchronize_state(cs); ppc_cpu_do_system_reset(cs); - if (env->spr[SPR_SRR1] & PPC_BITMASK(46, 47)) { + if (env->spr[SPR_SRR1] & SRR1_WAKESTATE) { /* * Power-save wakeups, as indicated by non-zero SRR1[46:47] put the * wakeup reason in SRR1[42:45], system reset is indicated with 0b0100 * (PPC_BIT(43)). */ - if (!(env->spr[SPR_SRR1] & PPC_BIT(43))) { + if (!(env->spr[SPR_SRR1] & SRR1_WAKERESET)) { warn_report("ppc_cpu_do_system_reset does not set system reset wakeup reason"); - env->spr[SPR_SRR1] |= PPC_BIT(43); + env->spr[SPR_SRR1] |= SRR1_WAKERESET; } } else { /* @@ -2002,7 +2002,7 @@ static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg) * another CPU requesting a NMI IPI) system reset exception should be * 0b0010 (PPC_BIT(44)). */ - env->spr[SPR_SRR1] |= PPC_BIT(44); + env->spr[SPR_SRR1] |= SRR1_WAKESCOM; } } diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 9b358fc..3b1a5ed 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -445,7 +445,8 @@ static int spapr_dt_dynamic_memory_v2(SpaprMachineState *spapr, void *fdt, g_assert(drc); elem = spapr_get_drconf_cell(size / lmb_size, addr, spapr_drc_index(drc), node, - SPAPR_LMB_FLAGS_ASSIGNED); + (SPAPR_LMB_FLAGS_ASSIGNED | + SPAPR_LMB_FLAGS_HOTREMOVABLE)); QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); nr_entries++; cur_addr = addr + size; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index d2533e7..c421410 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -886,6 +886,7 @@ int spapr_rtc_import_offset(SpaprRtcState *rtc, int64_t legacy_offset); #define SPAPR_LMB_FLAGS_ASSIGNED 0x00000008 #define SPAPR_LMB_FLAGS_DRC_INVALID 0x00000020 #define SPAPR_LMB_FLAGS_RESERVED 0x00000080 +#define SPAPR_LMB_FLAGS_HOTREMOVABLE 0x00000100 void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg); diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c1005b0..1988b43 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -476,6 +476,27 @@ typedef struct ppc_v3_pate_t { #define SRR1_PROTFAULT DSISR_PROTFAULT #define SRR1_IAMR DSISR_AMR +/* SRR1[42:45] wakeup fields for System Reset Interrupt */ + +#define SRR1_WAKEMASK 0x003c0000 /* reason for wakeup */ + +#define SRR1_WAKEHMI 0x00280000 /* Hypervisor maintenance */ +#define SRR1_WAKEHVI 0x00240000 /* Hypervisor Virt. Interrupt (P9) */ +#define SRR1_WAKEEE 0x00200000 /* External interrupt */ +#define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */ +#define SRR1_WAKEDBELL 0x00140000 /* Privileged doorbell */ +#define SRR1_WAKERESET 0x00100000 /* System reset */ +#define SRR1_WAKEHDBELL 0x000c0000 /* Hypervisor doorbell */ +#define SRR1_WAKESCOM 0x00080000 /* SCOM not in power-saving mode */ + +/* SRR1[46:47] power-saving exit mode */ + +#define SRR1_WAKESTATE 0x00030000 /* Powersave exit mask */ + +#define SRR1_WS_HVLOSS 0x00030000 /* HV resources not maintained */ +#define SRR1_WS_GPRLOSS 0x00020000 /* GPRs not maintained */ +#define SRR1_WS_NOLOSS 0x00010000 /* All resources maintained */ + /* Facility Status and Control (FSCR) bits */ #define FSCR_EBB (63 - 56) /* Event-Based Branch Facility */ #define FSCR_TAR (63 - 55) /* Target Address Register */ diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 14d3902..a988ba1 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -101,7 +101,7 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp, env->resume_as_sreset = false; /* Pretend to be returning from doze always as we don't lose state */ - *msr |= (0x1ull << (63 - 47)); + *msr |= SRR1_WS_NOLOSS; /* Machine checks are sent normally */ if (excp == POWERPC_EXCP_MCHECK) { @@ -109,25 +109,25 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp, } switch (excp) { case POWERPC_EXCP_RESET: - *msr |= 0x4ull << (63 - 45); + *msr |= SRR1_WAKERESET; break; case POWERPC_EXCP_EXTERNAL: - *msr |= 0x8ull << (63 - 45); + *msr |= SRR1_WAKEEE; break; case POWERPC_EXCP_DECR: - *msr |= 0x6ull << (63 - 45); + *msr |= SRR1_WAKEDEC; break; case POWERPC_EXCP_SDOOR: - *msr |= 0x5ull << (63 - 45); + *msr |= SRR1_WAKEDBELL; break; case POWERPC_EXCP_SDOOR_HV: - *msr |= 0x3ull << (63 - 45); + *msr |= SRR1_WAKEHDBELL; break; case POWERPC_EXCP_HV_MAINT: - *msr |= 0xaull << (63 - 45); + *msr |= SRR1_WAKEHMI; break; case POWERPC_EXCP_HVIRT: - *msr |= 0x9ull << (63 - 45); + *msr |= SRR1_WAKEHVI; break; default: cpu_abort(cs, "Unsupported exception %d in Power Save mode\n", |