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| author | Graeme Gregory <graeme@nuviainc.com> | 2020-10-07 11:07:32 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-10-08 15:24:32 +0100 |
| commit | 04788fd5c5577cbe5fb61107cdd9732479c793ca (patch) | |
| tree | ebcdef7762daa3a16fbe5d4e42655d59ce1c9e83 | |
| parent | b8bf3472ccb4e5265dc6ec148a38f4b4dd5ac896 (diff) | |
| download | qemu-04788fd5c5577cbe5fb61107cdd9732479c793ca.zip qemu-04788fd5c5577cbe5fb61107cdd9732479c793ca.tar.gz qemu-04788fd5c5577cbe5fb61107cdd9732479c793ca.tar.bz2 | |
hw/arm/sbsa-ref : allocate IRQs for SMMUv3
Original commit did not allocate IRQs for the SMMUv3 in the irqmap
effectively using irq 0->3 (shared with other devices). Assuming
original intent was to allocate unique IRQs then add an allocation
to the irqmap.
Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20201007100732.4103790-3-graeme@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/arm/sbsa-ref.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 65e6488..0186351 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -133,6 +133,7 @@ static const int sbsa_ref_irqmap[] = { [SBSA_SECURE_UART_MM] = 9, [SBSA_AHCI] = 10, [SBSA_EHCI] = 11, + [SBSA_SMMU] = 12, /* ... to 15 */ }; static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) |