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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-07-20 10:24:24 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-09-11 11:45:54 +1000 |
| commit | 03d7bbfd04c2a68f6339adede99ceae10800dc91 (patch) | |
| tree | 24ce8c580db5bff6f47bea62ef3fb8d47bb1b45b | |
| parent | 50f9464962fb41f04fd5f42e7ee2cb60942aba89 (diff) | |
| download | qemu-03d7bbfd04c2a68f6339adede99ceae10800dc91.zip qemu-03d7bbfd04c2a68f6339adede99ceae10800dc91.tar.gz qemu-03d7bbfd04c2a68f6339adede99ceae10800dc91.tar.bz2 | |
target/riscv/cpu.c: add smepmp isa string
The cpu->cfg.epmp extension is still experimental, but it already has a
'smepmp' riscv,isa string. Add it.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230720132424.371132-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 6d02e85..921c19e 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -130,6 +130,7 @@ static const struct isa_ext_data isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(zhinx, PRIV_VERSION_1_12_0, ext_zhinx), ISA_EXT_DATA_ENTRY(zhinxmin, PRIV_VERSION_1_12_0, ext_zhinxmin), ISA_EXT_DATA_ENTRY(smaia, PRIV_VERSION_1_12_0, ext_smaia), + ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, epmp), ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen), ISA_EXT_DATA_ENTRY(ssaia, PRIV_VERSION_1_12_0, ext_ssaia), ISA_EXT_DATA_ENTRY(sscofpmf, PRIV_VERSION_1_12_0, ext_sscofpmf), |