diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2025-01-18 01:50:50 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-28 13:40:17 -0700 |
| commit | 02b9d791be10ea9e4c8fdfe4cfdc2a6a0de7e810 (patch) | |
| tree | 155f6f1c972466e5be4df2e265422d0dc7a6d1de | |
| parent | fcfbd8f4a9c3cbc09376230093d28e14acf7854b (diff) | |
| download | qemu-02b9d791be10ea9e4c8fdfe4cfdc2a6a0de7e810.zip qemu-02b9d791be10ea9e4c8fdfe4cfdc2a6a0de7e810.tar.gz qemu-02b9d791be10ea9e4c8fdfe4cfdc2a6a0de7e810.tar.bz2 | |
target/openrisc: Use tcg_gen_addcio_* for ADDC
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/openrisc/translate.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index d4ce601..baadea4 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -221,8 +221,7 @@ static void gen_addc(DisasContext *dc, TCGv dest, TCGv srca, TCGv srcb) TCGv t0 = tcg_temp_new(); TCGv res = tcg_temp_new(); - tcg_gen_add2_tl(res, cpu_sr_cy, srca, dc->zero, cpu_sr_cy, dc->zero); - tcg_gen_add2_tl(res, cpu_sr_cy, res, cpu_sr_cy, srcb, dc->zero); + tcg_gen_addcio_tl(res, cpu_sr_cy, srca, srcb, cpu_sr_cy); tcg_gen_xor_tl(cpu_sr_ov, srca, srcb); tcg_gen_xor_tl(t0, res, srcb); tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); |