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2019-07-05Report correct scause when faulting while fetching emulated instructionAndrew Waterman2-7/+26
2019-06-11Check for 'U' extension before accessing 'mcounteren' CSRGabriel L. Somlo1-1/+2
On 64-bit Rocket with 'DefaultFPGAConfig' (using 'WithNSmallCores'), the 'U' extension is not supported, and accessing 'mcounteren' would trigger an 'Illegal Instruction' trap. Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2019-01-04Set up PMP earlier, so it can be overridden laterAndrew Waterman2-5/+3
2018-12-02Delegate misaligned AMOs as access exceptions, not misalignedAndrew Waterman1-2/+8
This indicates the access is actually invalid, i.e., should not be emulated.
2018-12-02Revert "Avoid writing reserved values to pmpaddr CSR"Andrew Waterman1-2/+1
This reverts commit 7bee30c1ff56975041ffc67cd0170d7477aba865. All ones is no longer "reserved", so the old code is OK.
2018-11-20Fix the calculation for the number of interrupt enable wordsLogan Gunthorpe1-1/+2
The number of interrupt enable words should be the number of devices divided by the number of bits per word (not the number of bytes per word) and it should round up. Without this fix, when using a larger number of interrupts, the user will see a number of errors in qemu of the form: plic: invalid register write: %08x Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
2018-09-23Avoid writing reserved values to pmpaddr CSRAndrew Waterman1-1/+2
2018-08-15Fix printm on RV32 (#119)Andrew Waterman1-0/+16
Use a proxy syscall instead of a blocking character write. Resolves #84
2018-07-12minit: Move pmp setup code to a separate function to avoid duplicating codeHesham Almatary1-11/+7
Currently it's being used by both enter_supervisor_mode and enter_machine_mode
2018-07-12bbl: boot payload in machine mode when --enable-boot-machine is passedHesham Almatary3-0/+33
2018-07-11Merge pull request #113 from riscv/licensePalmer Dabbelt1-29/+34
Upgrade SoftFloat
2018-07-11Merge pull request #103 from zongbox/commentPalmer Dabbelt1-1/+1
Correct the comment of timer interrupt
2018-07-11Upgrade to SoftFloat 3eAndrew Waterman1-29/+34
2018-07-09Properly license all nontrivial filesAndrew Waterman28-0/+56
2018-06-20Fix problem of casting u64 to void* on 32-bit environment (#111)Zong Li1-2/+2
Can't cast to pointer from 64 bit size integer directly on 32 bit environment.
2018-05-22RISC-V: Support separate firmware and kernel payloadMichael Clark3-0/+65
Support for separate firmware and kernel payload is added by updating BBL to read optional preloaded kernel address attributes from device-tree using a similar mechanism to that used to pass init ramdisk addresses to linux kernel. chosen { riscv,kernel-start = <0x00000000 0x80200000>; riscv,kernel-end = <0x00000000 0x80590634>; }; These attributes are added by QEMU and read by BBL when combining -bios <firmware-image> and -kernel <kernel-image> options. e.g. $ qemu-system-riscv64 -machine virt -bios bbl -kernel vmlinux With this change, bbl can be compiled without --with-payload and the dummy payload alignment is altered to make the memory footprint of the firmware-only bbl smaller. The dummy payload message is updated to indicate the alternative load method. This load method could also be supported by a first stage boot loader that reads seperate firmware and kernel from SPI flash. The main advantage of this new mechanism is that it eases kernel development by avoiding the riscv-pk packaging step after kernel builds, makes building per repository artefacts for CI simpler, and mimics bootloaders on other platforms that can load a kernel image file directly. Ultimately BBL should use an SPI driver to load the kernel image however this mechanism supports use cases such such as QEMU's -bios, -kernel and -initrd options following examples from other platforms that pass kernel entry to firmware via device-tree. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-05-21machine,minit: initialize emulated FCSR in enter_supervisor_mode() (#106)Zihao Yu1-0/+4
* If BBL emulates the FPU, the trap handler will load emulated FCSR from x0's save slot into tp. The emulated FCSR should be initialized, else the field of rounding mode will contain garbage codes. This will lead to raising SIGABRT for a user mode program which tries to print a floating point variable. In glibc, __printf_fp_l() (defined in riscv-glibc/stdio-common/printf_fp.c) will call round_away() (defined in riscv-glibc/include/rounding-mode.h). With a garbage rounding mode in emulated FCSR, round_away() may call abort().
2018-05-15Fix for missing supervisor mode when running on E51 (#96)Jim Straus1-3/+10
The E51 core on the U54-MC lacks supervisor mode, thus the plic_s_ie and plic_s_thresh are NULL when running on this core. This adds checks for this case.
2018-05-09Correct the comment of timer interruptZong Li1-1/+1
2018-04-27Fix typo of perf counter (#100)Zong Li1-2/+2
2018-04-10SBI emulation of reads and writes to perf counters and config (#98)Alex Solomatnikov1-0/+58
2018-04-09Fix the wrong access of ipi pending address (#99)Zong Li1-2/+2
The MENTRY_IPI_PENDING_OFFSET offset is based on stack pointer
2018-03-20minit: insert printm as work-around for a race conditionWesley W. Terpstra1-0/+1
Reboot does not work reliably without this.
2018-03-05mtrap: add a halt IPI used for poweroff (#86)Wesley W. Terpstra3-11/+18
Otherwise, linux complains the moment an interrupt arrives and wakes up one of the not-looping cores.
2018-01-22mtrap: loop forever, reallyWesley W. Terpstra1-1/+1
gcc sometimes takes liberties with optimizing away our important halt function!
2018-01-22Boot on the first hartPalmer Dabbelt1-9/+2
This code is broken, and it's left over from before we could read the DTB to find harts to boot on.
2018-01-09Remove the repeating bitmask of medeleg register (#74)Zong Li1-1/+0
2017-12-16Merge pull request #73 from riscv/flush_icachePalmer Dabbelt2-0/+4
Add __riscv_flush_icache
2017-12-13Add __riscv_flush_icachePalmer Dabbelt2-0/+4
For BBL's purposes a local i-cache flush should be sufficient.
2017-12-12Add a 16550 UART driver to back the SBI consolePalmer Dabbelt5-0/+95
QEMU currently provides the console via HTIF and the SBI. That's a bit messy because BBL polls for serial input, which means that typing too quickly loses characters. While QEMU has a standard 16550 device model, there's no way to have two consoles share the console in QEMU (as they'd step all over each other) so that means we can't have both the HTIF console and the 16550 console. With this patch, QEMU can be changed to use a 16650 instead of the HTIF for serial output. Linux will use the SBI for early printk support (which is fine, polling for output is stable) and then swap over as soon as it detects the UART. When Linux swaps it prints out the whole history, but there's probably a way to get around that. There's a few lines that are output to both, but it appears the Linux driver is close enough to ours that nothing catastrophic happens -- there's not much to the device, so hopefully that pans out on real hardware too. Once Linux swaps over to natively using the driver we get reliable console input. If you don't have the in-kernel driver then Linux never swaps over and keeps using the SBI console just like before.
2017-12-12Bump encoding.hAndrew Waterman2-22/+25
2017-11-03Remove the platform interfacePalmer Dabbelt5-6/+58
We now automatically detect everything that the platform interface used to be used for, so it's now obsolete!
2017-11-02Check if we have extensions before using themPalmer Dabbelt1-5/+12
2017-11-02Initialize the UART firstPalmer Dabbelt1-3/+3
Without this I can't get printf to show me debug info during early boot.
2017-11-02Detect harts that can't boot Linux instead of hard-coding themPalmer Dabbelt6-10/+34
This checks to see if a hart can't boot Linux by looking for a compatible "mmu-type" field. If the hart can't boot Linux, then bbl masks it off.
2017-11-01Fix(?) fcvt.s.w emulation for rs1 = -2^31 (#66)Andrew Waterman1-1/+1
2017-10-23Make 4-byte aligned instruction-emulation loads atomicAndrew Waterman1-3/+12
Per the Unix-class platform spec
2017-08-14finisher: support terminating sifive devices simulation (#61)Wesley W. Terpstra6-4/+84
2017-08-03Add the '--enable-print-device-tree' argumentPalmer Dabbelt4-4/+142
I'm trying to debug some device tree problems while booting Linux and figured it would be really nice to have access to the device tree while trying to debug these problems. I think this might be useful for lots of people, so I went ahead and cleaned up the code enough that it should actaully work in most cases.
2017-08-02Move DISABLED_HART_MASK to the platformPalmer Dabbelt4-9/+10
Some platforms can't boot Linux on all the harts. This commit allows platforms to define the set of harts that should be prevented from booting past BBL. This is essentially just a new mechanism for defining the DISABLED_HART_MASK.
2017-08-02Allow the platform to disable HTIFPalmer Dabbelt1-3/+10
2017-08-02Add a platform interfacePalmer Dabbelt1-0/+1
SiFive's pk fork is the second one I've had to maintain, and it's a huge pain because people keep just leaving changes all over the tree. I want to introduce an interface that the platform-specific details can live behind so I don't have to keep doing these painful merges.
2017-07-17Fix emulation of misaligned RVC loads/storesAndrew Waterman1-2/+5
We were accidentally advancing the PC by 4, not 2.
2017-05-04FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.XAndrew Waterman2-11/+8
2017-04-18Use uint64_t, not uintptr_t, to represent FDT addresses/sizesAndrew Waterman3-21/+24
This fixes RV32 pk.
2017-04-18Fix RV32 compilation errorAndrew Waterman1-1/+2
2017-04-11Always write sbadaddr on trap redirectionAndrew Waterman3-6/+6
2017-04-11Load instructions as unsigned values, not signedAndrew Waterman1-4/+4
This matches the behavior of mbabaddr/mtval.
2017-04-06mtrap: allow override of DISABLED_HART_MASK from CFLAGSWesley W. Terpstra1-0/+2
2017-04-05Remove num_harts; use hart_mask exclusivelyAndrew Waterman4-6/+5
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