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| author | Andrew Waterman <andrew@sifive.com> | 2018-12-02 17:14:16 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2018-12-02 17:17:41 -0800 |
| commit | 92434c4f697564929f2ceb724bc82d3b6bc58879 (patch) | |
| tree | b272ccf808b847179b9110da4f522eea1db32c6a /machine | |
| parent | f579c48e909acf34c053a15ff1e79f82024a28bb (diff) | |
| download | pk-92434c4f697564929f2ceb724bc82d3b6bc58879.zip pk-92434c4f697564929f2ceb724bc82d3b6bc58879.tar.gz pk-92434c4f697564929f2ceb724bc82d3b6bc58879.tar.bz2 | |
Delegate misaligned AMOs as access exceptions, not misaligned
This indicates the access is actually invalid, i.e., should not
be emulated.
Diffstat (limited to 'machine')
| -rw-r--r-- | machine/misaligned_ldst.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/machine/misaligned_ldst.c b/machine/misaligned_ldst.c index a44195b..a187d25 100644 --- a/machine/misaligned_ldst.c +++ b/machine/misaligned_ldst.c @@ -64,8 +64,11 @@ void misaligned_load_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) # endif # endif #endif - else + else { + mcause = CAUSE_LOAD_ACCESS; + write_csr(mcause, mcause); return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); + } val.int64 = 0; for (intptr_t i = 0; i < len; i++) @@ -128,8 +131,11 @@ void misaligned_store_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) # endif # endif #endif - else + else { + mcause = CAUSE_STORE_ACCESS; + write_csr(mcause, mcause); return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); + } uintptr_t addr = read_csr(mbadaddr); for (int i = 0; i < len; i++) |