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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-10 00:42:41 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-10 00:42:41 -0800 |
| commit | 8bd01c7999a1ba98e556492950d76789fe41462b (patch) | |
| tree | 0240888db42005b1a45379426fb914daaa08150d /machine | |
| parent | f16e9311bf09be32b2cd7f5e988cd60a6f395f7c (diff) | |
| download | pk-8bd01c7999a1ba98e556492950d76789fe41462b.zip pk-8bd01c7999a1ba98e556492950d76789fe41462b.tar.gz pk-8bd01c7999a1ba98e556492950d76789fe41462b.tar.bz2 | |
Update encoding
Diffstat (limited to 'machine')
| -rw-r--r-- | machine/encoding.h | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/machine/encoding.h b/machine/encoding.h index f2fab36..6139bb0 100644 --- a/machine/encoding.h +++ b/machine/encoding.h @@ -132,22 +132,28 @@ asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \ __tmp; }) -#define write_csr(reg, val) \ - asm volatile ("csrw " #reg ", %0" :: "r"(val)) +#define write_csr(reg, val) ({ \ + if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \ + asm volatile ("csrw " #reg ", %0" :: "i"(val)); \ + else \ + asm volatile ("csrw " #reg ", %0" :: "r"(val)); }) -#define swap_csr(reg, val) ({ long __tmp; \ - asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \ +#define swap_csr(reg, val) ({ unsigned long __tmp; \ + if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \ + asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \ + else \ + asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \ __tmp; }) #define set_csr(reg, bit) ({ unsigned long __tmp; \ - if (__builtin_constant_p(bit) && (bit) < 32) \ + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \ else \ asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \ __tmp; }) #define clear_csr(reg, bit) ({ unsigned long __tmp; \ - if (__builtin_constant_p(bit) && (bit) < 32) \ + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \ else \ asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \ |