Move DRAM to high addresses

8 files changed, 28 insertions, 13 deletions

diff --git a/machine/bits.h b/machine/bits.h
index 72514ae..e550f80 100644
--- a/machine/bits.h
+++ b/machine/bits.h
@@ -21,11 +21,13 @@
 # define SLL32    sllw
 # define STORE    sd
 # define LOAD     ld
+# define LWU      lwu
 # define LOG_REGBYTES 3
 #else
 # define SLL32    sll
 # define STORE    sw
 # define LOAD     lw
+# define LWU      lw
 # define LOG_REGBYTES 2
 #endif
 #define REGBYTES (1 << LOG_REGBYTES)
diff --git a/machine/configstring.c b/machine/configstring.c
index d2f2a84..e134398 100644
--- a/machine/configstring.c
+++ b/machine/configstring.c
@@ -8,6 +8,7 @@ static void query_mem(const char* config_string)
   query_result res = query_config_string(config_string, "ram{0{addr");
   assert(res.start);
   uintptr_t base = get_uint(res);
+  assert(base == DRAM_BASE);
   res = query_config_string(config_string, "ram{0{size");
   mem_size = get_uint(res);
 }
@@ -46,7 +47,7 @@ static void query_harts(const char* config_string)
 
 void parse_config_string()
 {
-  const char* s = (const char*)read_csr(mcfgaddr);
+  const char* s = *(const char* const*)CONFIG_STRING_ADDR;
   query_mem(s);
   query_rtc(s);
   query_harts(s);
diff --git a/machine/emulation.c b/machine/emulation.c
index 70169fd..ad74fb4 100644
--- a/machine/emulation.c
+++ b/machine/emulation.c
@@ -75,8 +75,8 @@ void illegal_insn_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc)
 
   write_csr(mepc, mepc + 4);
 
-  extern int32_t illegal_insn_trap_table[];
-  int32_t* pf = (void*)illegal_insn_trap_table + (insn & 0x7c);
+  extern uint32_t illegal_insn_trap_table[];
+  uint32_t* pf = (void*)illegal_insn_trap_table + (insn & 0x7c);
   emulation_func f = (emulation_func)(uintptr_t)*pf;
   f(regs, mcause, mepc, mstatus, insn);
 }
diff --git a/machine/encoding.h b/machine/encoding.h
index b219309..5cb7ff5 100644
--- a/machine/encoding.h
+++ b/machine/encoding.h
@@ -67,9 +67,12 @@
 #define IRQ_COP      12
 #define IRQ_HOST     13
 
-#define DEFAULT_RSTVEC 0x0
-#define DEFAULT_NMIVEC 0x4
-#define DEFAULT_MTVEC  0x8
+#define DEFAULT_RSTVEC     0x00001000
+#define DEFAULT_NMIVEC     0x00001004
+#define DEFAULT_MTVEC      0x00001010
+#define CONFIG_STRING_ADDR 0x0000100C
+#define EXT_IO_BASE        0x40000000
+#define DRAM_BASE          0x80000000
 
 // page table entry (PTE) fields
 #define PTE_V     0x001 // Valid
@@ -668,13 +671,13 @@
 #define CSR_MSTIME_DELTA 0x705
 #define CSR_MSINSTRET_DELTA 0x706
 #define CSR_MCYCLE 0xf00
+#define CSR_MTIME 0xf01
 #define CSR_MINSTRET 0xf02
 #define CSR_MISA 0xf10
 #define CSR_MVENDORID 0xf11
 #define CSR_MARCHID 0xf12
 #define CSR_MIMPID 0xf13
-#define CSR_MCFGADDR 0xf14
-#define CSR_MHARTID 0xf15
+#define CSR_MHARTID 0xf14
 #define CSR_MTOHOST 0x7c0
 #define CSR_MFROMHOST 0x7c1
 #define CSR_MRESET 0x7c2
@@ -688,6 +691,7 @@
 #define CSR_MSTIME_DELTAH 0x785
 #define CSR_MSINSTRET_DELTAH 0x786
 #define CSR_MCYCLEH 0xf80
+#define CSR_MTIMEH 0xf81
 #define CSR_MINSTRETH 0xf82
 #define CAUSE_MISALIGNED_FETCH 0x0
 #define CAUSE_FAULT_FETCH 0x1
@@ -972,12 +976,12 @@ DECLARE_CSR(mscycle_delta, CSR_MSCYCLE_DELTA)
 DECLARE_CSR(mstime_delta, CSR_MSTIME_DELTA)
 DECLARE_CSR(msinstret_delta, CSR_MSINSTRET_DELTA)
 DECLARE_CSR(mcycle, CSR_MCYCLE)
+DECLARE_CSR(mtime, CSR_MTIME)
 DECLARE_CSR(minstret, CSR_MINSTRET)
 DECLARE_CSR(misa, CSR_MISA)
 DECLARE_CSR(mvendorid, CSR_MVENDORID)
 DECLARE_CSR(marchid, CSR_MARCHID)
 DECLARE_CSR(mimpid, CSR_MIMPID)
-DECLARE_CSR(mcfgaddr, CSR_MCFGADDR)
 DECLARE_CSR(mhartid, CSR_MHARTID)
 DECLARE_CSR(mtohost, CSR_MTOHOST)
 DECLARE_CSR(mfromhost, CSR_MFROMHOST)
@@ -992,6 +996,7 @@ DECLARE_CSR(mscycle_deltah, CSR_MSCYCLE_DELTAH)
 DECLARE_CSR(mstime_deltah, CSR_MSTIME_DELTAH)
 DECLARE_CSR(msinstret_deltah, CSR_MSINSTRET_DELTAH)
 DECLARE_CSR(mcycleh, CSR_MCYCLEH)
+DECLARE_CSR(mtimeh, CSR_MTIMEH)
 DECLARE_CSR(minstreth, CSR_MINSTRETH)
 #endif
 #ifdef DECLARE_CAUSE
diff --git a/machine/fp_emulation.c b/machine/fp_emulation.c
index 7523a29..f1ed919 100644
--- a/machine/fp_emulation.c
+++ b/machine/fp_emulation.c
@@ -45,8 +45,8 @@ DECLARE_EMULATION_FUNC(emulate_fp)
   if (unlikely((mstatus & MSTATUS_FS) == 0))
     return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
 
-  extern int32_t fp_emulation_table[];
-  int32_t* pf = (void*)fp_emulation_table + ((insn >> 25) & 0x7c);
+  extern uint32_t fp_emulation_table[];
+  uint32_t* pf = (void*)fp_emulation_table + ((insn >> 25) & 0x7c);
   emulation_func f = (emulation_func)(uintptr_t)*pf;
 
   SETUP_STATIC_ROUNDING(insn);
diff --git a/machine/machine.mk.in b/machine/machine.mk.in
index 4628954..6568dc5 100644
--- a/machine/machine.mk.in
+++ b/machine/machine.mk.in
@@ -4,6 +4,7 @@ machine_subproject_deps = \
 machine_hdrs = \
   atomic.h \
   bits.h \
+  configstring.h \
   emulation.h \
   encoding.h \
   fp_emulation.h \
diff --git a/machine/mentry.S b/machine/mentry.S
index 49f163b..bbc1c2a 100644
--- a/machine/mentry.S
+++ b/machine/mentry.S
@@ -89,7 +89,7 @@ trap_vector:
   STORE t2, 7*REGBYTES(sp)
   add t1, t0, t1                   # t1 <- %hi(trap_table)[mcause]
   STORE s0, 8*REGBYTES(sp)
-  lw t1, %pcrel_lo(1b)(t1)         # t1 <- trap_table[mcause]
+  LWU t1, %pcrel_lo(1b)(t1)         # t1 <- trap_table[mcause]
   STORE s1, 9*REGBYTES(sp)
   mv a0, sp                        # a0 <- regs
   STORE a2,12*REGBYTES(sp)
@@ -223,6 +223,12 @@ do_reset:
   li x31, 0
   csrw mscratch, x0
 
+  # write mtvec and make sure it sticks
+  la t0, trap_vector
+  csrw mtvec, t0
+  csrr t1, mtvec
+1:bne t0, t1, 1b
+
   # sp <- end of first full page after the end of the binary
   la sp, _end + 2*RISCV_PGSIZE - 1
   li t0, -RISCV_PGSIZE
diff --git a/machine/sbi_impl.c b/machine/sbi_impl.c
index 07844e0..f5ed8c9 100644
--- a/machine/sbi_impl.c
+++ b/machine/sbi_impl.c
@@ -5,7 +5,7 @@ uintptr_t __sbi_query_memory(uintptr_t id, memory_block_info *p)
 {
   if (id == 0) {
     p->base = first_free_paddr;
-    p->size = mem_size - p->base;
+    p->size = mem_size + DRAM_BASE - p->base;
     return 0;
   }