diff options
Diffstat (limited to 'include/elf')
| -rw-r--r-- | include/elf/ChangeLog | 44 | ||||
| -rw-r--r-- | include/elf/common.h | 11 | ||||
| -rw-r--r-- | include/elf/cr16c.h | 258 | ||||
| -rw-r--r-- | include/elf/crx.h | 50 | ||||
| -rw-r--r-- | include/elf/m32r.h | 5 | ||||
| -rw-r--r-- | include/elf/mips.h | 9 | ||||
| -rw-r--r-- | include/elf/sh.h | 72 |
7 files changed, 401 insertions, 48 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 385b857..5563ddb 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,47 @@ +2004-07-06 Tomer Levi <Tomer.Levi@nsc.com> + + * common.h (EM_CRX): Define. + * crx.h: New file. + +2004-06-25 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> + + * m32r.h: Add defintions of R_M32R_GOTOFF_HI_ULO, + R_M32R_GOTOFF_HI_SLO and R_M32R_GOTOFF_LO. + +2004-06-19 Alan Modra <amodra@bigpond.net.au> + + * common.h (ELF64_R_INFO): Warning fix. + +2004-06-14 Chris Demetriou <cgd@broadcom.com> + + * mips.h (R_MIPS_PC32): Add back (undoing removal on 2004-04-24), + with an updated comment. + +2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com> + + * sh.h (EF_SH_HAS_DSP): Remove. + (EF_SH_HAS_FP): Remove. + (EF_SH_MERGE_MACH): Remove. + (EF_SH4_NOFPU): Convert to decimal. + (EF_SH4A_NOFPU): Likewise. + (EF_SH4_NOMMU_NOFPU): Likewise. + (EF_SH3_NOMMU): Add new macro. + (EF_SH_BFD_TABLE): Likewise. + (sh_find_elf_flags): Add prototype. + (sh_elf_get_flags_from_mach): Likewise. + +2004-04-24 Chris Demetriou <cgd@broadcom.com> + + * mips.h (R_MIPS_PC32, R_MIPS_PC64, R_MIPS_GNU_REL_LO16) + (R_MIPS_GNU_REL_HI16): Remove. + (R_MIPS_GNU_REL16_S2): Update comment. + +2004-30-30 Galit Heller <Galit.Heller@nsc.com> + Tomer Levi <Tomer.Levi@nsc.com> + + * common.h (EM_CR): Define. + * cr16c.h: New file. + 2004-03-23 Paul Brook <paul@codesourcery.com> * arm.h (EF_ERM_BE8, EF_ARM_LE8, EF_ARM_EABI_VER3): Add. diff --git a/include/elf/common.h b/include/elf/common.h index bf233f6..5573fca 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -1,6 +1,6 @@ /* ELF support for BFD. Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003 + 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Written by Fred Fish @ Cygnus Support, from information published @@ -180,7 +180,9 @@ #define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ #define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ #define EM_IP2K 101 /* Ubicom IP2022 micro controller */ +#define EM_CR 103 /* National Semiconductor CompactRISC */ #define EM_MSP430 105 /* TI msp430 micro controller */ +#define EM_CRX 114 /* National Semiconductor CRX */ /* If it is necessary to assign new unofficial EM_* values, please pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision @@ -287,8 +289,9 @@ #define PT_LOPROC 0x70000000 /* Processor-specific */ #define PT_HIPROC 0x7FFFFFFF /* Processor-specific */ -#define PT_GNU_EH_FRAME (PT_LOOS + 0x474e550) -#define PT_GNU_STACK (PT_LOOS + 0x474e551) +#define PT_GNU_EH_FRAME (PT_LOOS + 0x474e550) /* Frame unwind information */ +#define PT_GNU_STACK (PT_LOOS + 0x474e551) /* Stack flags */ +#define PT_GNU_RELRO (PT_LOOS + 0x474e552) /* Read-only after relocation */ /* Program segment permissions, in program header p_flags field. */ @@ -493,7 +496,7 @@ #define ELF64_R_SYM(i) ((i) >> 32) #define ELF64_R_TYPE(i) ((i) & 0xffffffff) -#define ELF64_R_INFO(s,t) (((bfd_vma) (s) << 32) + (bfd_vma) (t)) +#define ELF64_R_INFO(s,t) (((bfd_vma) (s) << 31 << 1) + (bfd_vma) (t)) /* Dynamic section tags. */ diff --git a/include/elf/cr16c.h b/include/elf/cr16c.h new file mode 100644 index 0000000..1a91afe --- /dev/null +++ b/include/elf/cr16c.h @@ -0,0 +1,258 @@ +/* CR16C ELF support for BFD. + Copyright 2004 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _ELF_CR16C_H +#define _ELF_CR16C_H + +#include "bfd.h" +#include "elf/reloc-macros.h" + +/* Creating indices for reloc_map_index array. */ +START_RELOC_NUMBERS (elf_cr16c_reloc_type) + RELOC_NUMBER (RINDEX_16C_NUM08, 0) + RELOC_NUMBER (RINDEX_16C_NUM08_C, 1) + RELOC_NUMBER (RINDEX_16C_NUM16, 2) + RELOC_NUMBER (RINDEX_16C_NUM16_C, 3) + RELOC_NUMBER (RINDEX_16C_NUM32, 4) + RELOC_NUMBER (RINDEX_16C_NUM32_C, 5) + RELOC_NUMBER (RINDEX_16C_DISP04, 6) + RELOC_NUMBER (RINDEX_16C_DISP04_C, 7) + RELOC_NUMBER (RINDEX_16C_DISP08, 8) + RELOC_NUMBER (RINDEX_16C_DISP08_C, 9) + RELOC_NUMBER (RINDEX_16C_DISP16, 10) + RELOC_NUMBER (RINDEX_16C_DISP16_C, 11) + RELOC_NUMBER (RINDEX_16C_DISP24, 12) + RELOC_NUMBER (RINDEX_16C_DISP24_C, 13) + RELOC_NUMBER (RINDEX_16C_DISP24a, 14) + RELOC_NUMBER (RINDEX_16C_DISP24a_C, 15) + RELOC_NUMBER (RINDEX_16C_REG04, 16) + RELOC_NUMBER (RINDEX_16C_REG04_C, 17) + RELOC_NUMBER (RINDEX_16C_REG04a, 18) + RELOC_NUMBER (RINDEX_16C_REG04a_C, 19) + RELOC_NUMBER (RINDEX_16C_REG14, 20) + RELOC_NUMBER (RINDEX_16C_REG14_C, 21) + RELOC_NUMBER (RINDEX_16C_REG16, 22) + RELOC_NUMBER (RINDEX_16C_REG16_C, 23) + RELOC_NUMBER (RINDEX_16C_REG20, 24) + RELOC_NUMBER (RINDEX_16C_REG20_C, 25) + RELOC_NUMBER (RINDEX_16C_ABS20, 26) + RELOC_NUMBER (RINDEX_16C_ABS20_C, 27) + RELOC_NUMBER (RINDEX_16C_ABS24, 28) + RELOC_NUMBER (RINDEX_16C_ABS24_C, 29) + RELOC_NUMBER (RINDEX_16C_IMM04, 30) + RELOC_NUMBER (RINDEX_16C_IMM04_C, 31) + RELOC_NUMBER (RINDEX_16C_IMM16, 32) + RELOC_NUMBER (RINDEX_16C_IMM16_C, 33) + RELOC_NUMBER (RINDEX_16C_IMM20, 34) + RELOC_NUMBER (RINDEX_16C_IMM20_C, 35) + RELOC_NUMBER (RINDEX_16C_IMM24, 36) + RELOC_NUMBER (RINDEX_16C_IMM24_C, 37) + RELOC_NUMBER (RINDEX_16C_IMM32, 38) + RELOC_NUMBER (RINDEX_16C_IMM32_C, 39) +END_RELOC_NUMBERS (RINDEX_16C_MAX) + +/* CR16C Relocation Types ('cr_reloc_type' entry in the reloc_map structure). + The relocation constant name is determined as follows : + + R_16C_<format><size>[_C] + + Where : + + <format> is one of the following: + NUM - R_NUMBER mnemonic, + DISP - R_16C_DISPL mnemonic, + REG - R_16C_REGREL mnemonic, + ABS - R_16C_ABS mnemonic, + IMM - R_16C_IMMED mnemonic, + <size> stands for R_S_16C_<size> + _C means 'code label' and is only added when R_ADDRTYPE subfield + is of type R_CODE_ADDR. */ + +/* The table below shows what the hex digits in the definition of the + relocation type constants correspond to. + ------------------------------------------------------------------ + R_SIZESP R_FORMAT R_RELTO R_ADDRTYPE + ------------------------------------------------------------------ */ +/* R_S_16C_08 R_NUMBER R_ABS R_ADDRESS */ +#define R_16C_NUM08 0X0001 + +/* R_S_16C_08 R_NUMBER R_ABS R_CODE_ADDR */ +#define R_16C_NUM08_C 0X0006 + +/* R_S_16C_16 R_NUMBER R_ABS R_ADDRESS */ +#define R_16C_NUM16 0X1001 + +/* R_S_16C_16 R_NUMBER R_ABS R_CODE_ADDR */ +#define R_16C_NUM16_C 0X1006 + +/* R_S_16C_32 R_NUMBER R_ABS R_ADDRESS */ +#define R_16C_NUM32 0X2001 + +/* R_S_16C_32 R_NUMBER R_ABS R_CODE_ADDR */ +#define R_16C_NUM32_C 0X2006 + +/* R_S_16C_04 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP04 0X5411 + +/* R_S_16C_04 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP04_C 0X5416 + +/* R_S_16C_08 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP08 0X0411 + +/* R_S_16C_08 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP08_C 0X0416 + +/* R_S_16C_16 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP16 0X1411 + +/* R_S_16C_16 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP16_C 0X1416 + +/* R_S_16C_24 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP24 0X7411 + +/* R_S_16C_24 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP24_C 0X7416 + +/* R_S_16C_24a R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP24a 0X6411 + +/* R_S_16C_24a R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP24a_C 0X6416 + +/* R_S_16C_04 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG04 0X5201 + +/* R_S_16C_04 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG04_C 0X5206 + +/* R_S_16C_04_a R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG04a 0X4201 + +/* R_S_16C_04_a R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG04a_C 0X4206 + +/* R_S_16C_14 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG14 0X3201 + +/* R_S_16C_14 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG14_C 0X3206 + +/* R_S_16C_16 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG16 0X1201 + +/* R_S_16C_16 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG16_C 0X1206 + +/* R_S_16C_20 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG20 0X8201 + +/* R_S_16C_20 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG20_C 0X8206 + +/* R_S_16C_20 R_16C_ABS R_ABS R_ADDRESS */ +#define R_16C_ABS20 0X8101 + +/* R_S_16C_20 R_16C_ABS R_ABS R_CODE_ADDR */ +#define R_16C_ABS20_C 0X8106 + +/* R_S_16C_24 R_16C_ABS R_ABS R_ADDRESS */ +#define R_16C_ABS24 0X7101 + +/* R_S_16C_24 R_16C_ABS R_ABS R_CODE_ADDR */ +#define R_16C_ABS24_C 0X7106 + +/* R_S_16C_04 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM04 0X5301 + +/* R_S_16C_04 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM04_C 0X5306 + +/* R_S_16C_16 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM16 0X1301 + +/* R_S_16C_16 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM16_C 0X1306 + +/* R_S_16C_20 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM20 0X8301 + +/* R_S_16C_20 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM20_C 0X8306 + +/* R_S_16C_24 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM24 0X7301 + +/* R_S_16C_24 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM24_C 0X7306 + +/* R_S_16C_32 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM32 0X2301 + +/* R_S_16C_32 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM32_C 0X2306 + + +/* Relocation item type. */ +#define R_ADDRTYPE 0x000f +#define R_ADDRESS 0x0001 /* Take address of symbol. */ +#define R_CODE_ADDR 0x0006 /* Take address of symbol divided by 2. */ + +/* Relocation action. */ +#define R_RELTO 0x00f0 +#define R_ABS 0x0000 /* Keep symbol's address as such. */ +#define R_PCREL 0x0010 /* Subtract the pc address of hole. */ + +/* Relocation item data format. */ +#define R_FORMAT 0x0f00 +#define R_NUMBER 0x0000 /* Retain as two's complement value. */ +#define R_16C_DISPL 0x0400 /* CR16C displacement type. */ +#define R_16C_ABS 0x0100 /* CR16C absolute type. */ +#define R_16C_REGREL 0x0200 /* CR16C register-relative type. */ +#define R_16C_IMMED 0x0300 /* CR16C immediate type. */ + +/* Relocation item size. */ +#define R_SIZESP 0xf000 +#define R_S_16C_04 0x5000 +#define R_S_16C_04_a 0x4000 +#define R_S_16C_08 0x0000 +#define R_S_16C_14 0x3000 +#define R_S_16C_16 0x1000 +#define R_S_16C_20 0x8000 +#define R_S_16C_24_a 0x6000 +#define R_S_16C_24 0x7000 +#define R_S_16C_32 0x2000 + + +/* Processor specific section indices. These sections do not actually + exist. Symbols with a st_shndx field corresponding to one of these + values have a special meaning. */ + +/* Far common symbol. */ +#define SHN_CR16C_FCOMMON 0xff00 +#define SHN_CR16C_NCOMMON 0xff01 + +typedef struct reloc_map +{ + unsigned short cr_reloc_type; /* CR relocation type. */ + bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */ +} RELOC_MAP; + +#endif /* _ELF_CR16C_H */ diff --git a/include/elf/crx.h b/include/elf/crx.h new file mode 100644 index 0000000..755a610 --- /dev/null +++ b/include/elf/crx.h @@ -0,0 +1,50 @@ +/* CRX ELF support for BFD. + Copyright 2004 Free Software Foundation, Inc. + Contributed by Tomer Levi, NSC, Israel. + Originally written for GAS 2.12 by Tomer Levi, NSC, Israel. + Updates, BFDizing, GNUifying and ELF support by Tomer Levi. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _ELF_CRX_H +#define _ELF_CRX_H + +#include "elf/reloc-macros.h" + +/* Creating indices for reloc_map_index array. */ +START_RELOC_NUMBERS(elf_crx_reloc_type) + RELOC_NUMBER (R_CRX_NONE, 0) + RELOC_NUMBER (R_CRX_REL4, 1) + RELOC_NUMBER (R_CRX_REL8, 2) + RELOC_NUMBER (R_CRX_REL8_CMP, 3) + RELOC_NUMBER (R_CRX_REL16, 4) + RELOC_NUMBER (R_CRX_REL24, 5) + RELOC_NUMBER (R_CRX_REL32, 6) + RELOC_NUMBER (R_CRX_REGREL12, 7) + RELOC_NUMBER (R_CRX_REGREL22, 8) + RELOC_NUMBER (R_CRX_REGREL28, 9) + RELOC_NUMBER (R_CRX_REGREL32, 10) + RELOC_NUMBER (R_CRX_ABS16, 11) + RELOC_NUMBER (R_CRX_ABS32, 12) + RELOC_NUMBER (R_CRX_NUM8, 13) + RELOC_NUMBER (R_CRX_NUM16, 14) + RELOC_NUMBER (R_CRX_NUM32, 15) + RELOC_NUMBER (R_CRX_IMM16, 16) + RELOC_NUMBER (R_CRX_IMM32, 17) +END_RELOC_NUMBERS(R_CRX_MAX) + +#endif /* _ELF_CRX_H */ diff --git a/include/elf/m32r.h b/include/elf/m32r.h index 709d792..6441efe 100644 --- a/include/elf/m32r.h +++ b/include/elf/m32r.h @@ -1,5 +1,5 @@ /* M32R ELF support for BFD. - Copyright 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -67,6 +67,9 @@ START_RELOC_NUMBERS (elf_m32r_reloc_type) RELOC_NUMBER (R_M32R_GOTPC_HI_ULO, 59) RELOC_NUMBER (R_M32R_GOTPC_HI_SLO, 60) RELOC_NUMBER (R_M32R_GOTPC_LO, 61) + RELOC_NUMBER (R_M32R_GOTOFF_HI_ULO, 62) + RELOC_NUMBER (R_M32R_GOTOFF_HI_SLO, 63) + RELOC_NUMBER (R_M32R_GOTOFF_LO, 64) END_RELOC_NUMBERS (R_M32R_max) /* Processor specific section indices. These sections do not actually diff --git a/include/elf/mips.h b/include/elf/mips.h index ce43158..b7d800a 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -76,12 +76,13 @@ START_RELOC_NUMBERS (elf_mips_reloc_type) /* These relocs are used for the mips16. */ RELOC_NUMBER (R_MIPS16_26, 100) RELOC_NUMBER (R_MIPS16_GPREL, 101) - /* These are GNU extensions to handle embedded-pic. */ + /* This was a GNU extension used by embedded-PIC. It was co-opted by + mips-linux for exception-handling data. It is no longer used, but + should continue to be supported by the linker for backward + compatibility. (GCC stopped using it in May, 2004.) */ RELOC_NUMBER (R_MIPS_PC32, 248) - RELOC_NUMBER (R_MIPS_PC64, 249) + /* FIXME: this relocation is used internally by gas. */ RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250) - RELOC_NUMBER (R_MIPS_GNU_REL_LO16, 251) - RELOC_NUMBER (R_MIPS_GNU_REL_HI16, 252) /* These are GNU extensions to enable C++ vtable garbage collection. */ RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253) RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254) diff --git a/include/elf/sh.h b/include/elf/sh.h index c46a5ff..bab0928 100644 --- a/include/elf/sh.h +++ b/include/elf/sh.h @@ -27,57 +27,51 @@ #define EF_SH1 1 #define EF_SH2 2 #define EF_SH3 3 -#define EF_SH_HAS_DSP(flags) (((flags) & EF_SH_MACH_MASK & ~3) == 4) #define EF_SH_DSP 4 #define EF_SH3_DSP 5 #define EF_SH4AL_DSP 6 -#define EF_SH_HAS_FP(flags) ((flags) & 8) #define EF_SH3E 8 #define EF_SH4 9 #define EF_SH2E 11 #define EF_SH4A 12 -#define EF_SH4_NOFPU 0x10 -#define EF_SH4A_NOFPU 0x11 -#define EF_SH4_NOMMU_NOFPU 0x12 +#define EF_SH4_NOFPU 16 +#define EF_SH4A_NOFPU 17 +#define EF_SH4_NOMMU_NOFPU 18 +#define EF_SH3_NOMMU 20 /* This one can only mix in objects from other EF_SH5 objects. */ #define EF_SH5 10 -#define EF_SH_MERGE_MACH(mach1, mach2) \ - (((((mach1) == EF_SH3 || (mach1) == EF_SH_UNKNOWN) && (mach2) == EF_SH_DSP) \ - || ((mach1) == EF_SH_DSP \ - && ((mach2) == EF_SH3 || (mach2) == EF_SH_UNKNOWN))) \ - ? EF_SH3_DSP \ - : (((mach1) < EF_SH3 && (mach2) == EF_SH_UNKNOWN) \ - || ((mach2) < EF_SH3 && (mach1) == EF_SH_UNKNOWN)) \ - ? EF_SH3 \ - : ((mach1) == EF_SH2E && EF_SH_HAS_FP (mach2)) \ - ? (mach2) \ - : ((mach2) == EF_SH2E && EF_SH_HAS_FP (mach1)) \ - ? (mach1) \ - : (((mach1) == EF_SH2E && (mach2) == EF_SH_UNKNOWN) \ - || ((mach2) == EF_SH2E && (mach1) == EF_SH_UNKNOWN)) \ - ? EF_SH2E \ - : (((mach1) == EF_SH3E && (mach2) == EF_SH_UNKNOWN) \ - || ((mach2) == EF_SH3E && (mach1) == EF_SH_UNKNOWN)) \ - ? EF_SH4 \ - /* ??? SH4? Why not SH3E? */ \ - : ((((mach1) == EF_SH4_NOFPU || (mach1) == EF_SH4A_NOFPU) \ - && EF_SH_HAS_DSP (mach2)) \ - || (((mach2) == EF_SH4_NOFPU || (mach2) == EF_SH4A_NOFPU) \ - && EF_SH_HAS_DSP (mach1))) \ - ? EF_SH4AL_DSP \ - : ((mach1) == EF_SH4_NOFPU && EF_SH_HAS_FP (mach2)) \ - ? ((mach2) < EF_SH4A) ? EF_SH4 : (mach2) \ - : ((mach2) == EF_SH4_NOFPU && EF_SH_HAS_FP (mach1)) \ - ? ((mach1) < EF_SH4A) ? EF_SH4 : (mach1) \ - : ((mach1) == EF_SH4A_NOFPU && EF_SH_HAS_FP (mach2)) \ - ? ((mach2) <= EF_SH4A) ? EF_SH4A : (mach2) \ - : ((mach2) == EF_SH4A_NOFPU && EF_SH_HAS_FP (mach1)) \ - ? ((mach1) <= EF_SH4A) ? EF_SH4A : (mach1) \ - : (((mach1) == EF_SH2E ? 7 : (mach1)) > ((mach2) == EF_SH2E ? 7 : (mach2)) \ - ? (mach1) : (mach2))) +/* Define the mapping from ELF to bfd mach numbers. + bfd_mach_* are defined in bfd_in2.h (generated from + archures.c). */ +#define EF_SH_BFD_TABLE \ +/* EF_SH_UNKNOWN */ bfd_mach_sh3 , \ +/* EF_SH1 */ bfd_mach_sh , \ +/* EF_SH2 */ bfd_mach_sh2 , \ +/* EF_SH3 */ bfd_mach_sh3 , \ +/* EF_SH_DSP */ bfd_mach_sh_dsp , \ +/* EF_SH3_DSP */ bfd_mach_sh3_dsp , \ +/* EF_SHAL_DSP */ bfd_mach_sh4al_dsp , \ +/* 7 */ 0, \ +/* EF_SH3E */ bfd_mach_sh3e , \ +/* EF_SH4 */ bfd_mach_sh4 , \ +/* EF_SH5 */ 0, \ +/* EF_SH2E */ bfd_mach_sh2e , \ +/* EF_SH4A */ bfd_mach_sh4a , \ +/* 13, 14, 15 */ 0, 0, 0, \ +/* EF_SH4_NOFPU */ bfd_mach_sh4_nofpu , \ +/* EF_SH4A_NOFPU */ bfd_mach_sh4a_nofpu , \ +/* EF_SH4_NOMMU_NOFPU */ bfd_mach_sh4_nommu_nofpu, \ +/* 19 */ 0, \ +/* EF_SH3_NOMMU */ bfd_mach_sh3_nommu + +/* Convert arch_sh* into EF_SH*. */ +int sh_find_elf_flags (unsigned int arch_set); + +/* Convert bfd_mach_* into EF_SH*. */ +int sh_elf_get_flags_from_mach (unsigned long mach); /* Flags for the st_other symbol field. Keep away from the STV_ visibility flags (bit 0..1). */ |