diff options
109 files changed, 6066 insertions, 1021 deletions
diff --git a/COPYING.LIBGLOSS b/COPYING.LIBGLOSS index badd5b9..7eed3ab 100644 --- a/COPYING.LIBGLOSS +++ b/COPYING.LIBGLOSS @@ -395,7 +395,7 @@ and need not follow the licensing terms described here, provided that the new terms are clearly indicated on the first page of each file where they apply. -(20) - Synopsys Inc (arc-* targets) +(20) - Synopsys Inc (arc*-* targets) Copyright (c) 2015, Synopsys, Inc. All rights reserved. @@ -483,3 +483,17 @@ http://www.opensource.org/licenses. Copyright (C) 2020 Embecosm Limited SPDX-License-Identifier: BSD-2-Clause +(25) - Synopsys Inc. - (arc*-* targets) + +Copyright (c) 2024 Synopsys Inc. + +The authors hereby grant permission to use, copy, modify, distribute, +and license this software and its documentation for any purpose, provided +that existing copyright notices are retained in all copies and that this +notice is included verbatim in any distributions. No written agreement, +license, or royalty fee is required for any of the authorized uses. +Modifications to this software may be copyrighted by their authors +and need not follow the licensing terms described here, provided that +the new terms are clearly indicated on the first page of each file where +they apply. + diff --git a/COPYING.NEWLIB b/COPYING.NEWLIB index 176b3a4..9a2680d 100644 --- a/COPYING.NEWLIB +++ b/COPYING.NEWLIB @@ -995,7 +995,7 @@ and need not follow the licensing terms described here, provided that the new terms are clearly indicated on the first page of each file where they apply. -(44) - Synopsys Inc (arc-* targets) +(44) - Synopsys Inc (arc*-* targets) Copyright (c) 2015, Synopsys, Inc. All rights reserved. @@ -1541,3 +1541,32 @@ conflicts with the conditions of the GPLv2, you may retroactively and prospectively choose to deem waived or otherwise exclude such Section(s) of the License, but only in their entirety and only with respect to the Combined Software. + +(57) Steven G. Kargl - libm ld128 functions + +/*- + * Copyright (c) 2017-2023 Steven G. Kargl + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + @@ -2,7 +2,9 @@ # Configuration validation subroutine script. # Copyright 1992-2021 Free Software Foundation, Inc. -timestamp='2021-01-08' +# shellcheck disable=SC2006,SC2268 # see below for rationale + +timestamp='2021-10-27' # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by @@ -50,7 +52,14 @@ timestamp='2021-01-08' # CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM # It is wrong to echo any other type of specification. -me=$(echo "$0" | sed -e 's,.*/,,') +# The "shellcheck disable" line above the timestamp inhibits complaints +# about features and limitations of the classic Bourne shell that were +# superseded or lifted in POSIX. However, this script identifies a wide +# variety of pre-POSIX systems that do not have POSIX shells at all, and +# even some reasonably current systems (Solaris 10 as case-in-point) still +# have a pre-POSIX /bin/sh. + +me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] CPU-MFR-OPSYS or ALIAS @@ -112,9 +121,11 @@ esac # Split fields of configuration type # shellcheck disable=SC2162 +saved_IFS=$IFS IFS="-" read field1 field2 field3 field4 <<EOF $1 EOF +IFS=$saved_IFS # Separate into logical components for further validation case $1 in @@ -163,6 +174,10 @@ case $1 in basic_machine=$field1 basic_os=$field2 ;; + zephyr*) + basic_machine=$field1-unknown + basic_os=$field2 + ;; # Manufacturers dec* | mips* | sequent* | encore* | pc533* | sgi* | sony* \ | att* | 7300* | 3300* | delta* | motorola* | sun[234]* \ @@ -769,22 +784,22 @@ case $basic_machine in vendor=hp ;; i*86v32) - cpu=$(echo "$1" | sed -e 's/86.*/86/') + cpu=`echo "$1" | sed -e 's/86.*/86/'` vendor=pc basic_os=sysv32 ;; i*86v4*) - cpu=$(echo "$1" | sed -e 's/86.*/86/') + cpu=`echo "$1" | sed -e 's/86.*/86/'` vendor=pc basic_os=sysv4 ;; i*86v) - cpu=$(echo "$1" | sed -e 's/86.*/86/') + cpu=`echo "$1" | sed -e 's/86.*/86/'` vendor=pc basic_os=sysv ;; i*86sol2) - cpu=$(echo "$1" | sed -e 's/86.*/86/') + cpu=`echo "$1" | sed -e 's/86.*/86/'` vendor=pc basic_os=solaris2 ;; @@ -917,14 +932,16 @@ case $basic_machine in ;; leon-*|leon[3-9]-*) cpu=sparc - vendor=$(echo "$basic_machine" | sed 's/-.*//') + vendor=`echo "$basic_machine" | sed 's/-.*//'` ;; *-*) # shellcheck disable=SC2162 + saved_IFS=$IFS IFS="-" read cpu vendor <<EOF $basic_machine EOF + IFS=$saved_IFS ;; # We use `pc' rather than `unknown' # because (1) that's what they normally are, and @@ -1084,7 +1101,7 @@ case $cpu-$vendor in cpu=mipsisa64sb1el ;; sh5e[lb]-*) - cpu=$(echo "$cpu" | sed 's/^\(sh.\)e\(.\)$/\1\2e/') + cpu=`echo "$cpu" | sed 's/^\(sh.\)e\(.\)$/\1\2e/'` ;; spur-*) cpu=spur @@ -1102,7 +1119,7 @@ case $cpu-$vendor in cpu=x86_64 ;; xscale-* | xscalee[bl]-*) - cpu=$(echo "$cpu" | sed 's/^xscale/arm/') + cpu=`echo "$cpu" | sed 's/^xscale/arm/'` ;; arm64-*) cpu=aarch64 @@ -1165,7 +1182,7 @@ case $cpu-$vendor in | alphapca5[67] | alpha64pca5[67] \ | am33_2.0 \ | amdgcn \ - | arc | arceb \ + | arc | arceb | arc32 | arc64 \ | arm | arm[lb]e | arme[lb] | armv* \ | avr | avr32 \ | asmjs \ @@ -1204,9 +1221,13 @@ case $cpu-$vendor in | mips64vr5900 | mips64vr5900el \ | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ + | mipsisa32r3 | mipsisa32r3el \ + | mipsisa32r5 | mipsisa32r5el \ | mipsisa32r6 | mipsisa32r6el \ | mipsisa64 | mipsisa64el \ | mipsisa64r2 | mipsisa64r2el \ + | mipsisa64r3 | mipsisa64r3el \ + | mipsisa64r5 | mipsisa64r5el \ | mipsisa64r6 | mipsisa64r6el \ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ @@ -1283,35 +1304,37 @@ esac if test x$basic_os != x then -# First recognize some ad-hoc caes, or perhaps split kernel-os, or else just +# First recognize some ad-hoc cases, or perhaps split kernel-os, or else just # set os. case $basic_os in gnu/linux*) kernel=linux - os=$(echo $basic_os | sed -e 's|gnu/linux|gnu|') + os=`echo "$basic_os" | sed -e 's|gnu/linux|gnu|'` ;; os2-emx) kernel=os2 - os=$(echo $basic_os | sed -e 's|os2-emx|emx|') + os=`echo "$basic_os" | sed -e 's|os2-emx|emx|'` ;; nto-qnx*) kernel=nto - os=$(echo $basic_os | sed -e 's|nto-qnx|qnx|') + os=`echo "$basic_os" | sed -e 's|nto-qnx|qnx|'` ;; *-*) # shellcheck disable=SC2162 + saved_IFS=$IFS IFS="-" read kernel os <<EOF $basic_os EOF + IFS=$saved_IFS ;; # Default OS when just kernel was specified nto*) kernel=nto - os=$(echo $basic_os | sed -e 's|nto|qnx|') + os=`echo "$basic_os" | sed -e 's|nto|qnx|'` ;; linux*) kernel=linux - os=$(echo $basic_os | sed -e 's|linux|gnu|') + os=`echo "$basic_os" | sed -e 's|linux|gnu|'` ;; *) kernel= @@ -1332,7 +1355,7 @@ case $os in os=cnk ;; solaris1 | solaris1.*) - os=$(echo $os | sed -e 's|solaris1|sunos4|') + os=`echo "$os" | sed -e 's|solaris1|sunos4|'` ;; solaris) os=solaris2 @@ -1361,7 +1384,7 @@ case $os in os=sco3.2v4 ;; sco3.2.[4-9]*) - os=$(echo $os | sed -e 's/sco3.2./sco3.2v/') + os=`echo "$os" | sed -e 's/sco3.2./sco3.2v/'` ;; sco*v* | scout) # Don't match below @@ -1391,7 +1414,7 @@ case $os in os=lynxos ;; mac[0-9]*) - os=$(echo "$os" | sed -e 's|mac|macos|') + os=`echo "$os" | sed -e 's|mac|macos|'` ;; opened*) os=openedition @@ -1400,10 +1423,10 @@ case $os in os=os400 ;; sunos5*) - os=$(echo "$os" | sed -e 's|sunos5|solaris2|') + os=`echo "$os" | sed -e 's|sunos5|solaris2|'` ;; sunos6*) - os=$(echo "$os" | sed -e 's|sunos6|solaris3|') + os=`echo "$os" | sed -e 's|sunos6|solaris3|'` ;; wince*) os=wince @@ -1437,7 +1460,7 @@ case $os in ;; # Preserve the version number of sinix5. sinix5.*) - os=$(echo $os | sed -e 's|sinix|sysv|') + os=`echo "$os" | sed -e 's|sinix|sysv|'` ;; sinix*) os=sysv4 @@ -1684,7 +1707,7 @@ fi # Now, validate our (potentially fixed-up) OS. case $os in # Sometimes we do "kernel-libc", so those need to count as OSes. - musl* | newlib* | uclibc*) + musl* | newlib* | relibc* | uclibc*) ;; # Likewise for "kernel-abi" eabi* | gnueabi*) @@ -1707,12 +1730,12 @@ case $os in | nindy* | vxsim* | vxworks* | ebmon* | hms* | mvs* \ | clix* | riscos* | uniplus* | iris* | isc* | rtu* | xenix* \ | mirbsd* | netbsd* | dicos* | openedition* | ose* \ - | bitrig* | openbsd* | solidbsd* | libertybsd* | os108* \ + | bitrig* | openbsd* | secbsd* | solidbsd* | libertybsd* | os108* \ | ekkobsd* | freebsd* | riscix* | lynxos* | os400* \ | bosx* | nextstep* | cxux* | aout* | elf* | oabi* \ | ptx* | coff* | ecoff* | winnt* | domain* | vsta* \ | udi* | lites* | ieee* | go32* | aux* | hcos* \ - | chorusrdb* | cegcc* | glidix* \ + | chorusrdb* | cegcc* | glidix* | serenity* \ | cygwin* | msys* | pe* | moss* | proelf* | rtems* \ | midipix* | mingw32* | mingw64* | mint* \ | uxpv* | beos* | mpeix* | udk* | moxiebox* \ @@ -1725,7 +1748,8 @@ case $os in | skyos* | haiku* | rdos* | toppers* | drops* | es* \ | onefs* | tirtos* | phoenix* | fuchsia* | redox* | bme* \ | midnightbsd* | amdhsa* | unleashed* | emscripten* | wasi* \ - | nsk* | powerunix* | genode* | zvmoe* | qnx* | emx*) + | nsk* | powerunix* | genode* | zvmoe* | qnx* | emx* | zephyr* \ + | fiwix* ) ;; # This one is extra strict with allowed versions sco3.2v2 | sco3.2v[4-9]* | sco5v6*) @@ -1742,11 +1766,12 @@ esac # As a final step for OS-related things, validate the OS-kernel combination # (given a valid OS), if there is a kernel. case $kernel-$os in - linux-gnu* | linux-dietlibc* | linux-android* | linux-newlib* | linux-musl* | linux-uclibc* ) + linux-gnu* | linux-dietlibc* | linux-android* | linux-newlib* \ + | linux-musl* | linux-relibc* | linux-uclibc* ) ;; uclinux-uclibc* ) ;; - -dietlibc* | -newlib* | -musl* | -uclibc* ) + -dietlibc* | -newlib* | -musl* | -relibc* | -uclibc* ) # These are just libc implementations, not actual OSes, and thus # require a kernel. echo "Invalid configuration \`$1': libc \`$os' needs explicit kernel." 1>&2 diff --git a/libgloss/Makefile.am b/libgloss/Makefile.am index 77a199e..c3bae6e 100644 --- a/libgloss/Makefile.am +++ b/libgloss/Makefile.am @@ -86,6 +86,9 @@ endif if CONFIG_ARC include arc/Makefile.inc endif +if CONFIG_ARC64 +include arc64/Makefile.inc +endif if CONFIG_ARM include arm/Makefile.inc endif diff --git a/libgloss/Makefile.in b/libgloss/Makefile.in index 300dcf9..54a0061 100644 --- a/libgloss/Makefile.in +++ b/libgloss/Makefile.in @@ -153,22 +153,37 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) @CONFIG_ARC_TRUE@ arc/iotdk.ld @CONFIG_ARC_TRUE@am__append_7 = arc/crt0.S arc/gcrt0.S arc/arc-main-helper.c -@CONFIG_ARM_TRUE@@MAY_SUPPLY_SYSCALLS_FALSE@am__append_8 = arm/crt0.o -@CONFIG_ARM_TRUE@am__append_9 = arm/linux-crt0.o arm/redboot-crt0.o \ +@CONFIG_ARC64_TRUE@am__append_8 = arc64/libnsim.a arc64/libhl.a +@CONFIG_ARC64_TRUE@am__append_9 = \ +@CONFIG_ARC64_TRUE@ arc64/crt0.o \ +@CONFIG_ARC64_TRUE@ arc64/crtn.o \ +@CONFIG_ARC64_TRUE@ arc64/crti.o \ +@CONFIG_ARC64_TRUE@ arc/arc-main-helper.o \ +@CONFIG_ARC64_TRUE@ arc/nsim.specs \ +@CONFIG_ARC64_TRUE@ arc/hl.specs + +@CONFIG_ARC64_TRUE@am__append_10 = \ +@CONFIG_ARC64_TRUE@ arc64/crt0.S \ +@CONFIG_ARC64_TRUE@ arc64/crtn.S \ +@CONFIG_ARC64_TRUE@ arc64/crti.S \ +@CONFIG_ARC64_TRUE@ arc/arc-main-helper.c + +@CONFIG_ARM_TRUE@@MAY_SUPPLY_SYSCALLS_FALSE@am__append_11 = arm/crt0.o +@CONFIG_ARM_TRUE@am__append_12 = arm/linux-crt0.o arm/redboot-crt0.o \ @CONFIG_ARM_TRUE@ arm/redboot-syscalls.o arm/rdpmon-crt0.o \ @CONFIG_ARM_TRUE@ arm/rdimon-crt0.o arm/rdimon-crt0-v2m.o \ @CONFIG_ARM_TRUE@ $(arm_SPECS) -@CONFIG_ARM_TRUE@am__append_10 = arm/libgloss-linux.a arm/librdpmon.a \ +@CONFIG_ARM_TRUE@am__append_13 = arm/libgloss-linux.a arm/librdpmon.a \ @CONFIG_ARM_TRUE@ arm/librdimon.a arm/librdimon-v2m.a -@CONFIG_ARM_TRUE@am__append_11 = $(arm_SPECS) \ +@CONFIG_ARM_TRUE@am__append_14 = $(arm_SPECS) \ @CONFIG_ARM_TRUE@ $(arm_cpu_initcpuinit_DATA) # Here is all of the simulator stuff. -@CONFIG_BFIN_TRUE@am__append_12 = bfin/libsim.a bfin/libbfinbsp.a -@CONFIG_BFIN_TRUE@am__append_13 = bfin/sim-test +@CONFIG_BFIN_TRUE@am__append_15 = bfin/libsim.a bfin/libbfinbsp.a +@CONFIG_BFIN_TRUE@am__append_16 = bfin/sim-test # Here is all of the development board stuff. -@CONFIG_BFIN_TRUE@am__append_14 = \ +@CONFIG_BFIN_TRUE@am__append_17 = \ @CONFIG_BFIN_TRUE@ bfin/crt0.o \ @CONFIG_BFIN_TRUE@ bfin/basiccrt.o \ @CONFIG_BFIN_TRUE@ bfin/basiccrts.o \ @@ -179,11 +194,11 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) # bfin/basiccrt60x.o \ # bfin/basiccrt60xs.o \ # bfin/basiccrt60xc1.o -@CONFIG_BFIN_TRUE@am__append_15 = \ +@CONFIG_BFIN_TRUE@am__append_18 = \ @CONFIG_BFIN_TRUE@ bfin/crt0.S \ @CONFIG_BFIN_TRUE@ bfin/basiccrt.S -@CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_16 = \ +@CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_19 = \ @CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@ bfin/bfin-common-sc.ld bfin/bfin-common-mc.ld bfin/bfin-common-mc0.ld \ @CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@ bfin/bf504.ld bfin/bf506.ld \ @CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@ bfin/bf512.ld bfin/bf514.ld bfin/bf516.ld bfin/bf518.ld \ @@ -199,84 +214,84 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) @CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@ bfin/bf609.ld bfin/bf609c0.ld bfin/bf609c1.ld bfin/bf609m.ld \ @CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@ bfin/bf592.ld -@CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_17 = $(wildcard $(srcdir)/bfin/include/*.h) -@CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_18 = $(wildcard $(srcdir)/bfin/include/sys/*.h) -@CONFIG_CR16_TRUE@am__append_19 = cr16/crti.o cr16/crtn.o cr16/crt1.o \ +@CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_20 = $(wildcard $(srcdir)/bfin/include/*.h) +@CONFIG_BFIN_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_21 = $(wildcard $(srcdir)/bfin/include/sys/*.h) +@CONFIG_CR16_TRUE@am__append_22 = cr16/crti.o cr16/crtn.o cr16/crt1.o \ @CONFIG_CR16_TRUE@ cr16/sim.ld -@CONFIG_CR16_TRUE@am__append_20 = \ +@CONFIG_CR16_TRUE@am__append_23 = \ @CONFIG_CR16_TRUE@ cr16/crti.S \ @CONFIG_CR16_TRUE@ cr16/crtn.S \ @CONFIG_CR16_TRUE@ cr16/crt1.S -@CONFIG_CR16_TRUE@am__append_21 = cr16/libh.a cr16/libsim.a -@CONFIG_CSKY_TRUE@am__append_22 = \ +@CONFIG_CR16_TRUE@am__append_24 = cr16/libh.a cr16/libsim.a +@CONFIG_CSKY_TRUE@am__append_25 = \ @CONFIG_CSKY_TRUE@ csky/crt0.o -@CONFIG_CSKY_TRUE@am__append_23 = \ +@CONFIG_CSKY_TRUE@am__append_26 = \ @CONFIG_CSKY_TRUE@ csky/crt0.S -@CONFIG_CSKY_TRUE@am__append_24 = csky/libsemi.a -@CONFIG_D30V_TRUE@am__append_25 = d30v/libsim.a -@CONFIG_D30V_TRUE@am__append_26 = \ +@CONFIG_CSKY_TRUE@am__append_27 = csky/libsemi.a +@CONFIG_D30V_TRUE@am__append_28 = d30v/libsim.a +@CONFIG_D30V_TRUE@am__append_29 = \ @CONFIG_D30V_TRUE@ d30v/crt0.o -@CONFIG_EPIPHANY_TRUE@am__append_27 = epiphany/crt0.o -@CONFIG_EPIPHANY_TRUE@am__append_28 = epiphany/crt0.S -@CONFIG_EPIPHANY_TRUE@am__append_29 = epiphany/libepiphany.a -@CONFIG_FR30_TRUE@am__append_30 = fr30/crt0.o -@CONFIG_FR30_TRUE@am__append_31 = fr30/crt0.s -@CONFIG_FR30_TRUE@am__append_32 = fr30/libsim.a -@CONFIG_FRV_TRUE@am__append_33 = frv/crt0.o -@CONFIG_FRV_TRUE@am__append_34 = frv/crt0.S -@CONFIG_FRV_TRUE@am__append_35 = frv/libsim.a -@CONFIG_FT32_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_36 = \ +@CONFIG_EPIPHANY_TRUE@am__append_30 = epiphany/crt0.o +@CONFIG_EPIPHANY_TRUE@am__append_31 = epiphany/crt0.S +@CONFIG_EPIPHANY_TRUE@am__append_32 = epiphany/libepiphany.a +@CONFIG_FR30_TRUE@am__append_33 = fr30/crt0.o +@CONFIG_FR30_TRUE@am__append_34 = fr30/crt0.s +@CONFIG_FR30_TRUE@am__append_35 = fr30/libsim.a +@CONFIG_FRV_TRUE@am__append_36 = frv/crt0.o +@CONFIG_FRV_TRUE@am__append_37 = frv/crt0.S +@CONFIG_FRV_TRUE@am__append_38 = frv/libsim.a +@CONFIG_FT32_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_39 = \ @CONFIG_FT32_TRUE@@HAVE_MULTISUBDIR_FALSE@ ft32/sim.ld -@CONFIG_FT32_TRUE@am__append_37 = ft32/crt0.o -@CONFIG_FT32_TRUE@am__append_38 = ft32/crt0.S -@CONFIG_FT32_TRUE@am__append_39 = ft32/libsim.a -@CONFIG_I386_TRUE@am__append_40 = i386/cygmon.ld i386/cygmon-crt0.o -@CONFIG_I386_TRUE@am__append_41 = i386/cygmon-crt0.S -@CONFIG_I386_TRUE@am__append_42 = i386/libcygmon.a -@CONFIG_I960_TRUE@am__append_43 = i960/crt0.o i960/mon960.ld -@CONFIG_I960_TRUE@am__append_44 = \ +@CONFIG_FT32_TRUE@am__append_40 = ft32/crt0.o +@CONFIG_FT32_TRUE@am__append_41 = ft32/crt0.S +@CONFIG_FT32_TRUE@am__append_42 = ft32/libsim.a +@CONFIG_I386_TRUE@am__append_43 = i386/cygmon.ld i386/cygmon-crt0.o +@CONFIG_I386_TRUE@am__append_44 = i386/cygmon-crt0.S +@CONFIG_I386_TRUE@am__append_45 = i386/libcygmon.a +@CONFIG_I960_TRUE@am__append_46 = i960/crt0.o i960/mon960.ld +@CONFIG_I960_TRUE@am__append_47 = \ @CONFIG_I960_TRUE@ i960/crt0.c -@CONFIG_I960_TRUE@am__append_45 = i960/libmon960.a -@CONFIG_IQ2000_TRUE@am__append_46 = iq2000/crt0.o iq2000/sim.ld -@CONFIG_IQ2000_TRUE@am__append_47 = iq2000/libeval.a -@CONFIG_IQ2000_TRUE@am__append_48 = iq2000/crt0.S iq2000/test.o -@CONFIG_IQ2000_TRUE@am__append_49 = iq2000/test -@CONFIG_LIBNOSYS_TRUE@am__append_50 = libnosys/nosys.specs -@CONFIG_LIBNOSYS_TRUE@am__append_51 = libnosys/libnosys.a -@CONFIG_LM32_TRUE@am__append_52 = lm32/crt0.o lm32/sim.ld -@CONFIG_LM32_TRUE@am__append_53 = lm32/libgloss.a -@CONFIG_LM32_TRUE@am__append_54 = lm32/crt0.S -@CONFIG_M32R_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_55 = \ +@CONFIG_I960_TRUE@am__append_48 = i960/libmon960.a +@CONFIG_IQ2000_TRUE@am__append_49 = iq2000/crt0.o iq2000/sim.ld +@CONFIG_IQ2000_TRUE@am__append_50 = iq2000/libeval.a +@CONFIG_IQ2000_TRUE@am__append_51 = iq2000/crt0.S iq2000/test.o +@CONFIG_IQ2000_TRUE@am__append_52 = iq2000/test +@CONFIG_LIBNOSYS_TRUE@am__append_53 = libnosys/nosys.specs +@CONFIG_LIBNOSYS_TRUE@am__append_54 = libnosys/libnosys.a +@CONFIG_LM32_TRUE@am__append_55 = lm32/crt0.o lm32/sim.ld +@CONFIG_LM32_TRUE@am__append_56 = lm32/libgloss.a +@CONFIG_LM32_TRUE@am__append_57 = lm32/crt0.S +@CONFIG_M32R_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_58 = \ @CONFIG_M32R_TRUE@@HAVE_MULTISUBDIR_FALSE@ m32r/eva.ld \ @CONFIG_M32R_TRUE@@HAVE_MULTISUBDIR_FALSE@ m32r/eva-stub.ld \ @CONFIG_M32R_TRUE@@HAVE_MULTISUBDIR_FALSE@ m32r/mon.specs -@CONFIG_M32R_TRUE@am__append_56 = m32r/crt0.o m32r/m32r-lib.o \ +@CONFIG_M32R_TRUE@am__append_59 = m32r/crt0.o m32r/m32r-lib.o \ @CONFIG_M32R_TRUE@ m32r/m32r-stub.o -@CONFIG_M32R_TRUE@am__append_57 = m32r/crt0.S m32r/m32r-lib.c \ +@CONFIG_M32R_TRUE@am__append_60 = m32r/crt0.S m32r/m32r-lib.c \ @CONFIG_M32R_TRUE@ m32r/m32r-stub.c -@CONFIG_M32R_TRUE@am__append_58 = m32r/libgloss.a m32r/libmon.a -@CONFIG_MCORE_TRUE@@MCORE_BUILD_ELF_TRUE@am__append_59 = \ +@CONFIG_M32R_TRUE@am__append_61 = m32r/libgloss.a m32r/libmon.a +@CONFIG_MCORE_TRUE@@MCORE_BUILD_ELF_TRUE@am__append_62 = \ @CONFIG_MCORE_TRUE@@MCORE_BUILD_ELF_TRUE@ mcore/cmb.ld \ @CONFIG_MCORE_TRUE@@MCORE_BUILD_ELF_TRUE@ mcore/cmb.specs -@CONFIG_MCORE_TRUE@@MCORE_BUILD_PE_TRUE@am__append_60 = \ +@CONFIG_MCORE_TRUE@@MCORE_BUILD_PE_TRUE@am__append_63 = \ @CONFIG_MCORE_TRUE@@MCORE_BUILD_PE_TRUE@ mcore/cmb.ld \ @CONFIG_MCORE_TRUE@@MCORE_BUILD_PE_TRUE@ mcore/cmb.specs -@CONFIG_MCORE_TRUE@am__append_61 = mcore/crt0.o -@CONFIG_MCORE_TRUE@am__append_62 = mcore/crt0.S -@CONFIG_MCORE_TRUE@am__append_63 = mcore/libsim.a mcore/libcmb.a -@CONFIG_MICROBLAZE_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_64 = \ +@CONFIG_MCORE_TRUE@am__append_64 = mcore/crt0.o +@CONFIG_MCORE_TRUE@am__append_65 = mcore/crt0.S +@CONFIG_MCORE_TRUE@am__append_66 = mcore/libsim.a mcore/libcmb.a +@CONFIG_MICROBLAZE_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_67 = \ @CONFIG_MICROBLAZE_TRUE@@HAVE_MULTISUBDIR_FALSE@ microblaze/xilinx.ld -@CONFIG_MICROBLAZE_TRUE@am__append_65 = \ +@CONFIG_MICROBLAZE_TRUE@am__append_68 = \ @CONFIG_MICROBLAZE_TRUE@ microblaze/elf-gloss-linux.specs \ @CONFIG_MICROBLAZE_TRUE@ microblaze/crt0.o microblaze/crt1.o \ @CONFIG_MICROBLAZE_TRUE@ microblaze/crt2.o microblaze/crt3.o \ @@ -285,7 +300,7 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) @CONFIG_MICROBLAZE_TRUE@ microblaze/sim-crtinit.o \ @CONFIG_MICROBLAZE_TRUE@ microblaze/sim-pgcrtinit.o \ @CONFIG_MICROBLAZE_TRUE@ microblaze/linux-crt0.o -@CONFIG_MICROBLAZE_TRUE@am__append_66 = \ +@CONFIG_MICROBLAZE_TRUE@am__append_69 = \ @CONFIG_MICROBLAZE_TRUE@ microblaze/crt0.S \ @CONFIG_MICROBLAZE_TRUE@ microblaze/crt1.S \ @CONFIG_MICROBLAZE_TRUE@ microblaze/crt2.S \ @@ -297,77 +312,77 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) @CONFIG_MICROBLAZE_TRUE@ microblaze/sim-pgcrtinit.S \ @CONFIG_MICROBLAZE_TRUE@ microblaze/linux-crt0.S -@CONFIG_MICROBLAZE_TRUE@am__append_67 = microblaze/libgloss.a \ +@CONFIG_MICROBLAZE_TRUE@am__append_70 = microblaze/libgloss.a \ @CONFIG_MICROBLAZE_TRUE@ microblaze/libgloss-linux.a -@CONFIG_MN10200_TRUE@am__append_68 = mn10200/eval.ld mn10200/sim.ld \ +@CONFIG_MN10200_TRUE@am__append_71 = mn10200/eval.ld mn10200/sim.ld \ @CONFIG_MN10200_TRUE@ mn10200/crt0.o -@CONFIG_MN10200_TRUE@am__append_69 = mn10200/crt0.S -@CONFIG_MN10200_TRUE@am__append_70 = mn10200/libeval.a -@CONFIG_MN10200_TRUE@am__append_71 = mn10200/test -@CONFIG_MN10300_TRUE@am__append_72 = \ +@CONFIG_MN10200_TRUE@am__append_72 = mn10200/crt0.S +@CONFIG_MN10200_TRUE@am__append_73 = mn10200/libeval.a +@CONFIG_MN10200_TRUE@am__append_74 = mn10200/test +@CONFIG_MN10300_TRUE@am__append_75 = \ @CONFIG_MN10300_TRUE@ mn10300/eval.ld \ @CONFIG_MN10300_TRUE@ mn10300/sim.ld -@CONFIG_MN10300_TRUE@@MN10300_BUILD_LIBCYGMON_TRUE@am__append_73 = \ +@CONFIG_MN10300_TRUE@@MN10300_BUILD_LIBCYGMON_TRUE@am__append_76 = \ @CONFIG_MN10300_TRUE@@MN10300_BUILD_LIBCYGMON_TRUE@ mn10300/asb2303.ld \ @CONFIG_MN10300_TRUE@@MN10300_BUILD_LIBCYGMON_TRUE@ mn10300/asb2305.ld -@CONFIG_MN10300_TRUE@am__append_74 = \ +@CONFIG_MN10300_TRUE@am__append_77 = \ @CONFIG_MN10300_TRUE@ mn10300/crt0.o \ @CONFIG_MN10300_TRUE@ mn10300/crt0_cygmon.o \ @CONFIG_MN10300_TRUE@ mn10300/crt0_redboot.o -@CONFIG_MN10300_TRUE@am__append_75 = \ +@CONFIG_MN10300_TRUE@am__append_78 = \ @CONFIG_MN10300_TRUE@ mn10300/crt0.S \ @CONFIG_MN10300_TRUE@ mn10300/crt0_cygmon.S \ @CONFIG_MN10300_TRUE@ mn10300/crt0_redboot.S -@CONFIG_MN10300_TRUE@am__append_76 = mn10300/libeval.a -@CONFIG_MN10300_TRUE@@MN10300_BUILD_LIBCYGMON_TRUE@am__append_77 = mn10300/libcygmon.a -@CONFIG_MN10300_TRUE@am__append_78 = mn10300/test -@CONFIG_MOXIE_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_79 = \ +@CONFIG_MN10300_TRUE@am__append_79 = mn10300/libeval.a +@CONFIG_MN10300_TRUE@@MN10300_BUILD_LIBCYGMON_TRUE@am__append_80 = mn10300/libcygmon.a +@CONFIG_MN10300_TRUE@am__append_81 = mn10300/test +@CONFIG_MOXIE_TRUE@@HAVE_MULTISUBDIR_FALSE@am__append_82 = \ @CONFIG_MOXIE_TRUE@@HAVE_MULTISUBDIR_FALSE@ moxie/moxie-elf-common.ld \ @CONFIG_MOXIE_TRUE@@HAVE_MULTISUBDIR_FALSE@ moxie/qemu.ld \ @CONFIG_MOXIE_TRUE@@HAVE_MULTISUBDIR_FALSE@ moxie/sim.ld \ @CONFIG_MOXIE_TRUE@@HAVE_MULTISUBDIR_FALSE@ moxie/moxiebox.ld -@CONFIG_MOXIE_TRUE@@MOXIE_BUILD_CRT0_TRUE@am__append_80 = moxie/crt0.o -@CONFIG_MOXIE_TRUE@am__append_81 = \ +@CONFIG_MOXIE_TRUE@@MOXIE_BUILD_CRT0_TRUE@am__append_83 = moxie/crt0.o +@CONFIG_MOXIE_TRUE@am__append_84 = \ @CONFIG_MOXIE_TRUE@ moxie/crt0.S -@CONFIG_MOXIE_TRUE@am__append_82 = moxie/libsim.a moxie/libqemu.a -@CONFIG_MSP430_TRUE@am__append_83 = msp430/msp430-sim.ld \ +@CONFIG_MOXIE_TRUE@am__append_85 = moxie/libsim.a moxie/libqemu.a +@CONFIG_MSP430_TRUE@am__append_86 = msp430/msp430-sim.ld \ @CONFIG_MSP430_TRUE@ msp430/msp430xl-sim.ld \ @CONFIG_MSP430_TRUE@ msp430/intr_vectors.ld msp430/gcrt0.o \ @CONFIG_MSP430_TRUE@ msp430/crt0.o -@CONFIG_MSP430_TRUE@am__append_84 = \ +@CONFIG_MSP430_TRUE@am__append_87 = \ @CONFIG_MSP430_TRUE@ msp430/gcrt0.S \ @CONFIG_MSP430_TRUE@ msp430/crt0.S -@CONFIG_MSP430_TRUE@am__append_85 = msp430/libsim.a msp430/libnosys.a \ +@CONFIG_MSP430_TRUE@am__append_88 = msp430/libsim.a msp430/libnosys.a \ @CONFIG_MSP430_TRUE@ msp430/libcrt.a -@CONFIG_NDS32_TRUE@am__append_86 = \ +@CONFIG_NDS32_TRUE@am__append_89 = \ @CONFIG_NDS32_TRUE@ nds32/crt0.o \ @CONFIG_NDS32_TRUE@ nds32/crt1.o -@CONFIG_NDS32_TRUE@am__append_87 = \ +@CONFIG_NDS32_TRUE@am__append_90 = \ @CONFIG_NDS32_TRUE@ nds32/crt0.S \ @CONFIG_NDS32_TRUE@ nds32/crt1.S -@CONFIG_NDS32_TRUE@am__append_88 = nds32/libgloss.a -@CONFIG_NIOS2_TRUE@am__append_89 = \ +@CONFIG_NDS32_TRUE@am__append_91 = nds32/libgloss.a +@CONFIG_NIOS2_TRUE@am__append_92 = \ @CONFIG_NIOS2_TRUE@ nios2/qemu-hosted.ld -@CONFIG_NIOS2_TRUE@am__append_90 = nios2/libnios2.a -@CONFIG_OR1K_TRUE@am__append_91 = or1k/crt0.o -@CONFIG_OR1K_TRUE@am__append_92 = or1k/crt0.S -@CONFIG_OR1K_TRUE@am__append_93 = \ +@CONFIG_NIOS2_TRUE@am__append_93 = nios2/libnios2.a +@CONFIG_OR1K_TRUE@am__append_94 = or1k/crt0.o +@CONFIG_OR1K_TRUE@am__append_95 = or1k/crt0.S +@CONFIG_OR1K_TRUE@am__append_96 = \ @CONFIG_OR1K_TRUE@ or1k/include/or1k-asm.h \ @CONFIG_OR1K_TRUE@ or1k/include/or1k-nop.h \ @CONFIG_OR1K_TRUE@ or1k/include/or1k-sprs.h \ @CONFIG_OR1K_TRUE@ or1k/include/or1k-support.h -@CONFIG_OR1K_TRUE@am__append_94 = or1k/libor1k.a or1k/libboard-atlys.a \ +@CONFIG_OR1K_TRUE@am__append_97 = or1k/libor1k.a or1k/libboard-atlys.a \ @CONFIG_OR1K_TRUE@ or1k/libboard-de0_nano.a \ @CONFIG_OR1K_TRUE@ or1k/libboard-ml501.a \ @CONFIG_OR1K_TRUE@ or1k/libboard-optimsoc.a \ @@ -376,49 +391,49 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) @CONFIG_OR1K_TRUE@ or1k/libboard-ordb1a3pe1500.a \ @CONFIG_OR1K_TRUE@ or1k/libboard-ordb2a.a \ @CONFIG_OR1K_TRUE@ or1k/libboard-orpsocrefdesign.a -@CONFIG_PRU_TRUE@am__append_95 = \ +@CONFIG_PRU_TRUE@am__append_98 = \ @CONFIG_PRU_TRUE@ pru/crt0.o \ @CONFIG_PRU_TRUE@ pru/crt0-minrt.o -@CONFIG_PRU_TRUE@am__append_96 = \ +@CONFIG_PRU_TRUE@am__append_99 = \ @CONFIG_PRU_TRUE@ pru/crt0.S \ @CONFIG_PRU_TRUE@ pru/crt0-minrt.S -@CONFIG_PRU_TRUE@am__append_97 = pru/libgloss.a -@CONFIG_RISCV_TRUE@am__append_98 = \ +@CONFIG_PRU_TRUE@am__append_100 = pru/libgloss.a +@CONFIG_RISCV_TRUE@am__append_101 = \ @CONFIG_RISCV_TRUE@ riscv/nano.specs \ @CONFIG_RISCV_TRUE@ riscv/sim.specs \ @CONFIG_RISCV_TRUE@ riscv/semihost.specs \ @CONFIG_RISCV_TRUE@ riscv/crt0.o -@CONFIG_RISCV_TRUE@am__append_99 = riscv/libgloss.a riscv/libsim.a \ +@CONFIG_RISCV_TRUE@am__append_102 = riscv/libgloss.a riscv/libsim.a \ @CONFIG_RISCV_TRUE@ riscv/libsemihost.a -@CONFIG_RL78_TRUE@am__append_100 = rl78/rl78.ld rl78/rl78-sim.ld \ +@CONFIG_RL78_TRUE@am__append_103 = rl78/rl78.ld rl78/rl78-sim.ld \ @CONFIG_RL78_TRUE@ rl78/gcrt0.o rl78/crt0.o rl78/crtn.o -@CONFIG_RL78_TRUE@am__append_101 = \ +@CONFIG_RL78_TRUE@am__append_104 = \ @CONFIG_RL78_TRUE@ rl78/gcrt0.S \ @CONFIG_RL78_TRUE@ rl78/crt0.S \ @CONFIG_RL78_TRUE@ rl78/crtn.S -@CONFIG_RL78_TRUE@am__append_102 = rl78/libsim.a -@CONFIG_RX_TRUE@am__append_103 = rx/rx.ld rx/rx-sim.ld rx/gcrt0.o \ +@CONFIG_RL78_TRUE@am__append_105 = rl78/libsim.a +@CONFIG_RX_TRUE@am__append_106 = rx/rx.ld rx/rx-sim.ld rx/gcrt0.o \ @CONFIG_RX_TRUE@ rx/crt0.o rx/crtn.o -@CONFIG_RX_TRUE@am__append_104 = \ +@CONFIG_RX_TRUE@am__append_107 = \ @CONFIG_RX_TRUE@ rx/gcrt0.S \ @CONFIG_RX_TRUE@ rx/crt0.S \ @CONFIG_RX_TRUE@ rx/crtn.S -@CONFIG_RX_TRUE@am__append_105 = rx/libsim.a -@CONFIG_SPARC_TRUE@am__append_106 = sparc/crt0.o sparc/erc32-crt0.o -@CONFIG_SPARC_TRUE@am__append_107 = sparc/crt0.S sparc/erc32-crt0.S -@CONFIG_SPARC_TRUE@am__append_108 = sparc/liberc32.a -@CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@am__append_109 = \ +@CONFIG_RX_TRUE@am__append_108 = rx/libsim.a +@CONFIG_SPARC_TRUE@am__append_109 = sparc/crt0.o sparc/erc32-crt0.o +@CONFIG_SPARC_TRUE@am__append_110 = sparc/crt0.S sparc/erc32-crt0.S +@CONFIG_SPARC_TRUE@am__append_111 = sparc/liberc32.a +@CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@am__append_112 = \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@ sparc/cygmon.ld \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@ sparc/cygmon-crt0.o \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@ sparc/cygmon-salib.o -@CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@am__append_110 = sparc/cygmon-crt0.S -@CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@am__append_111 = sparc/libcygmon.a -@CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@am__append_112 = \ +@CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@am__append_113 = sparc/cygmon-crt0.S +@CONFIG_SPARC_TRUE@@SPARC_BUILD_CYGMON_TRUE@am__append_114 = sparc/libcygmon.a +@CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@am__append_115 = \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/ex930.ld \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/ex931.ld \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/ex934.ld \ @@ -426,64 +441,64 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/elfsim.ld \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/traps.o -@CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@am__append_113 = \ +@CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@am__append_116 = \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/libslite930.a \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/libslite931.a \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/libslite934.a \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SLITE_TRUE@ sparc/libslite86x.a -@CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@am__append_114 = \ +@CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@am__append_117 = \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@ sparc/tsc701.ld \ @CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@ sparc/crt0-701.S -@CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@am__append_115 = sparc/crt0-701.S -@CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@am__append_116 = sparc/libsplet701.a -@CONFIG_SPARC_TRUE@am__append_117 = sparc/erc32-test sparc/ex930-test \ +@CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@am__append_118 = sparc/crt0-701.S +@CONFIG_SPARC_TRUE@@SPARC_BUILD_SPLET_TRUE@am__append_119 = sparc/libsplet701.a +@CONFIG_SPARC_TRUE@am__append_120 = sparc/erc32-test sparc/ex930-test \ @CONFIG_SPARC_TRUE@ sparc/ex931-test sparc/ex934-test -@CONFIG_SPARC_LEON_TRUE@am__append_118 = sparc_leon/libleonbare.a \ +@CONFIG_SPARC_LEON_TRUE@am__append_121 = sparc_leon/libleonbare.a \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/liblbthread.a \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/libsmall.a -@CONFIG_SPARC_LEON_TRUE@am__append_119 = \ +@CONFIG_SPARC_LEON_TRUE@am__append_122 = \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/crt0.o \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/pnpinit.o \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/pnpinit_simple.o \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/locore_svt.o \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/locore_mvt.o -@CONFIG_SPARC_LEON_TRUE@am__append_120 = \ +@CONFIG_SPARC_LEON_TRUE@am__append_123 = \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/crt0.S \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/pnpinit.c \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/pnpinit_simple.c \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/locore_svt.S \ @CONFIG_SPARC_LEON_TRUE@ sparc_leon/locore_mvt.S -@CONFIG_TIC6X_TRUE@am__append_121 = tic6x/crt0.o -@CONFIG_TIC6X_TRUE@am__append_122 = tic6x/crt0.S -@CONFIG_TIC6X_TRUE@am__append_123 = tic6x/libsim.a -@CONFIG_V850_TRUE@am__append_124 = v850/crt0.o -@CONFIG_V850_TRUE@am__append_125 = v850/crt0.S -@CONFIG_V850_TRUE@am__append_126 = v850/libsim.a -@CONFIG_VISIUM_TRUE@am__append_127 = visium/crt0.o -@CONFIG_VISIUM_TRUE@am__append_128 = visium/crt0.S -@CONFIG_VISIUM_TRUE@am__append_129 = visium/libserial.a \ +@CONFIG_TIC6X_TRUE@am__append_124 = tic6x/crt0.o +@CONFIG_TIC6X_TRUE@am__append_125 = tic6x/crt0.S +@CONFIG_TIC6X_TRUE@am__append_126 = tic6x/libsim.a +@CONFIG_V850_TRUE@am__append_127 = v850/crt0.o +@CONFIG_V850_TRUE@am__append_128 = v850/crt0.S +@CONFIG_V850_TRUE@am__append_129 = v850/libsim.a +@CONFIG_VISIUM_TRUE@am__append_130 = visium/crt0.o +@CONFIG_VISIUM_TRUE@am__append_131 = visium/crt0.S +@CONFIG_VISIUM_TRUE@am__append_132 = visium/libserial.a \ @CONFIG_VISIUM_TRUE@ visium/libsim.a visium/libdebug.a -@CONFIG_WINCE_TRUE@am__append_130 = $(gdbdir) -@CONFIG_WINCE_TRUE@am__append_131 = wince/stub.exe -@CONFIG_XSTORMY16_TRUE@am__append_132 = xstormy16/crt0.o \ +@CONFIG_WINCE_TRUE@am__append_133 = $(gdbdir) +@CONFIG_WINCE_TRUE@am__append_134 = wince/stub.exe +@CONFIG_XSTORMY16_TRUE@am__append_135 = xstormy16/crt0.o \ @CONFIG_XSTORMY16_TRUE@ xstormy16/crti.o xstormy16/crtn.o \ @CONFIG_XSTORMY16_TRUE@ xstormy16/sim_high.ld \ @CONFIG_XSTORMY16_TRUE@ xstormy16/sim_rom.ld \ @CONFIG_XSTORMY16_TRUE@ xstormy16/eva_app.ld \ @CONFIG_XSTORMY16_TRUE@ xstormy16/eva_stub.hex -@CONFIG_XSTORMY16_TRUE@am__append_133 = \ +@CONFIG_XSTORMY16_TRUE@am__append_136 = \ @CONFIG_XSTORMY16_TRUE@ xstormy16/crt0.s \ @CONFIG_XSTORMY16_TRUE@ xstormy16/crti.s \ @CONFIG_XSTORMY16_TRUE@ xstormy16/crtn.s -@CONFIG_XSTORMY16_TRUE@am__append_134 = xstormy16/libsim.a \ +@CONFIG_XSTORMY16_TRUE@am__append_137 = xstormy16/libsim.a \ @CONFIG_XSTORMY16_TRUE@ xstormy16/libeva_app.a -@CONFIG_XSTORMY16_TRUE@am__append_135 = xstormy16/eva_stub.elf -@CONFIG_XSTORMY16_TRUE@am__append_136 = xstormy16/eva_stub.hex -@CONFIG_XTENSA_TRUE@am__append_137 = \ +@CONFIG_XSTORMY16_TRUE@am__append_138 = xstormy16/eva_stub.elf +@CONFIG_XSTORMY16_TRUE@am__append_139 = xstormy16/eva_stub.hex +@CONFIG_XTENSA_TRUE@am__append_140 = \ @CONFIG_XTENSA_TRUE@ xtensa/default.specs \ @CONFIG_XTENSA_TRUE@ xtensa/nano.specs \ @CONFIG_XTENSA_TRUE@ xtensa/sim.elf.specs \ @@ -492,29 +507,29 @@ multilibtool_PROGRAMS = $(am__EXEEXT_7) @CONFIG_XTENSA_TRUE@ xtensa/sys.openocd.specs \ @CONFIG_XTENSA_TRUE@ xtensa/crt0.o -@CONFIG_XTENSA_TRUE@am__append_138 = \ +@CONFIG_XTENSA_TRUE@am__append_141 = \ @CONFIG_XTENSA_TRUE@ xtensa/crt0.S \ @CONFIG_XTENSA_TRUE@ xtensa/crt1-sim.S \ @CONFIG_XTENSA_TRUE@ xtensa/crt1-boards.S -@CONFIG_XTENSA_TRUE@am__append_139 = xtensa/libgloss.a -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@am__append_140 = \ +@CONFIG_XTENSA_TRUE@am__append_142 = xtensa/libgloss.a +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@am__append_143 = \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/app.elf.ld \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/crt1-sim.o \ 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-I$(srcdir)/arc +@CONFIG_ARC64_TRUE@arc64_libnsim_a_SOURCES = \ +@CONFIG_ARC64_TRUE@ arc/libcfunc.c \ +@CONFIG_ARC64_TRUE@ arc/nsim-syscalls.c \ +@CONFIG_ARC64_TRUE@ arc/sbrk.c + +@CONFIG_ARC64_TRUE@arc64_libhl_a_CFLAGS = -mvolatile-di +@CONFIG_ARC64_TRUE@arc64_libhl_a_CPPFLAGS = -I$(srcdir)/arc +@CONFIG_ARC64_TRUE@arc64_libhl_a_SOURCES = \ +@CONFIG_ARC64_TRUE@ arc/arc-timer.c \ +@CONFIG_ARC64_TRUE@ arc/hl-stub.c \ +@CONFIG_ARC64_TRUE@ arc/hl-setup.c \ +@CONFIG_ARC64_TRUE@ arc/libcfunc.c \ +@CONFIG_ARC64_TRUE@ arc/sbrk.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_gw.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_api.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_open.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_close.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_read.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_write.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_lseek.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_unlink.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_isatty.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_clock.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_gettimeofday.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_argc.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_argv.c \ +@CONFIG_ARC64_TRUE@ arc/hl/hl_exit.c + @CONFIG_ARM_TRUE@arm_SPECS = arm/nano.specs arm/linux.specs \ @CONFIG_ARM_TRUE@ arm/redboot.ld arm/redboot.specs \ @CONFIG_ARM_TRUE@ arm/rdpmon.specs arm/rdimon.specs \ @@ -3054,15 +3133,15 @@ TEXINFO_TEX = ../texinfo/texinfo.tex @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@xtensa_libgloss_a_SOURCES = xtensa/sleep.S \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/syscalls.c \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/window-vectors.S \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_143) \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_148) +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_146) \ +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_151) @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@xtensa_libgloss_a_CPPFLAGS = $(AM_CPPFLAGS) \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_144) \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_149) +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_147) \ +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_152) @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@xtensa_libsys_qemu_a_CPPFLAGS = $(AM_CPPFLAGS) \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ -DQEMU_SEMIHOSTING \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_145) \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_150) +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_148) \ +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_153) @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@xtensa_libsys_qemu_a_SOURCES = \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/sim-vectors.S \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/sim-call.S \ @@ -3070,8 +3149,8 @@ TEXINFO_TEX = ../texinfo/texinfo.tex @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@xtensa_libsys_openocd_a_CPPFLAGS = $(AM_CPPFLAGS) \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ -DOPENOCD_SEMIHOSTING \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_146) \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_151) +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_149) \ +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__append_154) @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@xtensa_libsys_openocd_a_SOURCES = \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/syscalls.c @@ -3082,7 +3161,7 @@ all: config.h .SUFFIXES: .S .c .dvi .o .obj .ps .s am--refresh: Makefile @: -$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/../multilib.am $(srcdir)/doc/Makefile.inc $(srcdir)/aarch64/Makefile.inc $(srcdir)/aarch64/cpu-init/Makefile.inc $(srcdir)/arc/Makefile.inc $(srcdir)/arm/Makefile.inc $(srcdir)/arm/cpu-init/Makefile.inc $(srcdir)/bfin/Makefile.inc $(srcdir)/cr16/Makefile.inc $(srcdir)/csky/Makefile.inc $(srcdir)/d30v/Makefile.inc $(srcdir)/epiphany/Makefile.inc $(srcdir)/fr30/Makefile.inc $(srcdir)/frv/Makefile.inc $(srcdir)/ft32/Makefile.inc $(srcdir)/i386/Makefile.inc $(srcdir)/i960/Makefile.inc $(srcdir)/iq2000/Makefile.inc $(srcdir)/libnosys/Makefile.inc $(srcdir)/lm32/Makefile.inc $(srcdir)/m32r/Makefile.inc $(srcdir)/mcore/Makefile.inc $(srcdir)/microblaze/Makefile.inc $(srcdir)/mn10200/Makefile.inc $(srcdir)/mn10300/Makefile.inc $(srcdir)/moxie/Makefile.inc $(srcdir)/msp430/Makefile.inc $(srcdir)/nds32/Makefile.inc $(srcdir)/nios2/Makefile.inc $(srcdir)/or1k/Makefile.inc $(srcdir)/pru/Makefile.inc $(srcdir)/riscv/Makefile.inc $(srcdir)/rl78/Makefile.inc $(srcdir)/rx/Makefile.inc $(srcdir)/sparc/Makefile.inc $(srcdir)/sparc_leon/Makefile.inc $(srcdir)/tic6x/Makefile.inc $(srcdir)/v850/Makefile.inc $(srcdir)/visium/Makefile.inc $(srcdir)/wince/Makefile.inc $(srcdir)/xstormy16/Makefile.inc $(srcdir)/xtensa/Makefile.inc $(am__configure_deps) +$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/../multilib.am $(srcdir)/doc/Makefile.inc $(srcdir)/aarch64/Makefile.inc $(srcdir)/aarch64/cpu-init/Makefile.inc $(srcdir)/arc/Makefile.inc $(srcdir)/arc64/Makefile.inc $(srcdir)/arm/Makefile.inc $(srcdir)/arm/cpu-init/Makefile.inc $(srcdir)/bfin/Makefile.inc $(srcdir)/cr16/Makefile.inc $(srcdir)/csky/Makefile.inc $(srcdir)/d30v/Makefile.inc $(srcdir)/epiphany/Makefile.inc $(srcdir)/fr30/Makefile.inc $(srcdir)/frv/Makefile.inc $(srcdir)/ft32/Makefile.inc $(srcdir)/i386/Makefile.inc $(srcdir)/i960/Makefile.inc $(srcdir)/iq2000/Makefile.inc $(srcdir)/libnosys/Makefile.inc $(srcdir)/lm32/Makefile.inc $(srcdir)/m32r/Makefile.inc $(srcdir)/mcore/Makefile.inc $(srcdir)/microblaze/Makefile.inc $(srcdir)/mn10200/Makefile.inc $(srcdir)/mn10300/Makefile.inc $(srcdir)/moxie/Makefile.inc $(srcdir)/msp430/Makefile.inc $(srcdir)/nds32/Makefile.inc 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'arc/nsim-syscalls.c' || echo '$(srcdir)/'`arc/nsim-syscalls.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) arc/$(DEPDIR)/arc64_libnsim_a-nsim-syscalls.Tpo arc/$(DEPDIR)/arc64_libnsim_a-nsim-syscalls.Po +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='arc/nsim-syscalls.c' object='arc/arc64_libnsim_a-nsim-syscalls.o' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(arc64_libnsim_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o arc/arc64_libnsim_a-nsim-syscalls.o `test -f 'arc/nsim-syscalls.c' || echo '$(srcdir)/'`arc/nsim-syscalls.c + +arc/arc64_libnsim_a-nsim-syscalls.obj: arc/nsim-syscalls.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(arc64_libnsim_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT arc/arc64_libnsim_a-nsim-syscalls.obj -MD -MP -MF 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$(arc64_libnsim_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT arc/arc64_libnsim_a-sbrk.obj -MD -MP -MF arc/$(DEPDIR)/arc64_libnsim_a-sbrk.Tpo -c -o arc/arc64_libnsim_a-sbrk.obj `if test -f 'arc/sbrk.c'; then $(CYGPATH_W) 'arc/sbrk.c'; else $(CYGPATH_W) '$(srcdir)/arc/sbrk.c'; fi` +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) arc/$(DEPDIR)/arc64_libnsim_a-sbrk.Tpo arc/$(DEPDIR)/arc64_libnsim_a-sbrk.Po +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='arc/sbrk.c' object='arc/arc64_libnsim_a-sbrk.obj' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(arc64_libnsim_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o arc/arc64_libnsim_a-sbrk.obj `if test -f 'arc/sbrk.c'; then $(CYGPATH_W) 'arc/sbrk.c'; else $(CYGPATH_W) '$(srcdir)/arc/sbrk.c'; fi` + arm/arm_librdimon_v2m_a-_exit.o: arm/_exit.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(arm_librdimon_v2m_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT arm/arm_librdimon_v2m_a-_exit.o -MD -MP -MF arm/$(DEPDIR)/arm_librdimon_v2m_a-_exit.Tpo -c -o arm/arm_librdimon_v2m_a-_exit.o `test -f 'arm/_exit.c' || echo '$(srcdir)/'`arm/_exit.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) arm/$(DEPDIR)/arm_librdimon_v2m_a-_exit.Tpo arm/$(DEPDIR)/arm_librdimon_v2m_a-_exit.Po @@ -9494,6 +9973,8 @@ distclean-generic: -rm -f arc/$(am__dirstamp) -rm -f arc/hl/$(DEPDIR)/$(am__dirstamp) -rm -f arc/hl/$(am__dirstamp) + -rm -f arc64/$(DEPDIR)/$(am__dirstamp) + -rm -f arc64/$(am__dirstamp) -rm -f arm/$(DEPDIR)/$(am__dirstamp) -rm -f arm/$(am__dirstamp) -rm -f bfin/$(DEPDIR)/$(am__dirstamp) @@ -9586,7 +10067,7 @@ clean-am: clean-aminfo clean-binPROGRAMS clean-checkPROGRAMS \ distclean: distclean-recursive -rm -f $(am__CONFIG_DISTCLEAN_FILES) - -rm -rf ./$(DEPDIR) aarch64/$(DEPDIR) arc/$(DEPDIR) arc/hl/$(DEPDIR) arm/$(DEPDIR) bfin/$(DEPDIR) cr16/$(DEPDIR) csky/$(DEPDIR) d30v/$(DEPDIR) epiphany/$(DEPDIR) fr30/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) i386/$(DEPDIR) i960/$(DEPDIR) iq2000/$(DEPDIR) libnosys/$(DEPDIR) lm32/$(DEPDIR) m32r/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mn10200/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) nds32/$(DEPDIR) nios2/$(DEPDIR) or1k/$(DEPDIR) or1k/boards/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sparc/$(DEPDIR) sparc_leon/$(DEPDIR) tic6x/$(DEPDIR) v850/$(DEPDIR) visium/$(DEPDIR) xstormy16/$(DEPDIR) xtensa/$(DEPDIR) xtensa/boards/esp32/$(DEPDIR) xtensa/boards/esp32s3/$(DEPDIR) + -rm -rf ./$(DEPDIR) aarch64/$(DEPDIR) arc/$(DEPDIR) arc/hl/$(DEPDIR) arc64/$(DEPDIR) arm/$(DEPDIR) bfin/$(DEPDIR) cr16/$(DEPDIR) csky/$(DEPDIR) d30v/$(DEPDIR) epiphany/$(DEPDIR) fr30/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) i386/$(DEPDIR) i960/$(DEPDIR) iq2000/$(DEPDIR) libnosys/$(DEPDIR) lm32/$(DEPDIR) m32r/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mn10200/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) nds32/$(DEPDIR) nios2/$(DEPDIR) or1k/$(DEPDIR) or1k/boards/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sparc/$(DEPDIR) sparc_leon/$(DEPDIR) tic6x/$(DEPDIR) v850/$(DEPDIR) visium/$(DEPDIR) xstormy16/$(DEPDIR) xtensa/$(DEPDIR) xtensa/boards/esp32/$(DEPDIR) xtensa/boards/esp32s3/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-compile distclean-generic \ distclean-hdr distclean-local distclean-tags @@ -9730,7 +10211,7 @@ installcheck-am: maintainer-clean: maintainer-clean-recursive -rm -f $(am__CONFIG_DISTCLEAN_FILES) -rm -rf $(top_srcdir)/autom4te.cache - -rm -rf ./$(DEPDIR) aarch64/$(DEPDIR) arc/$(DEPDIR) arc/hl/$(DEPDIR) arm/$(DEPDIR) bfin/$(DEPDIR) cr16/$(DEPDIR) csky/$(DEPDIR) d30v/$(DEPDIR) epiphany/$(DEPDIR) fr30/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) i386/$(DEPDIR) i960/$(DEPDIR) iq2000/$(DEPDIR) libnosys/$(DEPDIR) lm32/$(DEPDIR) m32r/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mn10200/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) nds32/$(DEPDIR) nios2/$(DEPDIR) or1k/$(DEPDIR) or1k/boards/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sparc/$(DEPDIR) sparc_leon/$(DEPDIR) tic6x/$(DEPDIR) v850/$(DEPDIR) visium/$(DEPDIR) xstormy16/$(DEPDIR) xtensa/$(DEPDIR) xtensa/boards/esp32/$(DEPDIR) xtensa/boards/esp32s3/$(DEPDIR) + -rm -rf ./$(DEPDIR) aarch64/$(DEPDIR) arc/$(DEPDIR) arc/hl/$(DEPDIR) arc64/$(DEPDIR) arm/$(DEPDIR) bfin/$(DEPDIR) cr16/$(DEPDIR) csky/$(DEPDIR) d30v/$(DEPDIR) epiphany/$(DEPDIR) fr30/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) i386/$(DEPDIR) i960/$(DEPDIR) iq2000/$(DEPDIR) libnosys/$(DEPDIR) lm32/$(DEPDIR) m32r/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mn10200/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) nds32/$(DEPDIR) nios2/$(DEPDIR) or1k/$(DEPDIR) or1k/boards/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sparc/$(DEPDIR) sparc_leon/$(DEPDIR) tic6x/$(DEPDIR) v850/$(DEPDIR) visium/$(DEPDIR) xstormy16/$(DEPDIR) xtensa/$(DEPDIR) xtensa/boards/esp32/$(DEPDIR) xtensa/boards/esp32s3/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-aminfo \ maintainer-clean-generic maintainer-clean-local diff --git a/libgloss/arc/arc-specific.h b/libgloss/arc/arc-specific.h new file mode 100644 index 0000000..01f215a --- /dev/null +++ b/libgloss/arc/arc-specific.h @@ -0,0 +1,32 @@ +/* + * arc-specific.h -- provide ARC-specific definitions + * + * Copyright (c) 2024 Synopsys Inc. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + * + */ + +#ifndef _ARC_SPECIFIC_H +#define _ARC_SPECIFIC_H + +/* First check for MetaWare compiler as it also defines __GNUC__. */ +#if defined (__CCAC__) + #define read_aux_reg(r) _lr(r) + #define write_aux_reg(r, v) _sr((unsigned int)(v), r) +#elif defined (__GNUC__) + #define read_aux_reg(r) __builtin_arc_lr(r) + #define write_aux_reg(v, r) __builtin_arc_sr((unsigned int)(v), r) +#else + #error "Unexpected compiler" +#endif + +#endif /* _ARC_SPECIFIC_H */ diff --git a/libgloss/arc/arc-symbols.h b/libgloss/arc/arc-symbols.h new file mode 100644 index 0000000..a41ee39 --- /dev/null +++ b/libgloss/arc/arc-symbols.h @@ -0,0 +1,40 @@ +/* + * arc-symbols.h -- provide ARC-specific symbols + * + * Copyright (c) 2024 Synopsys Inc. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + * + */ + +#ifndef _ARC_SYMBOLS_H +#define _ARC_SYMBOLS_H + +/* First check for MetaWare compiler as it also defines __GNUC__. */ +#if defined (__CCAC__) + #define STACK_TOP _estack + #define SMALL_DATA_BASE _SDA_BASE_ + #define SMALL_DATA_BSS_START _fsbss + #define SMALL_DATA_BSS_END _esbss + #define START_HEAP _fheap + #define END_HEAP _eheap +#elif defined (__GNUC__) + #define STACK_TOP __stack_top + #define SMALL_DATA_BASE __SDATA_BEGIN__ + #define SMALL_DATA_BSS_START __sbss_start + #define SMALL_DATA_BSS_END _end + #define START_HEAP __start_heap + #define END_HEAP __end_heap +#else + #error "Unexpected compiler" +#endif + +#endif /* _ARC_SYMBOLS_H */
\ No newline at end of file diff --git a/libgloss/arc/arc-timer.c b/libgloss/arc/arc-timer.c index 2437407..0d3074d 100644 --- a/libgloss/arc/arc-timer.c +++ b/libgloss/arc/arc-timer.c @@ -15,6 +15,8 @@ * */ +#include "arc-specific.h" + #define ARC_TIM_BUILD 0x75 #define ARC_TIM_BUILD_VER_MASK 0x00FF #define ARC_TIM_BUILD_TIM0_FL 0x0100 @@ -37,7 +39,7 @@ const unsigned int arc_timer_default = 0; static int _arc_timer_present (unsigned int tim) { - unsigned int bcr = __builtin_arc_lr (ARC_TIM_BUILD); + unsigned int bcr = read_aux_reg (ARC_TIM_BUILD); unsigned int ver = bcr & ARC_TIM_BUILD_VER_MASK; if (ver == 0) @@ -59,9 +61,9 @@ _arc_timer_read (unsigned int tim) if (_arc_timer_present (tim)) { if (tim == 0) - return __builtin_arc_lr (ARC_TIM_COUNT0); + return read_aux_reg (ARC_TIM_COUNT0); else if (tim == 1) - return __builtin_arc_lr (ARC_TIM_COUNT1); + return read_aux_reg (ARC_TIM_COUNT1); } return 0; @@ -95,14 +97,14 @@ _arc_timer_reset (unsigned int tim) return; } - ctrl = __builtin_arc_lr (tim_control); + ctrl = read_aux_reg (tim_control); /* Disable timer interrupt when programming. */ - __builtin_arc_sr (0, tim_control); + write_aux_reg (0, tim_control); /* Default limit is 24-bit, increase it to 32-bit. */ - __builtin_arc_sr (0xFFFFFFFF, tim_limit); + write_aux_reg (0xFFFFFFFF, tim_limit); /* Set NH bit to count only when processor is running. */ - __builtin_arc_sr (ctrl | ARC_TIM_CONTROL_NH_FL, tim_control); - __builtin_arc_sr (0, tim_count); + write_aux_reg (ctrl | ARC_TIM_CONTROL_NH_FL, tim_control); + write_aux_reg (0, tim_count); } } diff --git a/libgloss/arc/crt0.S b/libgloss/arc/crt0.S index 0c2a2bd..a64599e 100644 --- a/libgloss/arc/crt0.S +++ b/libgloss/arc/crt0.S @@ -41,6 +41,8 @@ the initialization code. */ +#include "arc-symbols.h" + /* Compatibility with older ARC GCC, that doesn't provide some of the preprocessor defines used by newlib and libgloss for ARC. */ #if defined (__Xbarrel_shifter) && !defined (__ARC_BARREL_SHIFTER__) @@ -106,11 +108,11 @@ IVT_ENTRY(IRQ_20) ; 20 0x50 80 #ifdef __ARC601__ ; Startup code for the ARC601 processor __start: - mov gp, @__SDATA_BEGIN__ - mov sp, @__stack_top ; Point to top of stack + mov gp, SMALL_DATA_BASE + mov sp, STACK_TOP ; Point to top of stack mov r5, 0 ; Zero value - mov_s r2, @__sbss_start ; r2 = start of the bss section - sub r3, @_end, r2 ; r3 = size of the bss section in bytes + mov_s r2, SMALL_DATA_BSS_START ; r2 = start of the bss section + sub r3, SMALL_DATA_BSS_START, r2 ; r3 = size of the bss section in bytes asr_s r3, r3 asr_s r3, r3 ; r3 = size of bss in words @@ -144,11 +146,11 @@ __start: #if defined (__ARC_CODE_DENSITY__) ;; Initialize jli_base - sr @__JLI_TABLE__,[jli_base] + sr __JLI_TABLE__,[jli_base] #endif - mov gp, @__SDATA_BEGIN__ - mov_s r2, @__sbss_start ; r2 = start of the bss section - sub r3, @_end, r2 ; r3 = size of the bss section in bytes + mov gp, SMALL_DATA_BASE + mov_s r2, SMALL_DATA_BSS_START ; r2 = start of the bss section + sub r3, SMALL_DATA_BSS_END, r2 ; r3 = size of the bss section in bytes ; set up the loop counter register to the size (in words) of the bss section #if defined (__ARC_BARREL_SHIFTER__) asr.f lp_count, r3, 2 @@ -158,19 +160,19 @@ __start: #endif #if defined (__ARC600__) ; loop to zero out the bss. Enter loop only if lp_count != 0 - lpnz @.Lend_zbss + lpnz .Lend_zbss add r3, pcl, 20 sr r3, [2] ; LP_END ; initialize stack pointer, and this instruction has 2 words - mov sp, @__stack_top + mov sp, STACK_TOP mov_s r3, 0 st.ab r3, [r2, 4] ; zero out the word .Lend_zbss: #else - mov sp, @__stack_top ; initialize stack pointer + mov sp, STACK_TOP ; initialize stack pointer mov_s r3,0 ; loop to zero out the bss. Enter loop only if lp_count != 0 - lpnz @.Lend_zbss + lpnz .Lend_zbss st.ab r3,[r2, 4] ; zero out the word nop .Lend_zbss: @@ -220,30 +222,30 @@ __start: #endif /* ARCv2 */ ;; Call constructors - jl @_init + jl _init ;;; Setup fini routines to be called from exit - mov_s r0, @_fini - jl @atexit + mov_s r0, _fini + jl atexit #ifdef PROFILE_SUPPORT /* Defined in gcrt0.S. */ - mov r0,@__start - mov r1,@_etext - jl @_monstartup + mov r0,__start + mov r1,_etext + jl _monstartup #endif /* PROFILE_SUPPORT */ ; branch to main mov fp,0 ; initialize frame pointer - jl @__setup_argv_and_call_main + jl __setup_argv_and_call_main #ifdef PROFILE_SUPPORT mov r13, r0 ; Save return code - jl @_mcleanup + jl _mcleanup mov r0, r13 #endif /* PROFILE_SUPPORT */ ; r0 contains exit code - j @exit + j exit .size __start, .-__start ;;; arc-main-helper.o object can be used to replace this function and @@ -258,7 +260,7 @@ __setup_argv_and_call_main: ; Call main with argc = 0 and *argv[] = 0 mov r0, 0 mov r1, 0 - jl @main + jl main pop_s blink j_s [blink] @@ -275,5 +277,5 @@ _exit_halt: nop nop #endif - b @_exit_halt -.balign 4 + b _exit_halt +.align 4 diff --git a/libgloss/arc/emsk-uart-setup.c b/libgloss/arc/emsk-uart-setup.c index b8e1ea8..16b5f7b 100644 --- a/libgloss/arc/emsk-uart-setup.c +++ b/libgloss/arc/emsk-uart-setup.c @@ -15,6 +15,7 @@ * */ +#include "arc-specific.h" #include "uart-8250.h" /* Setup UART parameters. */ @@ -22,7 +23,7 @@ int _setup_low_level (void) { const uint32_t aux_dmp_per = 0x20a; - void * const uart_base = (char *)__builtin_arc_lr(aux_dmp_per) + 0x00009000; + void * const uart_base = (char *)read_aux_reg(aux_dmp_per) + 0x00009000; const int uart_aux_mapped = 0; const uint32_t uart_clock = 50000000; const uint32_t uart_baud = 115200; diff --git a/libgloss/arc/gcrt0.S b/libgloss/arc/gcrt0.S index 0ce6b63..0526b99 100644 --- a/libgloss/arc/gcrt0.S +++ b/libgloss/arc/gcrt0.S @@ -58,7 +58,7 @@ __mcount: push r11 push r12 mov r0,blink - jl @_mcount_internal + jl _mcount_internal pop r12 pop r11 pop r10 diff --git a/libgloss/arc/hl-stub.c b/libgloss/arc/hl-stub.c index 7f5b9fa..c4d6ee6 100644 --- a/libgloss/arc/hl-stub.c +++ b/libgloss/arc/hl-stub.c @@ -15,6 +15,7 @@ * */ +#include <string.h> #include <errno.h> #include <unistd.h> #include <sys/times.h> @@ -44,6 +45,19 @@ _getpid (void) return __MYPID; } +/* We do not have 64-bit compatible hostlink fstat. */ +#if defined (__ARC64__) +int +_fstat (int fd, struct stat *st) +{ + memset (st, 0, sizeof (*st)); + st->st_mode = S_IFCHR; + st->st_blksize = 1024; + + return 0; +} +#endif + /* hostlink backend has only fstat(), so use fstat() in stat(). */ int diff --git a/libgloss/arc/hl/hl_gw.c b/libgloss/arc/hl/hl_gw.c index f576f09..4a8f878 100644 --- a/libgloss/arc/hl/hl_gw.c +++ b/libgloss/arc/hl/hl_gw.c @@ -15,6 +15,7 @@ * */ +#include <stdint.h> #include "hl_gw.h" #define HL_VERSION 1 @@ -134,7 +135,15 @@ _hl_send (volatile __uncached void *p) _hl_pkt_init (pkt_hdr, _hl_payload_used (p)); +#if defined (__ARC64__) + /* + * Here we pass only low 4 bytes of the packet address (pkt_hdr). + * The high part of the address is obtained from __HOSTLINK__ address. + */ + hdr->buf_addr = (uintptr_t) pkt_hdr & 0xFFFFFFFF; +#else hdr->buf_addr = (uint32_t) pkt_hdr; +#endif hdr->payload_size = _hl_payload_size (); hdr->host2target_addr = HL_NOADDRESS; hdr->version = HL_VERSION; diff --git a/libgloss/arc/hl/hl_toolchain.h b/libgloss/arc/hl/hl_toolchain.h index bf884bf..9460617 100644 --- a/libgloss/arc/hl/hl_toolchain.h +++ b/libgloss/arc/hl/hl_toolchain.h @@ -19,7 +19,12 @@ #define _HL_TOOLCHAIN_H #ifndef __uncached +#if defined (__ARC64__) + /* TODO: Uncached attribute is not implemented for ARCv3 yet. */ + #define __uncached +#else #define __uncached __attribute__((uncached)) +#endif #endif /* __uncached */ #ifndef __aligned @@ -43,7 +48,12 @@ #endif /* __noreturn */ #ifndef __longcall +#if defined (__ARC64__) + /* TODO: Long call attribute is not implemented for ARCv3 yet. */ + #define __longcall +#else #define __longcall __attribute__((long_call)) +#endif #endif /* __longcall */ #define HL_MAX_DCACHE_LINE 256 diff --git a/libgloss/arc/iotdk-uart-setup.c b/libgloss/arc/iotdk-uart-setup.c index e6d2ac8..a7b1183 100644 --- a/libgloss/arc/iotdk-uart-setup.c +++ b/libgloss/arc/iotdk-uart-setup.c @@ -15,6 +15,7 @@ * */ +#include "arc-specific.h" #include "uart-8250.h" /* Setup UART parameters. */ @@ -28,7 +29,7 @@ _setup_low_level (void) const uint32_t uart_baud = 115200; /* For this platform we have to enable UART clock before configuring it. */ - __builtin_arc_sr (0x01, (uint32_t) uart_base + uart_clk_ena); + write_aux_reg (0x01, (uint32_t) uart_base + uart_clk_ena); _uart_8250_setup (uart_base, uart_aux_mapped, uart_clock, uart_baud); diff --git a/libgloss/arc/nsim-syscall.h b/libgloss/arc/nsim-syscall.h index a2009f5..9d13b22 100644 --- a/libgloss/arc/nsim-syscall.h +++ b/libgloss/arc/nsim-syscall.h @@ -28,8 +28,8 @@ POSSIBILITY OF SUCH DAMAGE. */ -#ifndef _ASM_ARC_UNISTD_H -#define _ASM_ARC_UNISTD_H +#ifndef _NSIM_SYSCALL_H +#define _NSIM_SYSCALL_H #include <stdint.h> @@ -454,4 +454,4 @@ struct nsim_stat { uint32_t __unused5; }; -#endif /* _ASM_ARC_UNISTD_H */ +#endif /* _NSIM_SYSCALL_H */ diff --git a/libgloss/arc/nsim-syscalls.c b/libgloss/arc/nsim-syscalls.c index 80747e9..0a99ad5 100644 --- a/libgloss/arc/nsim-syscalls.c +++ b/libgloss/arc/nsim-syscalls.c @@ -100,7 +100,12 @@ _open (const char * pathname, int flags, int mode) } /* Should be provided by crt0.S. */ -extern void __attribute__((noreturn, long_call)) _exit_halt (); +#if defined (__ARC64__) +/* TODO: long_call is not implemented yet in GCC. Fix this when implemented. */ +extern void __attribute__((noreturn)) _exit_halt (int ret); +#else +extern void __attribute__((noreturn, long_call)) _exit_halt (int ret); +#endif void __attribute__((noreturn)) @@ -109,7 +114,7 @@ _exit (int ret) /* Doing an "exit" system call would work on nSIM with hostlink, but call to _exit_halt, which will do a CPU halt is more universal and will work in many other cases as well, including an FPGA/SoC. */ - _exit_halt (); + _exit_halt (ret); } /* This is a copy of newlib/libc/posix/_isatty.c. It is needed because nSIM diff --git a/libgloss/arc/readme-hostlink.md b/libgloss/arc/readme-hostlink.md index 0061be3..e2e5a7d 100644 --- a/libgloss/arc/readme-hostlink.md +++ b/libgloss/arc/readme-hostlink.md @@ -1,90 +1,90 @@ -Metaware hostlink IO +MetaWare Hostlink IO ==================== -This directory includes target-side implementation of Metaware hostlink -interface see Contents section. Target program can use Metaware hostlink -interface to send messages to nsim simulator or mdb debugger (it can be -attached to HW or nsim). +Target program can use MetaWare hostlink interface to send messages to nSIM +simulator or MDB debugger. -Quick start +Quick Start ----------- -To link with this version of libgloss please add `-specs=hl.specs` to baremetal -version of ARC gcc (arc-elf32). -Lets build and run simple program: +To link with MetaWare hostlink library use `-specs=hl.specs` with baremetal +version of GCC for ARC processors - `arc-elf32-gcc` for ARCv1/2 targets or +`arc64-elf-gcc` for ARCv3 targets. + +Consider this sample program named `hello.c`: - $ cat hello.c #include <stdio.h> int main() { - printf("Hello World!\n"); - - return 0; + printf("Hello, World!\n"); + return 0; } - $ arc-elf32-gcc -mcpu=hs -specs=hl.specs ./hello.c -o hello - $ nsimdrv -prop=nsim_isa_family=av2hs -prop=nsim_hlink_gnu_io_ext=1 ./hello - Hello World! -Where `-mcpu` and `-prop=nsim_isa_family` is specific to your version of ARC CPU. -Option `-prop=nsim_hlink_gnu_io_ext=1` enables GNU IO extension for nSIM which -is used for some system calls. The `nsimdrv` option `-prop=nsim_emt={0,1,2}` -enables trap emulation and should be disabled (removed or set to `0`) to use -Metaware hostlink. +Build and run it for HS3x/4x targets: + + $ arc-elf32-gcc -mcpu=hs -specs=hl.specs hello.c -o hello.elf + $ nsimdrv -tcf $NSIM_HOME/etc/tcf/templates/hs48_full.tcf -p nsim_hostlink=1 hello.elf + Hello, World! + +Build and run it for HS5x targets: + + $ arc64-elf-gcc -mcpu=hs5x -specs=hl.specs hello.c -o hello.elf + $ nsimdrv -tcf $NSIM_HOME/etc/tcf/templates/hs58_full.tcf -p nsim_hostlink=1 hello.elf + Hello, World! -**NB:** Metaware hostlink requires symbols `__HOSTLINK__` and `_hl_blockedPeek` -to be present. So stripped binary won't work properly with Metaware hostlink. +Build and run it for HS6x targets: + + $ arc64-elf-gcc -mcpu=hs6x -specs=hl.specs hello.c -o hello.elf + $ nsimdrv -tcf $NSIM_HOME/etc/tcf/templates/hs68_full.tcf -p nsim_hostlink=1 hello.elf + Hello, World! Contents -------- -* `hl/hl_gw.*` -- Hostlink gateway. This API is used in the `hl_api.*`. - Please use `hl_message()` from `hl_api.*` for hostlink - message exchange. -* `hl/hl_api.*` -- High-level API to send hostlink messages, as well as - functions to work with messages. -* `hl/hl_<syscall>.*` -- Syscall implementations through hostlink API; -* `arc-timer.*` -- Provides API to access ARC timers. Used by - `hl/hl_clock.c` in `_clock()` implementation. -* `arc-main-helper.c` -- Provides `__setup_argv_and_call_main()`. The function - is called from `__start()` in `crt0.S`. It allows - to setup `argc` and `arvg` as well as some custom - things through `_setup_low_level()`. -* `hl-setup.c` -- Provides `_setup_low_level()` for hostlink case. - It just configures default timer if it exists. Default - timer is used in the hostlink `clock()` - implementation. -* `hl-stub.c` -- Provides functions which are part of newlib but - implemented without hostlink. - e.g. `_kill()` and `_getpid()`. -* `sbrk.c` -- Provides `_sbrk()`. It uses `__start_heap` and - `__end_heap` variables. -* `libcfunc.c` -- Additional C system calls. -* `mcount.c` -- Profiler support. - -How it works + +* `hl/hl_gw.*` - Hostlink gateway. This API is used in the `hl_api.*`. + Please use `hl_message()` from `hl_api.*` for hostlink message exchange. +* `hl/hl_api.*` - High-level API to send hostlink messages, as well as + functions to work with messages. +* `hl/hl_<syscall>.*` - System calls implementations through hostlink API. +* `arc-timer.*` - Provides API to access ARC timers. Used by `hl/hl_clock.c` + in `_clock()` implementation. +* `arc-main-helper.c` - Provides `__setup_argv_and_call_main()`. The function + is called from `__start()` in `crt0.S`. It allows to setup `argc` and `arvg` + as well as some custom things through `_setup_low_level()`. +* `hl-setup.c` - Provides `_setup_low_level()` for hostlink case. It just + configures default timer if it exists. Default timer is used in the hostlink + `clock()` implementation. +* `hl-stub.c` - Provides functions which are part of newlib but implemented + without hostlink. For example, `_kill()` and `_getpid()`. +* `sbrk.c` - Provides `_sbrk()`. It uses `__start_heap` and `__end_heap` + variables. +* `libcfunc.c` - Additional C system calls. +* `mcount.c` - Profiler support. + +How It Works ------------ + Simulator looks for `__HOSTLINK__` and `_hl_blockedPeek()` symbols. `__HOSTLINK__` is the start of shared structure for message exchange and `_hl_blockedPeek()` is a function to be called when program is waiting for simulator response. When program wants to send a message it should follow: - 1. Fill `__HOSTLINK__.payload` with packed data. - Packing format is following: `{u16 type, u16 size, char data[]}`. - Supported types are `char`, `short`, `int`, `string` and `int64`. - `hl_api` provides high-level API to this. - 2. Fill `__HOSTLINK__.pkt_hdr`. See `hl_pkt_init()` from `hl_gw.c`. - 3. Fill `__HOSTLINK__.hdr`. See `hl_send()` from `hl_gw.c`. - 4. Call `_hl_blockedPeek()` to get response. - At this point message should be delivered to debugger. - Some implementations uses change of `__HOSTLINK__.hdr.target2host_addr` as - a signal that packet is sent and can be processed. Other implementations - wait for `_hl_blockedPeek()` to be called. - - It means that portable implementation must fill - `__HOSTLINK__.hdr.target2host_addr` at the last step and then call - `_hl_blockedPeek()`. - 5. `_hl_blockedPeek()` returns pointer to debugger response which can be - processed on target if needed. Because debugger and target share the same - buffer the function actually returns `__HOSTLINK__.payload` that was - filled with packed data (see step 1) by the debugger. + +1. Fill `__HOSTLINK__.payload` with packed data. Packing format is following: + `{u16 type, u16 size, char data[]}`. Supported types are `char`, `short`, + `int`, `string` and `int64`. `hl_api` provides high-level API to this. +2. Fill `__HOSTLINK__.pkt_hdr`. See `hl_pkt_init()` from `hl_gw.c`. +3. Fill `__HOSTLINK__.hdr`. See `hl_send()` from `hl_gw.c`. +4. Call `_hl_blockedPeek()` to get response. At this point message should be + delivered to debugger. Some implementations uses change of + `__HOSTLINK__.hdr.target2host_addr` as a signal that packet is sent and can + be processed. Other implementations wait for `_hl_blockedPeek()` to be + called. It means that portable implementation must fill + `__HOSTLINK__.hdr.target2host_addr` at the last step and then call + `_hl_blockedPeek()`. +5. `_hl_blockedPeek()` returns pointer to debugger response which can be + processed on target if needed. Because debugger and target share the same + buffer the function actually returns `__HOSTLINK__.payload` that was + filled with packed data (see step 1) by the debugger. diff --git a/libgloss/arc/sbrk.c b/libgloss/arc/sbrk.c index 8cb8461..2a83a5a 100644 --- a/libgloss/arc/sbrk.c +++ b/libgloss/arc/sbrk.c @@ -30,9 +30,10 @@ #include <sys/types.h> #include <sys/errno.h> +#include "arc-symbols.h" -extern char __start_heap; -extern char __end_heap; +extern char START_HEAP; +extern char END_HEAP; caddr_t _sbrk (size_t nbytes) @@ -42,7 +43,7 @@ _sbrk (size_t nbytes) if (heap_ptr == NULL) { - heap_ptr = &__start_heap; + heap_ptr = &START_HEAP; } /* Align the 'heap_ptr' so that memory will always be allocated at word @@ -50,7 +51,7 @@ _sbrk (size_t nbytes) heap_ptr = (char *) ((((unsigned long) heap_ptr) + 7) & ~7); prev_heap_ptr = heap_ptr; - if ((heap_ptr + nbytes) < &__end_heap) + if ((heap_ptr + nbytes) < &END_HEAP) { heap_ptr += nbytes; return (caddr_t) prev_heap_ptr; diff --git a/libgloss/arc/uart-8250.c b/libgloss/arc/uart-8250.c index 6f4e9f3..fd9c55f 100644 --- a/libgloss/arc/uart-8250.c +++ b/libgloss/arc/uart-8250.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <stdio.h> #include <errno.h> +#include "arc-specific.h" /* * List of UART 8250 registers with offsets: @@ -144,7 +145,7 @@ _uart_8250_write_reg (const struct _uart_8250 *uart, uint32_t reg, uint32_t value) { if (uart->aux_mapped) - __builtin_arc_sr (value, (uint32_t) uart->base + reg); + write_aux_reg (value, (uint32_t) uart->base + reg); else *(volatile uint32_t *)(uart->base + reg) = value; } @@ -154,7 +155,7 @@ static inline uint32_t _uart_8250_read_reg (const struct _uart_8250 *uart, uint32_t reg) { if (uart->aux_mapped) - return __builtin_arc_lr ((uint32_t) uart->base + reg); + return read_aux_reg ((uint32_t) uart->base + reg); else return *(volatile uint32_t *)(uart->base + reg); } diff --git a/libgloss/arc64/Makefile.inc b/libgloss/arc64/Makefile.inc new file mode 100644 index 0000000..2ab1b78 --- /dev/null +++ b/libgloss/arc64/Makefile.inc @@ -0,0 +1,44 @@ +multilibtool_LIBRARIES += %D%/libnsim.a +%C%_libnsim_a_CPPFLAGS = -I$(srcdir)/arc +%C%_libnsim_a_SOURCES = \ + arc/libcfunc.c \ + arc/nsim-syscalls.c \ + arc/sbrk.c + +multilibtool_LIBRARIES += %D%/libhl.a +%C%_libhl_a_CFLAGS = -mvolatile-di +%C%_libhl_a_CPPFLAGS = -I$(srcdir)/arc +%C%_libhl_a_SOURCES = \ + arc/arc-timer.c \ + arc/hl-stub.c \ + arc/hl-setup.c \ + arc/libcfunc.c \ + arc/sbrk.c \ + arc/hl/hl_gw.c \ + arc/hl/hl_api.c \ + arc/hl/hl_open.c \ + arc/hl/hl_close.c \ + arc/hl/hl_read.c \ + arc/hl/hl_write.c \ + arc/hl/hl_lseek.c \ + arc/hl/hl_unlink.c \ + arc/hl/hl_isatty.c \ + arc/hl/hl_clock.c \ + arc/hl/hl_gettimeofday.c \ + arc/hl/hl_argc.c \ + arc/hl/hl_argv.c \ + arc/hl/hl_exit.c + +multilibtool_DATA += \ + %D%/crt0.o \ + %D%/crtn.o \ + %D%/crti.o \ + arc/arc-main-helper.o \ + arc/nsim.specs \ + arc/hl.specs + +libobjs_a_SOURCES += \ + %D%/crt0.S \ + %D%/crtn.S \ + %D%/crti.S \ + arc/arc-main-helper.c diff --git a/libgloss/arc64/asm.h b/libgloss/arc64/asm.h new file mode 100644 index 0000000..b68c0b4 --- /dev/null +++ b/libgloss/arc64/asm.h @@ -0,0 +1,123 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _ARC64_ASM_H +#define _ARC64_ASM_H + +#if defined (__ARC64_ARCH32__) + +/* Define 32-bit word. */ +.macro WORD w + .word \w +.endm + +/* Move register immediate (short): r:reg, i:immediate */ +.macro MOVRI_S r, i + mov_s \r, \i +.endm + +/* Move register immediate (short): r:reg, ri:reg/immediate */ +.macro MOVR_S r, ri + mov_s \r, \ri +.endm + +/* Move register immediate: r:reg, ri:reg/immediate */ +.macro MOVR r, ri + mov \r, \ri +.endm + +/* Push register: r:reg */ +.macro PUSHR r + push \r +.endm + +/* Pop register: r:reg */ +.macro POPR r + pop \r +.endm + +/* Subtract register: r1(reg), r2(reg), r3(reg) */ +.macro SUBR r1, r2, r3 + sub \r1, \r2, \r3 +.endm + +/* Add PCL-rel: r:reg, symb: symbol */ +.macro ADDPCL r,symb + add \r, pcl, \symb +.endm + +#elif defined (__ARC64_ARCH64__) + +/* Define 64-bit word. */ +.macro WORD w + .xword \w +.endm + +/* Move immediate (short): r:reg, i:immediate */ +.macro MOVRI_S r, i + movhl_s \r, \i + orl_s \r, \r, \i +.endm + +/* Move register immediate (short): r:reg, ri:reg/immediate */ +.macro MOVR_S r, ri + movl_s \r, \ri +.endm + +/* Move register immediate: r:reg, ri:reg/immediate */ +.macro MOVR r, ri + movl \r, \ri +.endm + +/* Push register: r:reg */ +.macro PUSHR r + pushl_s \r +.endm + +/* Pop register: r:reg */ +.macro POPR r + popl_s \r +.endm + +/* Subtract register: r1(reg), r2(reg), r3(reg) */ +.macro SUBR r1, r2, r3 + subl \r1, \r2, \r3 +.endm + +/* Add PCL-rel: r:reg, symb: symbol */ +.macro ADDPCL r, symb + addl \r, pcl, \symb@pcl +.endm + +#else /* !__ARC64_ARC32__ && !__ARC64_ARC64__ */ +# error Please use either 32-bit or 64-bit version of arc64 compiler +#endif + +#endif /* _ARC64_ASM_H */ diff --git a/libgloss/arc64/crt0.S b/libgloss/arc64/crt0.S new file mode 100644 index 0000000..c5fe57b --- /dev/null +++ b/libgloss/arc64/crt0.S @@ -0,0 +1,160 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +/* + The startup code for the ARC family of processors does the following before + transferring control to user defined main label: + 1. Set sp to __stack_top (link time variable) + 2. Zero out the bss section (for uninitialized globals) + After returning from main, the processor is halted and the pipeline is + flushed out. +*/ + +#include "asm.h" +#include "../arc/arc-symbols.h" + + .macro initfp from=0, to=31 + fmvi2s f0+\from,r0 + .if \to-\from + initfp "(\from+1)",\to + .endif + .endm + + .extern main + + .section .text.__startup, "ax", @progbits + .global __start + .type __start, @function + .align 4 +__start: + MOVRI_S sp, STACK_TOP ; Stack address + + ; Allow unaligned accesses. + lr r2, [0xA] + bset r2, r2, 19 + flag r2 + +;;; Clear the bss segment. + MOVRI_S r0, SMALL_DATA_BSS_START ; r0 = start of the bss section + MOVRI_S r2, SMALL_DATA_BSS_END + SUBR r2, r2, r0 ; r2 = size of the bss section in bytes + MOVR_S r1, 0 ; r1 = bytes to fill in + bl memset + +;;; Clear the registers. + MOVR_S r0, 0 + MOVR_S r1, 0 + MOVR_S r2, 0 + MOVR_S r3, 0 + MOVR_S r4, 0 + MOVR_S r5, 0 + MOVR_S r6, 0 + MOVR_S r7, 0 + MOVR_S r8, 0 + MOVR_S r9, 0 + MOVR_S r10, 0 + MOVR_S r11, 0 + MOVR_S r12, 0 + MOVR_S r13, 0 + MOVR_S r14, 0 + MOVR_S r15, 0 + MOVR_S r16, 0 + MOVR_S r17, 0 + MOVR_S r18, 0 + MOVR_S r19, 0 + MOVR_S r20, 0 + MOVR_S r21, 0 + MOVR_S r22, 0 + MOVR_S r23, 0 + MOVR_S r24, 0 + MOVR_S r25, 0 + MOVR_S r26, 0 + MOVR_S r27, 0 + ;; SP (r28) is initialized + MOVR_S ilink, 0 + MOVR r30, 0 + +#if defined(__ARC_FPU_DP__) || defined (__ARC_FPU_SP__) + initfp 0,31 +#endif + + ;; Call constructors. + jl _init + +;;; Setup fini routines to be called from exit + MOVRI_S r0, _fini + jl atexit + + jl __setup_argv_and_call_main + + j exit + .size __start, .-__start + +;;; arc-main-helper.o object can be used to replace this function +;;; and properly set up arguments and/or other low-level stuff. + .section .text.__setup_argv_and_call_main,"ax",@progbits + .weak __setup_argv_and_call_main + .type __setup_argv_and_call_main, @function + .align 4 + +__setup_argv_and_call_main: + PUSHR blink +;;; Call main() with argv[0] set to "baremetal", argv[1] to NULL and empty envp + MOVR_S r0, 1 ; Set argc to 1 + ADDPCL r1,.argv_data ; Set argv to the appropriate pointer + MOVR_S r2, 0 + MOVR_S r3, 0 + + MOVRI_S blink, main + jl [blink] + + POPR blink + j_s [blink] + + .align 4 + ;; Dummy program name +.prog_name: + .string "baremetal" +;; argv data +.argv_data: + WORD @.prog_name + WORD 0x00 + .size __setup_argv_and_call_main, .-__setup_argv_and_call_main + + .section .text._exit_halt,"ax",@progbits + .global _exit_halt + .type _exit_halt, @function + .align 4 +_exit_halt: + ; r0 contains exit code + mov r0, r0 + flag 1 + b _exit_halt + .size _exit_halt, .-_exit_halt diff --git a/libgloss/arc64/crti.S b/libgloss/arc64/crti.S new file mode 100644 index 0000000..4921cdf --- /dev/null +++ b/libgloss/arc64/crti.S @@ -0,0 +1,50 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +/* + This file contains the stack frame setup for contents of the .fini and + .init sections. +*/ + +#include "asm.h" + + .section .init + .global _init + WORD 0 + .type _init,@function +_init: + PUSHR blink + + .section .fini + .global _fini + WORD 0 + .type _fini,@function +_fini: + PUSHR blink diff --git a/libgloss/arc64/crtn.S b/libgloss/arc64/crtn.S new file mode 100644 index 0000000..baa31d4 --- /dev/null +++ b/libgloss/arc64/crtn.S @@ -0,0 +1,45 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +/* + This file just makes sure that the .fini and .init sections do in + fact return. This file is the last thing linked into any executable. +*/ + +#include "asm.h" + + .section .init + POPR blink + j_s [blink] + + + .section .fini + POPR blink + j_s [blink] diff --git a/libgloss/configure b/libgloss/configure index 562f1ff..a0cc8b5 100755 --- a/libgloss/configure +++ b/libgloss/configure @@ -722,6 +722,8 @@ CONFIG_BFIN_FALSE CONFIG_BFIN_TRUE CONFIG_ARM_FALSE CONFIG_ARM_TRUE +CONFIG_ARC64_FALSE +CONFIG_ARC64_TRUE CONFIG_ARC_FALSE CONFIG_ARC_TRUE CONFIG_AARCH64_FALSE @@ -2825,9 +2827,12 @@ case "${target}" in config_aarch64=true config_testsuite=true ;; - arc*-*-*) + arc-*-* | arceb-*-*) config_arc=true ;; + arc[6432]*-*-*) + config_arc64=true + ;; csky*-*-*) config_csky=true ;; @@ -3015,6 +3020,14 @@ else CONFIG_ARC_FALSE= fi + if test x$config_arc64 = xtrue; then + CONFIG_ARC64_TRUE= + CONFIG_ARC64_FALSE='#' +else + CONFIG_ARC64_TRUE='#' + CONFIG_ARC64_FALSE= +fi + if test x$config_arm = xtrue; then CONFIG_ARM_TRUE= CONFIG_ARM_FALSE='#' @@ -5336,7 +5349,7 @@ case "${target}" in *-*-cygwin*) ;; a29k-amd-udi) ;; aarch64*-*-*) ;; - arc-*-*) ;; + arc*-*-*) ;; arm*-*-*) ;; bfin-*-*) ;; cris-*-* | crisv32-*-*) ;; @@ -5804,6 +5817,10 @@ if test -z "${CONFIG_ARC_TRUE}" && test -z "${CONFIG_ARC_FALSE}"; then as_fn_error $? "conditional \"CONFIG_ARC\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${CONFIG_ARC64_TRUE}" && test -z "${CONFIG_ARC64_FALSE}"; then + as_fn_error $? "conditional \"CONFIG_ARC64\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${CONFIG_ARM_TRUE}" && test -z "${CONFIG_ARM_FALSE}"; then as_fn_error $? "conditional \"CONFIG_ARM\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 diff --git a/libgloss/configure.ac b/libgloss/configure.ac index be7cb12..628f173 100644 --- a/libgloss/configure.ac +++ b/libgloss/configure.ac @@ -51,9 +51,12 @@ case "${target}" in config_aarch64=true config_testsuite=true ;; - arc*-*-*) + arc-*-* | arceb-*-*) config_arc=true ;; + arc[[6432]]*-*-*) + config_arc64=true + ;; csky*-*-*) config_csky=true ;; @@ -217,7 +220,7 @@ AC_SUBST(subdirs) dnl These subdirs have converted to non-recursive make. Hopefully someday all dnl the ports above will too! m4_foreach_w([SUBDIR], [ - aarch64 arc arm bfin cr16 csky d30v epiphany fr30 frv ft32 i386 i960 iq2000 + aarch64 arc arc64 arm bfin cr16 csky d30v epiphany fr30 frv ft32 i386 i960 iq2000 libnosys lm32 m32r mcore microblaze mn10200 mn10300 moxie msp430 nds32 nios2 or1k pru riscv rl78 rx sparc sparc_leon tic6x v850 visium diff --git a/libgloss/libnosys/acinclude.m4 b/libgloss/libnosys/acinclude.m4 index df7433e..abb4567 100644 --- a/libgloss/libnosys/acinclude.m4 +++ b/libgloss/libnosys/acinclude.m4 @@ -3,7 +3,7 @@ case "${target}" in *-*-cygwin*) ;; a29k-amd-udi) ;; aarch64*-*-*) ;; - arc-*-*) ;; + arc*-*-*) ;; arm*-*-*) ;; bfin-*-*) ;; cris-*-* | crisv32-*-*) ;; diff --git a/libgloss/xtensa/Makefile.inc b/libgloss/xtensa/Makefile.inc index b4c8187..5cdb4ef 100644 --- a/libgloss/xtensa/Makefile.inc +++ b/libgloss/xtensa/Makefile.inc @@ -22,6 +22,7 @@ multilibtool_DATA += \ %D%/crt1-boards.o %C%_libgloss_a_SOURCES = \ + %D%/clibrary_init.c \ %D%/sleep.S \ %D%/syscalls.c \ %D%/window-vectors.S diff --git a/newlib/libc/sys/xtensa/clibrary_init.c b/libgloss/xtensa/clibrary_init.c index 24d4cf9..b8c7d3a 100644 --- a/newlib/libc/sys/xtensa/clibrary_init.c +++ b/libgloss/xtensa/clibrary_init.c @@ -1,6 +1,6 @@ /* Copyright (c) 2003-2006 Tensilica Inc. ALL RIGHTS RESERVED. - Redistribution and use in source and binary forms, with or without + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright @@ -29,8 +29,8 @@ const char * __progname = 0; void __clibrary_init (int argc, char **argv, char **envp, - void (*init)(void), - void (*fini)(void)) + void (*init)(void), + void (*fini)(void)) { if (argv != 0) __progname = *argv; diff --git a/newlib/Makefile.am b/newlib/Makefile.am index 4ab36b8..00088b6 100644 --- a/newlib/Makefile.am +++ b/newlib/Makefile.am @@ -233,7 +233,11 @@ stmp-targ-include: config.status fi $(AM_V_at)s=machine/$(machine_dir)/machine d=machine $(TARG_INCLUDE_CP_DIR) $(AM_V_at)s=machine/$(machine_dir)/sys d=sys $(TARG_INCLUDE_CP_DIR) - $(AM_V_at)s=machine/$(machine_dir)/include d= $(TARG_INCLUDE_CP_DIR) + $(AM_V_at)for i in $(call rwildcard,$(srcdir)/libc/machine/$(machine_dir)/include/,*.h); do \ + f=`echo $$i | sed s:^$(srcdir)/libc/machine/$(machine_dir)/include/::`; \ + $(MKDIR_P) targ-include/`dirname $$f`; \ + cp $$i targ-include/$$f; \ + done $(AM_V_at)s=sys/$(sys_dir)/include d= $(TARG_INCLUDE_CP_DIR) $(AM_V_at)for i in $(call rwildcard,$(srcdir)/libc/sys/$(sys_dir)/include/,*.h); do \ f=`echo $$i | sed s:^$(srcdir)/libc/sys/$(sys_dir)/include/::`; \ @@ -308,10 +312,10 @@ install-data-local: install-toollibLIBRARIES install-multi $(INSTALL_DATA_LOCAL) $(INSTALL_DATA) $$i $(DESTDIR)$(tooldir)/include/sys/`basename $$i`; \ else true; fi ; \ done ; \ - for i in $(srcdir)/libc/machine/$(machine_dir)/include/*.h; do \ - if [ -f $$i ]; then \ - $(INSTALL_DATA) $$i $(DESTDIR)$(tooldir)/include/`basename $$i`; \ - else true; fi ; \ + for i in $(call rwildcard,$(srcdir)/libc/machine/$(machine_dir)/include/,*.h); do \ + f=`echo $$i | sed s:^$(srcdir)/libc/machine/$(machine_dir)/::`; \ + $(MKDIR_P) $(DESTDIR)$(tooldir)/`dirname $$f`; \ + $(INSTALL_DATA) $$i $(DESTDIR)$(tooldir)/`dirname $$f`; \ done ; \ for i in $(srcdir)/libc/sys/$(sys_dir)/sys/*.h; do \ if [ -f $$i ]; then \ diff --git a/newlib/Makefile.in b/newlib/Makefile.in index b45c42c..f25db3b 100644 --- a/newlib/Makefile.in +++ b/newlib/Makefile.in @@ -701,7 +701,21 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_ARC_TRUE@ libc/machine/arc/strncpy-stub.c \ @HAVE_LIBC_MACHINE_ARC_TRUE@ libc/machine/arc/strncpy-bs.S -@HAVE_LIBC_MACHINE_ARM_TRUE@am__append_69 = \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@am__append_69 = \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memcmp.S \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memcmp-stub.c \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memcpy.S \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memcpy-stub.c \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memset.S \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memset-stub.c \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/setjmp.S \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/strlen.S \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/strcat.S \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memmove.S\ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/strcmp.S \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/memchr.S + +@HAVE_LIBC_MACHINE_ARM_TRUE@am__append_70 = \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/setjmp.S libc/machine/arm/strcmp.S libc/machine/arm/strcpy.c \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/aeabi_memcpy.c libc/machine/arm/aeabi_memcpy-armv7a.S \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/aeabi_memmove.c libc/machine/arm/aeabi_memmove-soft.S \ @@ -713,39 +727,39 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/strlen-stub.c \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/strlen.S -@HAVE_LIBC_MACHINE_BFIN_TRUE@am__append_70 = libc/machine/bfin/setjmp.S libc/machine/bfin/longjmp.S -@HAVE_LIBC_MACHINE_CR16_TRUE@am__append_71 = libc/machine/cr16/setjmp.S libc/machine/cr16/getenv.c -@HAVE_LIBC_MACHINE_CRIS_TRUE@am__append_72 = libc/machine/cris/setjmp.c libc/machine/cris/memcpy.c libc/machine/cris/memset.c libc/machine/cris/memmove.c libc/machine/cris/libcdtor.c +@HAVE_LIBC_MACHINE_BFIN_TRUE@am__append_71 = libc/machine/bfin/setjmp.S libc/machine/bfin/longjmp.S +@HAVE_LIBC_MACHINE_CR16_TRUE@am__append_72 = libc/machine/cr16/setjmp.S libc/machine/cr16/getenv.c +@HAVE_LIBC_MACHINE_CRIS_TRUE@am__append_73 = libc/machine/cris/setjmp.c libc/machine/cris/memcpy.c libc/machine/cris/memset.c libc/machine/cris/memmove.c libc/machine/cris/libcdtor.c # We also make a library with just the useful # machine-but-not-system-specific functions, usable as an add-on # by itself together with e.g. uclibc. -@HAVE_LIBC_MACHINE_CRIS_TRUE@am__append_73 = libc/machine/cris/libic.a -@HAVE_LIBC_MACHINE_CRX_TRUE@am__append_74 = libc/machine/crx/setjmp.S libc/machine/crx/getenv.c -@HAVE_LIBC_MACHINE_CSKY_TRUE@am__append_75 = libc/machine/csky/setjmp.S -@HAVE_LIBC_MACHINE_D10V_TRUE@am__append_76 = libc/machine/d10v/setjmp.S -@HAVE_LIBC_MACHINE_D30V_TRUE@am__append_77 = libc/machine/d30v/setjmp.S -@HAVE_LIBC_MACHINE_EPIPHANY_TRUE@am__append_78 = libc/machine/epiphany/setjmp.S -@HAVE_LIBC_MACHINE_FR30_TRUE@am__append_79 = libc/machine/fr30/setjmp.S -@HAVE_LIBC_MACHINE_FRV_TRUE@am__append_80 = libc/machine/frv/setjmp.S -@HAVE_LIBC_MACHINE_FT32_TRUE@am__append_81 = libc/machine/ft32/setjmp.S libc/machine/ft32/strlen.S libc/machine/ft32/memcpy.S libc/machine/ft32/strcmp.S libc/machine/ft32/memset.S libc/machine/ft32/strcpy.S -@HAVE_LIBC_MACHINE_H8300_TRUE@am__append_82 = \ +@HAVE_LIBC_MACHINE_CRIS_TRUE@am__append_74 = libc/machine/cris/libic.a +@HAVE_LIBC_MACHINE_CRX_TRUE@am__append_75 = libc/machine/crx/setjmp.S libc/machine/crx/getenv.c +@HAVE_LIBC_MACHINE_CSKY_TRUE@am__append_76 = libc/machine/csky/setjmp.S +@HAVE_LIBC_MACHINE_D10V_TRUE@am__append_77 = libc/machine/d10v/setjmp.S +@HAVE_LIBC_MACHINE_D30V_TRUE@am__append_78 = libc/machine/d30v/setjmp.S +@HAVE_LIBC_MACHINE_EPIPHANY_TRUE@am__append_79 = libc/machine/epiphany/setjmp.S +@HAVE_LIBC_MACHINE_FR30_TRUE@am__append_80 = libc/machine/fr30/setjmp.S +@HAVE_LIBC_MACHINE_FRV_TRUE@am__append_81 = libc/machine/frv/setjmp.S +@HAVE_LIBC_MACHINE_FT32_TRUE@am__append_82 = libc/machine/ft32/setjmp.S libc/machine/ft32/strlen.S libc/machine/ft32/memcpy.S libc/machine/ft32/strcmp.S libc/machine/ft32/memset.S libc/machine/ft32/strcpy.S +@HAVE_LIBC_MACHINE_H8300_TRUE@am__append_83 = \ @HAVE_LIBC_MACHINE_H8300_TRUE@ libc/machine/h8300/reg_memcpy.S libc/machine/h8300/reg_memset.S libc/machine/h8300/strcmp.S libc/machine/h8300/memcpy.S libc/machine/h8300/memset.S \ @HAVE_LIBC_MACHINE_H8300_TRUE@ libc/machine/h8300/setjmp.S libc/machine/h8300/h8sx_strcpy.S -@HAVE_LIBC_MACHINE_H8500_TRUE@am__append_83 = libc/machine/h8500/divsi3.c libc/machine/h8500/mulsi3.c libc/machine/h8500/divhi3.S libc/machine/h8500/shifts.c libc/machine/h8500/cmpsi.c libc/machine/h8500/psi.S libc/machine/h8500/setjmp.S -@HAVE_LIBC_MACHINE_HPPA_TRUE@am__append_84 = \ +@HAVE_LIBC_MACHINE_H8500_TRUE@am__append_84 = libc/machine/h8500/divsi3.c libc/machine/h8500/mulsi3.c libc/machine/h8500/divhi3.S libc/machine/h8500/shifts.c libc/machine/h8500/cmpsi.c libc/machine/h8500/psi.S libc/machine/h8500/setjmp.S +@HAVE_LIBC_MACHINE_HPPA_TRUE@am__append_85 = \ @HAVE_LIBC_MACHINE_HPPA_TRUE@ libc/machine/hppa/memchr.S libc/machine/hppa/memcmp.S libc/machine/hppa/memcpy.S libc/machine/hppa/memset.S \ @HAVE_LIBC_MACHINE_HPPA_TRUE@ libc/machine/hppa/setjmp.S \ @HAVE_LIBC_MACHINE_HPPA_TRUE@ libc/machine/hppa/strcat.S libc/machine/hppa/strcmp.S \ @HAVE_LIBC_MACHINE_HPPA_TRUE@ libc/machine/hppa/strcpy.S libc/machine/hppa/strlen.S libc/machine/hppa/strncat.S libc/machine/hppa/strncmp.S libc/machine/hppa/strncpy.S -@HAVE_LIBC_MACHINE_I386_TRUE@@MACH_ADD_SETJMP_TRUE@am__append_85 = libc/machine/i386/setjmp.S -@HAVE_LIBC_MACHINE_I386_TRUE@am__append_86 = \ +@HAVE_LIBC_MACHINE_I386_TRUE@@MACH_ADD_SETJMP_TRUE@am__append_86 = libc/machine/i386/setjmp.S +@HAVE_LIBC_MACHINE_I386_TRUE@am__append_87 = \ @HAVE_LIBC_MACHINE_I386_TRUE@ libc/machine/i386/memchr.S libc/machine/i386/memcmp.S libc/machine/i386/memcpy.S libc/machine/i386/memset.S libc/machine/i386/strchr.S \ @HAVE_LIBC_MACHINE_I386_TRUE@ libc/machine/i386/memmove.S libc/machine/i386/strlen.S libc/machine/i386/i386mach.h -@HAVE_LIBC_MACHINE_I960_TRUE@am__append_87 = \ +@HAVE_LIBC_MACHINE_I960_TRUE@am__append_88 = \ @HAVE_LIBC_MACHINE_I960_TRUE@ libc/machine/i960/memccpy_ca.S \ @HAVE_LIBC_MACHINE_I960_TRUE@ libc/machine/i960/memccpy.S \ @HAVE_LIBC_MACHINE_I960_TRUE@ libc/machine/i960/memchr_ca.S \ @@ -775,43 +789,43 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_I960_TRUE@ libc/machine/i960/strpbrk.S \ @HAVE_LIBC_MACHINE_I960_TRUE@ libc/machine/i960/strrchr.S -@HAVE_LIBC_MACHINE_IQ2000_TRUE@am__append_88 = libc/machine/iq2000/setjmp.S -@HAVE_LIBC_MACHINE_LM32_TRUE@am__append_89 = libc/machine/lm32/setjmp.S -@HAVE_LIBC_MACHINE_M32C_TRUE@am__append_90 = libc/machine/m32c/setjmp.S -@HAVE_LIBC_MACHINE_M32R_TRUE@am__append_91 = libc/machine/m32r/setjmp.S -@HAVE_LIBC_MACHINE_M68HC11_TRUE@am__append_92 = libc/machine/m68hc11/setjmp.S -@HAVE_LIBC_MACHINE_M68K_TRUE@am__append_93 = libc/machine/m68k/setjmp.S libc/machine/m68k/strcpy.c libc/machine/m68k/strlen.c libc/machine/m68k/memcpy.S libc/machine/m68k/memset.S -@HAVE_LIBC_MACHINE_M88K_TRUE@am__append_94 = libc/machine/m88k/setjmp.S -@HAVE_LIBC_MACHINE_MEP_TRUE@am__append_95 = libc/machine/mep/setjmp.S -@HAVE_LIBC_MACHINE_MICROBLAZE_TRUE@am__append_96 = libc/machine/microblaze/strlen.c libc/machine/microblaze/strcmp.c libc/machine/microblaze/strcpy.c libc/machine/microblaze/setjmp.S libc/machine/microblaze/longjmp.S -@HAVE_LIBC_MACHINE_MIPS_TRUE@am__append_97 = libc/machine/mips/setjmp.S libc/machine/mips/strlen.c libc/machine/mips/strcmp.S libc/machine/mips/strncpy.c libc/machine/mips/memset.S libc/machine/mips/memcpy.S -@HAVE_LIBC_MACHINE_MN10200_TRUE@am__append_98 = libc/machine/mn10200/setjmp.S -@HAVE_LIBC_MACHINE_MN10300_TRUE@am__append_99 = \ +@HAVE_LIBC_MACHINE_IQ2000_TRUE@am__append_89 = libc/machine/iq2000/setjmp.S +@HAVE_LIBC_MACHINE_LM32_TRUE@am__append_90 = libc/machine/lm32/setjmp.S +@HAVE_LIBC_MACHINE_M32C_TRUE@am__append_91 = libc/machine/m32c/setjmp.S +@HAVE_LIBC_MACHINE_M32R_TRUE@am__append_92 = libc/machine/m32r/setjmp.S +@HAVE_LIBC_MACHINE_M68HC11_TRUE@am__append_93 = libc/machine/m68hc11/setjmp.S +@HAVE_LIBC_MACHINE_M68K_TRUE@am__append_94 = libc/machine/m68k/setjmp.S libc/machine/m68k/strcpy.c libc/machine/m68k/strlen.c libc/machine/m68k/memcpy.S libc/machine/m68k/memset.S +@HAVE_LIBC_MACHINE_M88K_TRUE@am__append_95 = libc/machine/m88k/setjmp.S +@HAVE_LIBC_MACHINE_MEP_TRUE@am__append_96 = libc/machine/mep/setjmp.S +@HAVE_LIBC_MACHINE_MICROBLAZE_TRUE@am__append_97 = libc/machine/microblaze/strlen.c libc/machine/microblaze/strcmp.c libc/machine/microblaze/strcpy.c libc/machine/microblaze/setjmp.S libc/machine/microblaze/longjmp.S +@HAVE_LIBC_MACHINE_MIPS_TRUE@am__append_98 = libc/machine/mips/setjmp.S libc/machine/mips/strlen.c libc/machine/mips/strcmp.S libc/machine/mips/strncpy.c libc/machine/mips/memset.S libc/machine/mips/memcpy.S +@HAVE_LIBC_MACHINE_MN10200_TRUE@am__append_99 = libc/machine/mn10200/setjmp.S +@HAVE_LIBC_MACHINE_MN10300_TRUE@am__append_100 = \ @HAVE_LIBC_MACHINE_MN10300_TRUE@ libc/machine/mn10300/setjmp.S libc/machine/mn10300/memchr.S libc/machine/mn10300/memcmp.S libc/machine/mn10300/memcpy.S libc/machine/mn10300/memset.S libc/machine/mn10300/strchr.S \ @HAVE_LIBC_MACHINE_MN10300_TRUE@ libc/machine/mn10300/strcmp.S libc/machine/mn10300/strcpy.S libc/machine/mn10300/strlen.S -@HAVE_LIBC_MACHINE_MOXIE_TRUE@am__append_100 = libc/machine/moxie/setjmp.S -@HAVE_LIBC_MACHINE_MSP430_TRUE@am__append_101 = libc/machine/msp430/setjmp.S -@HAVE_LIBC_MACHINE_MSP430_TRUE@@NEWLIB_NANO_FORMATTED_IO_TRUE@am__append_102 = libc/machine/msp430/tiny-puts.c libc/machine/msp430/tiny-printf.c -@HAVE_LIBC_MACHINE_MT_TRUE@am__append_103 = libc/machine/mt/setjmp.S -@HAVE_LIBC_MACHINE_NDS32_TRUE@am__append_104 = \ +@HAVE_LIBC_MACHINE_MOXIE_TRUE@am__append_101 = libc/machine/moxie/setjmp.S +@HAVE_LIBC_MACHINE_MSP430_TRUE@am__append_102 = libc/machine/msp430/setjmp.S +@HAVE_LIBC_MACHINE_MSP430_TRUE@@NEWLIB_NANO_FORMATTED_IO_TRUE@am__append_103 = libc/machine/msp430/tiny-puts.c libc/machine/msp430/tiny-printf.c +@HAVE_LIBC_MACHINE_MT_TRUE@am__append_104 = libc/machine/mt/setjmp.S +@HAVE_LIBC_MACHINE_NDS32_TRUE@am__append_105 = \ @HAVE_LIBC_MACHINE_NDS32_TRUE@ libc/machine/nds32/abort.c \ @HAVE_LIBC_MACHINE_NDS32_TRUE@ libc/machine/nds32/setjmp.S \ @HAVE_LIBC_MACHINE_NDS32_TRUE@ libc/machine/nds32/strcmp.S \ @HAVE_LIBC_MACHINE_NDS32_TRUE@ libc/machine/nds32/strcpy.S -@HAVE_LIBC_MACHINE_NDS32_TRUE@@IS_NDS32_ISA_V3M_FALSE@am__append_105 = libc/machine/nds32/memcpy.S libc/machine/nds32/memset.S -@HAVE_LIBC_MACHINE_NECV70_TRUE@am__append_106 = libc/machine/necv70/fastmath.S libc/machine/necv70/setjmp.S -@HAVE_LIBC_MACHINE_NIOS2_TRUE@am__append_107 = libc/machine/nios2/setjmp.s -@HAVE_LIBC_MACHINE_NVPTX_TRUE@am__append_108 = \ +@HAVE_LIBC_MACHINE_NDS32_TRUE@@IS_NDS32_ISA_V3M_FALSE@am__append_106 = libc/machine/nds32/memcpy.S libc/machine/nds32/memset.S +@HAVE_LIBC_MACHINE_NECV70_TRUE@am__append_107 = libc/machine/necv70/fastmath.S libc/machine/necv70/setjmp.S +@HAVE_LIBC_MACHINE_NIOS2_TRUE@am__append_108 = libc/machine/nios2/setjmp.s +@HAVE_LIBC_MACHINE_NVPTX_TRUE@am__append_109 = \ @HAVE_LIBC_MACHINE_NVPTX_TRUE@ libc/machine/nvptx/_exit.c \ @HAVE_LIBC_MACHINE_NVPTX_TRUE@ libc/machine/nvptx/calloc.c libc/machine/nvptx/callocr.c libc/machine/nvptx/malloc.c libc/machine/nvptx/mallocr.c libc/machine/nvptx/realloc.c libc/machine/nvptx/reallocr.c \ @HAVE_LIBC_MACHINE_NVPTX_TRUE@ libc/machine/nvptx/free.c libc/machine/nvptx/write.c libc/machine/nvptx/assert.c libc/machine/nvptx/puts.c libc/machine/nvptx/putchar.c libc/machine/nvptx/printf.c libc/machine/nvptx/abort.c \ @HAVE_LIBC_MACHINE_NVPTX_TRUE@ libc/machine/nvptx/misc.c libc/machine/nvptx/clock.c -@HAVE_LIBC_MACHINE_OR1K_TRUE@am__append_109 = libc/machine/or1k/setjmp.S -@HAVE_LIBC_MACHINE_POWERPC_TRUE@am__append_110 = libc/machine/powerpc/setjmp.S -@HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_ALTIVEC_TRUE@am__append_111 = \ +@HAVE_LIBC_MACHINE_OR1K_TRUE@am__append_110 = libc/machine/or1k/setjmp.S +@HAVE_LIBC_MACHINE_POWERPC_TRUE@am__append_111 = libc/machine/powerpc/setjmp.S +@HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_ALTIVEC_TRUE@am__append_112 = \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_ALTIVEC_TRUE@ libc/machine/powerpc/vfprintf.c \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_ALTIVEC_TRUE@ libc/machine/powerpc/vfscanf.c \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_ALTIVEC_TRUE@ libc/machine/powerpc/vec_malloc.c \ @@ -822,7 +836,7 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_ALTIVEC_TRUE@ libc/machine/powerpc/vec_callocr.c \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_ALTIVEC_TRUE@ libc/machine/powerpc/vec_reallocr.c -@HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_SPE_TRUE@am__append_112 = \ +@HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_SPE_TRUE@am__append_113 = \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_SPE_TRUE@ libc/machine/powerpc/atosfix16.c \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_SPE_TRUE@ libc/machine/powerpc/atosfix32.c \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_SPE_TRUE@ libc/machine/powerpc/atosfix64.c \ @@ -840,21 +854,21 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_SPE_TRUE@ libc/machine/powerpc/vfprintf.c \ @HAVE_LIBC_MACHINE_POWERPC_TRUE@@HAVE_POWERPC_SPE_TRUE@ libc/machine/powerpc/vfscanf.c -@HAVE_LIBC_MACHINE_PRU_TRUE@am__append_113 = libc/machine/pru/setjmp.s -@HAVE_LIBC_MACHINE_RISCV_TRUE@am__append_114 = \ +@HAVE_LIBC_MACHINE_PRU_TRUE@am__append_114 = libc/machine/pru/setjmp.s +@HAVE_LIBC_MACHINE_RISCV_TRUE@am__append_115 = \ @HAVE_LIBC_MACHINE_RISCV_TRUE@ libc/machine/riscv/memmove.S libc/machine/riscv/memmove-stub.c libc/machine/riscv/memset.S libc/machine/riscv/memcpy-asm.S libc/machine/riscv/memcpy.c libc/machine/riscv/strlen.c \ @HAVE_LIBC_MACHINE_RISCV_TRUE@ libc/machine/riscv/strcpy.c libc/machine/riscv/strcmp.S libc/machine/riscv/setjmp.S libc/machine/riscv/ieeefp.c libc/machine/riscv/ffs.c -@HAVE_LIBC_MACHINE_RL78_TRUE@am__append_115 = libc/machine/rl78/setjmp.S -@HAVE_LIBC_MACHINE_RX_TRUE@am__append_116 = \ +@HAVE_LIBC_MACHINE_RL78_TRUE@am__append_116 = libc/machine/rl78/setjmp.S +@HAVE_LIBC_MACHINE_RX_TRUE@am__append_117 = \ @HAVE_LIBC_MACHINE_RX_TRUE@ libc/machine/rx/setjmp.S \ @HAVE_LIBC_MACHINE_RX_TRUE@ libc/machine/rx/strncmp.S libc/machine/rx/strcmp.S libc/machine/rx/strncpy.S libc/machine/rx/strcpy.S libc/machine/rx/strlen.S libc/machine/rx/strcat.S libc/machine/rx/strncat.S \ @HAVE_LIBC_MACHINE_RX_TRUE@ libc/machine/rx/memset.S libc/machine/rx/mempcpy.S libc/machine/rx/memcpy.S libc/machine/rx/memmove.S libc/machine/rx/memchr.S -@HAVE_LIBC_MACHINE_SH_TRUE@am__append_117 = libc/machine/sh/memcpy.S libc/machine/sh/memset.S libc/machine/sh/setjmp.S libc/machine/sh/strcpy.S libc/machine/sh/strlen.S libc/machine/sh/strcmp.S -@HAVE_LIBC_MACHINE_SH_TRUE@@SH64_TRUE@am__append_118 = libc/machine/sh/strncpy.S -@HAVE_LIBC_MACHINE_SPARC_TRUE@am__append_119 = libc/machine/sparc/scan.c libc/machine/sparc/shuffle.c libc/machine/sparc/setjmp.S -@HAVE_LIBC_MACHINE_SPU_TRUE@am__append_120 = \ +@HAVE_LIBC_MACHINE_SH_TRUE@am__append_118 = libc/machine/sh/memcpy.S libc/machine/sh/memset.S libc/machine/sh/setjmp.S libc/machine/sh/strcpy.S libc/machine/sh/strlen.S libc/machine/sh/strcmp.S +@HAVE_LIBC_MACHINE_SH_TRUE@@SH64_TRUE@am__append_119 = libc/machine/sh/strncpy.S +@HAVE_LIBC_MACHINE_SPARC_TRUE@am__append_120 = libc/machine/sparc/scan.c libc/machine/sparc/shuffle.c libc/machine/sparc/setjmp.S +@HAVE_LIBC_MACHINE_SPU_TRUE@am__append_121 = \ @HAVE_LIBC_MACHINE_SPU_TRUE@ libc/machine/spu/setjmp.S libc/machine/spu/assert.c libc/machine/spu/clearerr.c libc/machine/spu/creat.c libc/machine/spu/fclose.c libc/machine/spu/feof.c \ @HAVE_LIBC_MACHINE_SPU_TRUE@ libc/machine/spu/ferror.c libc/machine/spu/fflush.c libc/machine/spu/fgetc.c libc/machine/spu/fgetpos.c libc/machine/spu/fgets.c libc/machine/spu/fileno.c libc/machine/spu/fiprintf.S \ @HAVE_LIBC_MACHINE_SPU_TRUE@ libc/machine/spu/fiscanf.S libc/machine/spu/fopen.c libc/machine/spu/fprintf.S libc/machine/spu/fputc.c libc/machine/spu/fputs.c libc/machine/spu/fread.c libc/machine/spu/freopen.c \ @@ -872,7 +886,7 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_SPU_TRUE@ libc/machine/spu/spu_timer_slih.c libc/machine/spu/spu_timer_slih_reg.c libc/machine/spu/spu_timer_svcs.c \ @HAVE_LIBC_MACHINE_SPU_TRUE@ libc/machine/spu/spu_timer_stop.c libc/machine/spu/spu_timer_free.c libc/machine/spu/spu_timebase.c libc/machine/spu/fdopen.c -@HAVE_LIBC_MACHINE_SPU_TRUE@@HAVE_SPU_EA_TRUE@am__append_121 = \ +@HAVE_LIBC_MACHINE_SPU_TRUE@@HAVE_SPU_EA_TRUE@am__append_122 = \ @HAVE_LIBC_MACHINE_SPU_TRUE@@HAVE_SPU_EA_TRUE@ libc/machine/spu/calloc_ea.c libc/machine/spu/free_ea.c libc/machine/spu/malloc_ea.c libc/machine/spu/memchr_ea.c libc/machine/spu/memcmp_ea.c \ @HAVE_LIBC_MACHINE_SPU_TRUE@@HAVE_SPU_EA_TRUE@ libc/machine/spu/memcpy_ea.c libc/machine/spu/memmove_ea.c libc/machine/spu/memset_ea.c libc/machine/spu/mmap_ea.c libc/machine/spu/mremap_ea.c libc/machine/spu/msync_ea.c \ @HAVE_LIBC_MACHINE_SPU_TRUE@@HAVE_SPU_EA_TRUE@ libc/machine/spu/munmap_ea.c libc/machine/spu/posix_memalign_ea.c libc/machine/spu/realloc_ea.c libc/machine/spu/strcat_ea.c libc/machine/spu/strchr_ea.c \ @@ -881,18 +895,18 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_SPU_TRUE@@HAVE_SPU_EA_TRUE@ libc/machine/spu/pread_ea.c libc/machine/spu/readv_ea.c libc/machine/spu/write_ea.c libc/machine/spu/pwrite_ea.c libc/machine/spu/writev_ea.c libc/machine/spu/spu-mcount.S \ @HAVE_LIBC_MACHINE_SPU_TRUE@@HAVE_SPU_EA_TRUE@ libc/machine/spu/spu-gmon.c -@HAVE_LIBC_MACHINE_TIC4X_TRUE@am__append_122 = libc/machine/tic4x/setjmp.S -@HAVE_LIBC_MACHINE_TIC6X_TRUE@am__append_123 = libc/machine/tic6x/setjmp.S -@HAVE_LIBC_MACHINE_TIC80_TRUE@am__append_124 = libc/machine/tic80/setjmp.S -@HAVE_LIBC_MACHINE_V850_TRUE@am__append_125 = libc/machine/v850/setjmp.S -@HAVE_LIBC_MACHINE_VISIUM_TRUE@am__append_126 = libc/machine/visium/memcpy.c libc/machine/visium/memset.c libc/machine/visium/memmove.c libc/machine/visium/setjmp.S -@HAVE_LIBC_MACHINE_W65_TRUE@am__append_127 = \ +@HAVE_LIBC_MACHINE_TIC4X_TRUE@am__append_123 = libc/machine/tic4x/setjmp.S +@HAVE_LIBC_MACHINE_TIC6X_TRUE@am__append_124 = libc/machine/tic6x/setjmp.S +@HAVE_LIBC_MACHINE_TIC80_TRUE@am__append_125 = libc/machine/tic80/setjmp.S +@HAVE_LIBC_MACHINE_V850_TRUE@am__append_126 = libc/machine/v850/setjmp.S +@HAVE_LIBC_MACHINE_VISIUM_TRUE@am__append_127 = libc/machine/visium/memcpy.c libc/machine/visium/memset.c libc/machine/visium/memmove.c libc/machine/visium/setjmp.S +@HAVE_LIBC_MACHINE_W65_TRUE@am__append_128 = \ @HAVE_LIBC_MACHINE_W65_TRUE@ libc/machine/w65/udivhi3.S libc/machine/w65/umodhi3.S libc/machine/w65/smulhi3.S libc/machine/w65/lshrhi.S libc/machine/w65/sdivhi3.S libc/machine/w65/mulsi3.c \ @HAVE_LIBC_MACHINE_W65_TRUE@ libc/machine/w65/divsi3.c libc/machine/w65/cmpsi.c -@HAVE_LIBC_MACHINE_X86_64_TRUE@am__append_128 = libc/machine/x86_64/setjmp.S libc/machine/x86_64/memcpy.S libc/machine/x86_64/memset.S -@HAVE_LIBC_MACHINE_XC16X_TRUE@am__append_129 = libc/machine/xc16x/setjmp.S libc/machine/xc16x/puts.c libc/machine/xc16x/putchar.c -@HAVE_LIBC_MACHINE_XSTORMY16_TRUE@am__append_130 = \ +@HAVE_LIBC_MACHINE_X86_64_TRUE@am__append_129 = libc/machine/x86_64/setjmp.S libc/machine/x86_64/memcpy.S libc/machine/x86_64/memset.S +@HAVE_LIBC_MACHINE_XC16X_TRUE@am__append_130 = libc/machine/xc16x/setjmp.S libc/machine/xc16x/puts.c libc/machine/xc16x/putchar.c +@HAVE_LIBC_MACHINE_XSTORMY16_TRUE@am__append_131 = \ @HAVE_LIBC_MACHINE_XSTORMY16_TRUE@ libc/machine/xstormy16/setjmp.S \ @HAVE_LIBC_MACHINE_XSTORMY16_TRUE@ libc/machine/xstormy16/calloc.c \ @HAVE_LIBC_MACHINE_XSTORMY16_TRUE@ libc/machine/xstormy16/callocr.c \ @@ -907,13 +921,13 @@ check_PROGRAMS = @HAVE_LIBC_MACHINE_XSTORMY16_TRUE@ libc/machine/xstormy16/reallocr.c \ @HAVE_LIBC_MACHINE_XSTORMY16_TRUE@ libc/machine/xstormy16/valloc.c -@HAVE_LIBC_MACHINE_XTENSA_TRUE@am__append_131 = \ +@HAVE_LIBC_MACHINE_XTENSA_TRUE@am__append_132 = \ @HAVE_LIBC_MACHINE_XTENSA_TRUE@ libc/machine/xtensa/memcpy.S libc/machine/xtensa/memset.S libc/machine/xtensa/setjmp.S libc/machine/xtensa/strcmp.S libc/machine/xtensa/strcpy.S \ @HAVE_LIBC_MACHINE_XTENSA_TRUE@ libc/machine/xtensa/strlen.S libc/machine/xtensa/strncpy.S -@HAVE_LIBC_MACHINE_Z8K_TRUE@am__append_132 = libc/machine/z8k/setjmp.S libc/machine/z8k/memset.S libc/machine/z8k/memcpy.S libc/machine/z8k/memmove.S libc/machine/z8k/memcmp.S -@NEWLIB_HW_FP_TRUE@am__append_133 = $(libm_mathfp_src) $(libm_mathfp_fsrc) -@NEWLIB_HW_FP_TRUE@am__append_134 = \ +@HAVE_LIBC_MACHINE_Z8K_TRUE@am__append_133 = libc/machine/z8k/setjmp.S libc/machine/z8k/memset.S libc/machine/z8k/memcpy.S libc/machine/z8k/memmove.S libc/machine/z8k/memcmp.S +@NEWLIB_HW_FP_TRUE@am__append_134 = $(libm_mathfp_src) $(libm_mathfp_fsrc) +@NEWLIB_HW_FP_TRUE@am__append_135 = \ @NEWLIB_HW_FP_TRUE@ libm/mathfp/e_acosh.def \ @NEWLIB_HW_FP_TRUE@ libm/mathfp/e_atanh.def \ @NEWLIB_HW_FP_TRUE@ libm/mathfp/e_hypot.def \ @@ -943,9 +957,9 @@ check_PROGRAMS = @NEWLIB_HW_FP_TRUE@ libm/mathfp/s_tanh.def \ @NEWLIB_HW_FP_TRUE@ libm/mathfp/w_jn.def -@NEWLIB_HW_FP_TRUE@am__append_135 = libm/mathfp/mathfp.tex -@NEWLIB_HW_FP_FALSE@am__append_136 = $(libm_math_src) $(libm_math_fsrc) $(libm_math_lsrc) -@NEWLIB_HW_FP_FALSE@am__append_137 = \ +@NEWLIB_HW_FP_TRUE@am__append_136 = libm/mathfp/mathfp.tex +@NEWLIB_HW_FP_FALSE@am__append_137 = $(libm_math_src) $(libm_math_fsrc) $(libm_math_lsrc) +@NEWLIB_HW_FP_FALSE@am__append_138 = \ @NEWLIB_HW_FP_FALSE@ libm/math/w_acos.def libm/math/w_acosh.def libm/math/w_asin.def libm/math/s_asinh.def \ @NEWLIB_HW_FP_FALSE@ libm/math/s_atan.def libm/math/w_atan2.def libm/math/w_atanh.def libm/math/w_j0.def \ @NEWLIB_HW_FP_FALSE@ libm/math/w_cosh.def libm/math/s_erf.def libm/math/w_exp.def libm/math/w_exp2.def \ @@ -955,41 +969,41 @@ check_PROGRAMS = @NEWLIB_HW_FP_FALSE@ libm/math/w_pow.def libm/math/w_remainder.def libm/math/s_sin.def libm/math/w_sinh.def \ @NEWLIB_HW_FP_FALSE@ libm/math/w_sqrt.def libm/math/s_tan.def libm/math/s_tanh.def -@NEWLIB_HW_FP_FALSE@am__append_138 = libm/math/math.tex -@HAVE_LONG_DOUBLE_TRUE@am__append_139 = $(libm_common_lsrc) -@HAVE_FPMATH_H_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_140 = $(libm_ld_lsrc) -@HAVE_FPMATH_H_TRUE@am__append_141 = +@NEWLIB_HW_FP_FALSE@am__append_139 = libm/math/math.tex +@HAVE_LONG_DOUBLE_TRUE@am__append_140 = $(libm_common_lsrc) +@HAVE_FPMATH_H_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_141 = $(libm_ld_lsrc) @HAVE_FPMATH_H_TRUE@am__append_142 = -@HAVE_LIBM_MACHINE_AARCH64_TRUE@am__append_143 = $(libm_machine_aarch64_src) -@HAVE_LIBM_MACHINE_AARCH64_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_144 = $(libm_ld128_lsrc) -@HAVE_LIBM_MACHINE_AARCH64_TRUE@am__append_145 = +@HAVE_FPMATH_H_TRUE@am__append_143 = +@HAVE_LIBM_MACHINE_AARCH64_TRUE@am__append_144 = $(libm_machine_aarch64_src) +@HAVE_LIBM_MACHINE_AARCH64_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_145 = $(libm_ld128_lsrc) @HAVE_LIBM_MACHINE_AARCH64_TRUE@am__append_146 = -@HAVE_LIBM_MACHINE_AMDGCN_TRUE@am__append_147 = $(libm_machine_amdgcn_src) -@HAVE_LIBM_MACHINE_ARM_TRUE@am__append_148 = $(libm_machine_arm_src) -@HAVE_LIBM_MACHINE_I386_TRUE@am__append_149 = $(libm_machine_i386_src) -@HAVE_LIBM_MACHINE_I386_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_150 = $(libm_ld80_lsrc) -@HAVE_LIBM_MACHINE_I386_TRUE@am__append_151 = +@HAVE_LIBM_MACHINE_AARCH64_TRUE@am__append_147 = +@HAVE_LIBM_MACHINE_AMDGCN_TRUE@am__append_148 = $(libm_machine_amdgcn_src) +@HAVE_LIBM_MACHINE_ARM_TRUE@am__append_149 = $(libm_machine_arm_src) +@HAVE_LIBM_MACHINE_I386_TRUE@am__append_150 = $(libm_machine_i386_src) +@HAVE_LIBM_MACHINE_I386_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_151 = $(libm_ld80_lsrc) @HAVE_LIBM_MACHINE_I386_TRUE@am__append_152 = -@HAVE_LIBM_MACHINE_MIPS_TRUE@am__append_153 = $(libm_machine_mips_src) -@HAS_NDS32_FPU_SP_TRUE@@HAVE_LIBM_MACHINE_NDS32_TRUE@am__append_154 = libm/machine/nds32/wf_sqrt.S -@HAS_NDS32_FPU_DP_TRUE@@HAVE_LIBM_MACHINE_NDS32_TRUE@am__append_155 = libm/machine/nds32/w_sqrt.S -@HAVE_LIBM_MACHINE_NDS32_TRUE@am__append_156 = $(libm_machine_nds32_src) -@HAVE_LIBM_MACHINE_POWERPC_TRUE@am__append_157 = $(libm_machine_powerpc_src) -@HAVE_LIBM_MACHINE_PRU_TRUE@am__append_158 = $(libm_machine_pru_src) -@HAVE_LIBM_MACHINE_SPARC_TRUE@am__append_159 = $(libm_machine_sparc_src) -@HAVE_LIBM_MACHINE_SPU_TRUE@am__append_160 = $(libm_machine_spu_src) -@HAVE_LIBM_MACHINE_RISCV_TRUE@am__append_161 = $(libm_machine_riscv_src) -@HAVE_LIBM_MACHINE_RISCV_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_162 = $(libm_ld128_lsrc) -@HAVE_LIBM_MACHINE_RISCV_TRUE@am__append_163 = +@HAVE_LIBM_MACHINE_I386_TRUE@am__append_153 = +@HAVE_LIBM_MACHINE_MIPS_TRUE@am__append_154 = $(libm_machine_mips_src) +@HAS_NDS32_FPU_SP_TRUE@@HAVE_LIBM_MACHINE_NDS32_TRUE@am__append_155 = libm/machine/nds32/wf_sqrt.S +@HAS_NDS32_FPU_DP_TRUE@@HAVE_LIBM_MACHINE_NDS32_TRUE@am__append_156 = libm/machine/nds32/w_sqrt.S +@HAVE_LIBM_MACHINE_NDS32_TRUE@am__append_157 = $(libm_machine_nds32_src) +@HAVE_LIBM_MACHINE_POWERPC_TRUE@am__append_158 = $(libm_machine_powerpc_src) +@HAVE_LIBM_MACHINE_PRU_TRUE@am__append_159 = $(libm_machine_pru_src) +@HAVE_LIBM_MACHINE_SPARC_TRUE@am__append_160 = $(libm_machine_sparc_src) +@HAVE_LIBM_MACHINE_SPU_TRUE@am__append_161 = $(libm_machine_spu_src) +@HAVE_LIBM_MACHINE_RISCV_TRUE@am__append_162 = $(libm_machine_riscv_src) +@HAVE_LIBM_MACHINE_RISCV_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_163 = $(libm_ld128_lsrc) @HAVE_LIBM_MACHINE_RISCV_TRUE@am__append_164 = -@HAVE_LIBM_MACHINE_X86_64_TRUE@am__append_165 = $(libm_machine_x86_64_src) -@HAVE_LIBM_MACHINE_X86_64_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_166 = $(libm_ld80_lsrc) -@HAVE_LIBM_MACHINE_X86_64_TRUE@am__append_167 = +@HAVE_LIBM_MACHINE_RISCV_TRUE@am__append_165 = +@HAVE_LIBM_MACHINE_X86_64_TRUE@am__append_166 = $(libm_machine_x86_64_src) +@HAVE_LIBM_MACHINE_X86_64_TRUE@@HAVE_LONG_DOUBLE_TRUE@am__append_167 = $(libm_ld80_lsrc) @HAVE_LIBM_MACHINE_X86_64_TRUE@am__append_168 = -@HAVE_LIBM_MACHINE_XTENSA_TRUE@@XTENSA_XCHAL_HAVE_FP_SQRT_TRUE@am__append_169 = \ +@HAVE_LIBM_MACHINE_X86_64_TRUE@am__append_169 = +@HAVE_LIBM_MACHINE_XTENSA_TRUE@@XTENSA_XCHAL_HAVE_FP_SQRT_TRUE@am__append_170 = \ @HAVE_LIBM_MACHINE_XTENSA_TRUE@@XTENSA_XCHAL_HAVE_FP_SQRT_TRUE@ libm/machine/xtensa/ef_sqrt.c -@HAVE_LIBM_MACHINE_XTENSA_TRUE@am__append_170 = $(libm_machine_xtensa_src) +@HAVE_LIBM_MACHINE_XTENSA_TRUE@am__append_171 = $(libm_machine_xtensa_src) subdir = . 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+@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/libc_a-setjmp.$(OBJEXT) \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/libc_a-strlen.$(OBJEXT) \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/libc_a-strcat.$(OBJEXT) \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/libc_a-memmove.$(OBJEXT) \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/libc_a-strcmp.$(OBJEXT) \ +@HAVE_LIBC_MACHINE_ARC64_TRUE@ libc/machine/arc64/libc_a-memchr.$(OBJEXT) +@HAVE_LIBC_MACHINE_ARM_TRUE@am__objects_81 = libc/machine/arm/libc_a-setjmp.$(OBJEXT) \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/libc_a-strcmp.$(OBJEXT) \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/libc_a-strcpy.$(OBJEXT) \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/libc_a-aeabi_memcpy.$(OBJEXT) \ @@ -1978,44 +2004,44 @@ am__objects_51 = libc/ssp/libc_a-chk_fail.$(OBJEXT) \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/libc_a-memcpy.$(OBJEXT) \ @HAVE_LIBC_MACHINE_ARM_TRUE@ libc/machine/arm/libc_a-strlen-stub.$(OBJEXT) \ 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$(am__objects_154) \ + $(am__objects_156) $(am__objects_157) $(am__objects_158) \ + $(am__objects_159) $(am__objects_160) $(am__objects_162) \ + $(am__objects_164) $(am__objects_166) $(am__objects_168) \ + $(am__objects_170) $(am__objects_172) $(am__objects_174) \ + $(am__objects_178) $(am__objects_180) $(am__objects_182) \ + $(am__objects_184) $(am__objects_186) $(am__objects_188) \ + $(am__objects_189) $(am__objects_191) $(am__objects_192) \ + $(am__objects_195) libm_a_OBJECTS = $(am_libm_a_OBJECTS) am_libm_test_test_OBJECTS = libm/test/test.$(OBJEXT) \ libm/test/string.$(OBJEXT) libm/test/convert.$(OBJEXT) \ @@ -3971,7 +4005,6 @@ pdfdir = @pdfdir@ prefix = @prefix@ program_transform_name = @program_transform_name@ psdir = @psdir@ -runstatedir = @runstatedir@ sbindir = @sbindir@ shared_machine_dir = @shared_machine_dir@ sharedstatedir = @sharedstatedir@ @@ -4053,7 +4086,7 @@ toollibdir = $(tooldir)/lib$(MULTISUBDIR) AM_CFLAGS = $(AM_CFLAGS_$(subst /,_,$(@D))) $(AM_CFLAGS_$(subst /,_,$(@D)_$(<F))) AM_CCASFLAGS = $(AM_CCASFLAGS_$(subst /,_,$(@D))) $(AM_CCASFLAGS_$(subst /,_,$(@D)_$(<F))) AM_CPPFLAGS = $(NEWLIB_CFLAGS) $(TARGET_CFLAGS) $(AM_CPPFLAGS_$(subst /,_,$(@D))) $(AM_CPPFLAGS_$(subst /,_,$(@D)_$(<F))) -idirafter $(srcroot)/include -toollib_LIBRARIES = libm.a libc.a $(am__append_73) +toollib_LIBRARIES = libm.a libc.a $(am__append_74) @HAVE_MULTISUBDIR_TRUE@BUILD_MULTISUBDIR = $(builddir)$(MULTISUBDIR) toollib_DATA = $(CRT0) $(CRT1) AWK_UNIQUE_OBJS = $(AWK) '{ \ @@ -4224,7 +4257,7 @@ libc_a_SOURCES = $(am__append_5) libc/stdlib/__adjust.c \ $(am__append_62) $(am__append_63) $(am__append_64) \ $(am__append_65) $(am__append_66) $(am__append_67) \ $(am__append_68) $(am__append_69) $(am__append_70) \ - $(am__append_71) $(am__append_72) $(am__append_74) \ + $(am__append_71) $(am__append_72) $(am__append_73) \ $(am__append_75) $(am__append_76) $(am__append_77) \ $(am__append_78) $(am__append_79) $(am__append_80) \ $(am__append_81) $(am__append_82) $(am__append_83) \ @@ -4244,21 +4277,21 @@ libc_a_SOURCES = $(am__append_5) libc/stdlib/__adjust.c \ $(am__append_123) $(am__append_124) $(am__append_125) \ $(am__append_126) $(am__append_127) $(am__append_128) \ $(am__append_129) $(am__append_130) $(am__append_131) \ - $(am__append_132) + $(am__append_132) $(am__append_133) libc_a_CFLAGS = $(AM_CFLAGS) $(libc_a_CFLAGS_$(subst /,_,$(@D))) $(libc_a_CFLAGS_$(subst /,_,$(@D)_$(<F))) libc_a_CCASFLAGS = $(AM_CCASFLAGS) $(libc_a_CCASFLAGS_$(subst /,_,$(@D))) $(libc_a_CCASFLAGS_$(subst /,_,$(@D)_$(<F))) libc_a_CPPFLAGS = $(AM_CPPFLAGS) $(libc_a_CPPFLAGS_$(subst /,_,$(@D))) $(libc_a_CPPFLAGS_$(subst /,_,$(@D)_$(<F))) libc_a_DEPENDENCIES = stamp-libc-math-objects -libm_a_SOURCES = $(am__append_133) $(am__append_136) \ - $(libm_common_src) $(libm_common_fsrc) $(am__append_139) \ - $(am__append_140) $(libm_complex_src) $(libm_complex_fsrc) \ - $(libm_complex_lsrc) $(libm_fenv_src) $(am__append_143) \ - $(am__append_144) $(am__append_147) $(am__append_148) \ - $(am__append_149) $(am__append_150) $(am__append_153) \ - $(am__append_156) $(am__append_157) $(am__append_158) \ - $(am__append_159) $(am__append_160) $(am__append_161) \ - $(am__append_162) $(am__append_165) $(am__append_166) \ - $(am__append_170) +libm_a_SOURCES = $(am__append_134) $(am__append_137) \ + $(libm_common_src) $(libm_common_fsrc) $(am__append_140) \ + $(am__append_141) $(libm_complex_src) $(libm_complex_fsrc) \ + $(libm_complex_lsrc) $(libm_fenv_src) $(am__append_144) \ + $(am__append_145) $(am__append_148) $(am__append_149) \ + $(am__append_150) $(am__append_151) $(am__append_154) \ + $(am__append_157) $(am__append_158) $(am__append_159) \ + $(am__append_160) $(am__append_161) $(am__append_162) \ + $(am__append_163) $(am__append_166) $(am__append_167) \ + $(am__append_171) libm_a_CFLAGS = $(AM_CFLAGS) $(libm_a_CFLAGS_$(subst /,_,$(@D))) $(libm_a_CFLAGS_$(subst /,_,$(@D)_$(<F))) libm_a_CCASFLAGS = $(AM_CCASFLAGS) $(libm_a_CCASFLAGS_$(subst /,_,$(@D))) $(libm_a_CCASFLAGS_$(subst /,_,$(@D)_$(<F))) libm_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/libm/common $(libm_a_CPPFLAGS_$(subst /,_,$(@D))) $(libm_a_CPPFLAGS_$(subst /,_,$(@D)_$(<F))) @@ -4661,7 +4694,7 @@ libc_ssp_ELIX_SOURCES = libc/ssp/chk_fail.c libc/ssp/stack_protector.c \ @HAVE_LIBC_MACHINE_XTENSA_TRUE@@XTENSA_ESP32_PSRAM_CACHE_FIX_TRUE@ -DXTENSA_ESP32_PSRAM_CACHE_FIX libm_libm_TEXINFOS = libm/targetdep.tex $(LIBM_CHEWOUT_FILES) -LIBM_CHEWOUT_FILES = $(am__append_134) $(am__append_137) \ +LIBM_CHEWOUT_FILES = $(am__append_135) $(am__append_138) \ libm/common/s_cbrt.def libm/common/s_copysign.def \ libm/common/s_exp10.def libm/common/s_expm1.def \ libm/common/s_ilogb.def libm/common/s_infinity.def \ @@ -4676,7 +4709,7 @@ LIBM_CHEWOUT_FILES = $(am__append_134) $(am__append_137) \ libm/common/s_remquo.def libm/common/s_rint.def \ libm/common/s_round.def libm/common/s_signbit.def \ libm/common/s_trunc.def libm/common/isgreater.def \ - $(am__append_141) libm/complex/cabs.def libm/complex/cacos.def \ + $(am__append_142) libm/complex/cabs.def libm/complex/cacos.def \ libm/complex/cacosh.def libm/complex/carg.def \ libm/complex/casin.def libm/complex/casinh.def \ libm/complex/catan.def libm/complex/catanh.def \ @@ -4693,11 +4726,11 @@ LIBM_CHEWOUT_FILES = $(am__append_134) $(am__append_137) \ libm/fenv/feraiseexcept.def libm/fenv/fesetenv.def \ libm/fenv/fesetexceptflag.def libm/fenv/fesetround.def \ libm/fenv/fetestexcept.def libm/fenv/feupdateenv.def \ - $(am__append_145) $(am__append_151) $(am__append_163) \ - $(am__append_167) -LIBM_CHAPTERS = $(am__append_135) $(am__append_138) $(am__append_142) \ - libm/complex/complex.tex libm/fenv/fenv.tex $(am__append_146) \ - $(am__append_152) $(am__append_164) $(am__append_168) + $(am__append_146) $(am__append_152) $(am__append_164) \ + $(am__append_168) +LIBM_CHAPTERS = $(am__append_136) $(am__append_139) $(am__append_143) \ + libm/complex/complex.tex libm/fenv/fenv.tex $(am__append_147) \ + $(am__append_153) $(am__append_165) $(am__append_169) LIBM_DOCBOOK_OUT_FILES = $(LIBM_CHEWOUT_FILES:.def=.xml) @NEWLIB_HW_FP_TRUE@libm_mathfp_src = \ @NEWLIB_HW_FP_TRUE@ libm/mathfp/s_acos.c libm/mathfp/s_frexp.c libm/mathfp/s_mathcnst.c \ @@ -5066,12 +5099,14 @@ libm_test_test_LDADD = $(CRT0) libm.a libc.a @HAVE_LIBM_MACHINE_AARCH64_TRUE@libm_ld128_lsrc = \ @HAVE_LIBM_MACHINE_AARCH64_TRUE@ libm/ld128/e_powl.c libm/ld128/s_erfl.c libm/ld128/s_exp2l.c libm/ld128/s_expl.c \ @HAVE_LIBM_MACHINE_AARCH64_TRUE@ libm/ld128/s_logl.c libm/ld128/b_tgammal.c libm/ld128/invtrig.c \ -@HAVE_LIBM_MACHINE_AARCH64_TRUE@ libm/ld128/e_lgammal_r.c libm/ld128/k_cosl.c libm/ld128/k_sinl.c +@HAVE_LIBM_MACHINE_AARCH64_TRUE@ libm/ld128/e_lgammal_r.c libm/ld128/k_cosl.c libm/ld128/k_sinl.c \ +@HAVE_LIBM_MACHINE_AARCH64_TRUE@ libm/ld128/k_tanl.c libm/ld128/s_sinpil.c libm/ld128/s_cospil.c @HAVE_LIBM_MACHINE_RISCV_TRUE@libm_ld128_lsrc = \ @HAVE_LIBM_MACHINE_RISCV_TRUE@ libm/ld128/e_powl.c libm/ld128/s_erfl.c libm/ld128/s_exp2l.c libm/ld128/s_expl.c \ @HAVE_LIBM_MACHINE_RISCV_TRUE@ libm/ld128/s_logl.c libm/ld128/b_tgammal.c libm/ld128/invtrig.c \ -@HAVE_LIBM_MACHINE_RISCV_TRUE@ libm/ld128/e_lgammal_r.c libm/ld128/k_cosl.c libm/ld128/k_sinl.c +@HAVE_LIBM_MACHINE_RISCV_TRUE@ libm/ld128/e_lgammal_r.c libm/ld128/k_cosl.c libm/ld128/k_sinl.c \ +@HAVE_LIBM_MACHINE_RISCV_TRUE@ libm/ld128/k_tanl.c libm/ld128/s_sinpil.c libm/ld128/s_cospil.c @HAVE_LIBM_MACHINE_AARCH64_TRUE@libm_a_CFLAGS_libm_ld128 = -fbuiltin -fno-math-errno @HAVE_LIBM_MACHINE_RISCV_TRUE@libm_a_CFLAGS_libm_ld128 = -fbuiltin -fno-math-errno @@ -5212,12 +5247,14 @@ libm_test_test_LDADD = $(CRT0) libm.a libc.a @HAVE_LIBM_MACHINE_I386_TRUE@libm_ld80_lsrc = \ @HAVE_LIBM_MACHINE_I386_TRUE@ libm/ld80/b_tgammal.c libm/ld80/e_powl.c libm/ld80/s_erfl.c libm/ld80/s_exp2l.c \ @HAVE_LIBM_MACHINE_I386_TRUE@ libm/ld80/s_expl.c libm/ld80/s_logl.c libm/ld80/s_sinpil.c libm/ld80/s_cospil.c \ -@HAVE_LIBM_MACHINE_I386_TRUE@ libm/ld80/invtrig.c libm/ld80/e_lgammal_r.c libm/ld80/k_cosl.c libm/ld80/k_sinl.c +@HAVE_LIBM_MACHINE_I386_TRUE@ libm/ld80/invtrig.c libm/ld80/e_lgammal_r.c libm/ld80/k_cosl.c libm/ld80/k_sinl.c \ +@HAVE_LIBM_MACHINE_I386_TRUE@ libm/ld80/k_tanl.c @HAVE_LIBM_MACHINE_X86_64_TRUE@libm_ld80_lsrc = \ @HAVE_LIBM_MACHINE_X86_64_TRUE@ libm/ld80/b_tgammal.c libm/ld80/e_powl.c libm/ld80/s_erfl.c libm/ld80/s_exp2l.c \ @HAVE_LIBM_MACHINE_X86_64_TRUE@ libm/ld80/s_expl.c libm/ld80/s_logl.c libm/ld80/s_sinpil.c libm/ld80/s_cospil.c \ -@HAVE_LIBM_MACHINE_X86_64_TRUE@ libm/ld80/invtrig.c libm/ld80/e_lgammal_r.c libm/ld80/k_cosl.c libm/ld80/k_sinl.c +@HAVE_LIBM_MACHINE_X86_64_TRUE@ libm/ld80/invtrig.c libm/ld80/e_lgammal_r.c libm/ld80/k_cosl.c libm/ld80/k_sinl.c \ +@HAVE_LIBM_MACHINE_X86_64_TRUE@ libm/ld80/k_tanl.c @HAVE_LIBM_MACHINE_I386_TRUE@libm_a_CFLAGS_libm_ld80 = -fbuiltin -fno-math-errno @HAVE_LIBM_MACHINE_X86_64_TRUE@libm_a_CFLAGS_libm_ld80 = -fbuiltin -fno-math-errno @@ -5231,8 +5268,8 @@ libm_test_test_LDADD = $(CRT0) libm.a libc.a # fenv.c cannot be compiled as mips16 since it uses the cfc1 instruction. @HAVE_LIBM_MACHINE_MIPS_TRUE@libm_a_CFLAGS_libm_machine_mips_fenv.c = -mno-mips16 @HAVE_LIBM_MACHINE_NDS32_TRUE@libm_machine_nds32_src = \ -@HAVE_LIBM_MACHINE_NDS32_TRUE@ $(am__append_154) \ -@HAVE_LIBM_MACHINE_NDS32_TRUE@ $(am__append_155) +@HAVE_LIBM_MACHINE_NDS32_TRUE@ $(am__append_155) \ +@HAVE_LIBM_MACHINE_NDS32_TRUE@ $(am__append_156) @HAVE_LIBM_MACHINE_POWERPC_TRUE@libm_machine_powerpc_src = \ @HAVE_LIBM_MACHINE_POWERPC_TRUE@ libm/machine/powerpc/feclearexcept.c libm/machine/powerpc/fegetenv.c libm/machine/powerpc/fegetexceptflag.c \ @HAVE_LIBM_MACHINE_POWERPC_TRUE@ libm/machine/powerpc/fegetround.c libm/machine/powerpc/feholdexcept.c libm/machine/powerpc/fenv.c libm/machine/powerpc/feraiseexcept.c libm/machine/powerpc/fesetenv.c \ @@ -5303,7 +5340,7 @@ libm_test_test_LDADD = $(CRT0) libm.a libc.a @HAVE_LIBM_MACHINE_XTENSA_TRUE@ libm/machine/xtensa/feraiseexcept.c \ @HAVE_LIBM_MACHINE_XTENSA_TRUE@ libm/machine/xtensa/fetestexcept.c \ @HAVE_LIBM_MACHINE_XTENSA_TRUE@ libm/machine/xtensa/feupdateenv.c \ -@HAVE_LIBM_MACHINE_XTENSA_TRUE@ $(am__append_169) +@HAVE_LIBM_MACHINE_XTENSA_TRUE@ $(am__append_170) @HAVE_LIBM_MACHINE_XTENSA_TRUE@libm_a_CFLAGS_libm_machine_xtensa = -D_LIBM all: newlib.h _newlib_version.h $(MAKE) $(AM_MAKEFLAGS) all-am @@ -5312,7 +5349,7 @@ all: newlib.h _newlib_version.h .SUFFIXES: .def .xml .S .c .dvi .o .obj .ps .s am--refresh: Makefile @: -$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/../multilib.am $(srcdir)/doc/Makefile.inc $(srcdir)/libc/Makefile.inc $(srcdir)/libc/argz/Makefile.inc $(srcdir)/libc/stdlib/Makefile.inc $(srcdir)/libc/ctype/Makefile.inc $(srcdir)/libc/search/Makefile.inc $(srcdir)/libc/stdio/Makefile.inc $(srcdir)/libc/stdio64/Makefile.inc $(srcdir)/libc/string/Makefile.inc $(srcdir)/libc/signal/Makefile.inc $(srcdir)/libc/time/Makefile.inc $(srcdir)/libc/locale/Makefile.inc $(srcdir)/libc/reent/Makefile.inc $(srcdir)/libc/errno/Makefile.inc $(srcdir)/libc/misc/Makefile.inc $(srcdir)/libc/unix/Makefile.inc $(srcdir)/libc/posix/Makefile.inc $(srcdir)/libc/syscalls/Makefile.inc $(srcdir)/libc/iconv/Makefile.inc $(srcdir)/libc/iconv/ces/Makefile.inc $(srcdir)/libc/iconv/ccs/Makefile.inc $(srcdir)/libc/iconv/ccs/binary/Makefile.inc $(srcdir)/libc/iconv/lib/Makefile.inc $(srcdir)/libc/xdr/Makefile.inc $(srcdir)/libc/ssp/Makefile.inc $(srcdir)/libc/sys/Makefile.inc $(srcdir)/libc/sys/a29khif/Makefile.inc $(srcdir)/libc/sys/amdgcn/Makefile.inc $(srcdir)/libc/sys/arm/Makefile.inc $(srcdir)/libc/sys/d10v/Makefile.inc $(srcdir)/libc/sys/epiphany/Makefile.inc $(srcdir)/libc/sys/h8300hms/Makefile.inc $(srcdir)/libc/sys/h8500hms/Makefile.inc $(srcdir)/libc/sys/m88kbug/Makefile.inc $(srcdir)/libc/sys/mmixware/Makefile.inc $(srcdir)/libc/sys/netware/Makefile.inc $(srcdir)/libc/sys/or1k/Makefile.inc $(srcdir)/libc/sys/rdos/Makefile.inc $(srcdir)/libc/sys/rtems/Makefile.inc $(srcdir)/libc/sys/sh/Makefile.inc $(srcdir)/libc/sys/sysmec/Makefile.inc $(srcdir)/libc/sys/sysnec810/Makefile.inc $(srcdir)/libc/sys/sysnecv850/Makefile.inc $(srcdir)/libc/sys/sysvi386/Makefile.inc $(srcdir)/libc/sys/sysvnecv70/Makefile.inc $(srcdir)/libc/sys/tic80/Makefile.inc $(srcdir)/libc/sys/tirtos/Makefile.inc $(srcdir)/libc/sys/w65/Makefile.inc $(srcdir)/libc/sys/xtensa/Makefile.inc $(srcdir)/libc/sys/z8ksim/Makefile.inc $(srcdir)/libc/machine/Makefile.inc $(srcdir)/libc/machine/aarch64/Makefile.inc $(srcdir)/libc/machine/amdgcn/Makefile.inc $(srcdir)/libc/machine/arc/Makefile.inc $(srcdir)/libc/machine/arm/Makefile.inc $(srcdir)/libc/machine/bfin/Makefile.inc $(srcdir)/libc/machine/cr16/Makefile.inc $(srcdir)/libc/machine/cris/Makefile.inc $(srcdir)/libc/machine/crx/Makefile.inc $(srcdir)/libc/machine/csky/Makefile.inc $(srcdir)/libc/machine/d10v/Makefile.inc $(srcdir)/libc/machine/d30v/Makefile.inc $(srcdir)/libc/machine/epiphany/Makefile.inc $(srcdir)/libc/machine/fr30/Makefile.inc $(srcdir)/libc/machine/frv/Makefile.inc $(srcdir)/libc/machine/ft32/Makefile.inc $(srcdir)/libc/machine/h8300/Makefile.inc $(srcdir)/libc/machine/h8500/Makefile.inc $(srcdir)/libc/machine/hppa/Makefile.inc $(srcdir)/libc/machine/i386/Makefile.inc $(srcdir)/libc/machine/i960/Makefile.inc $(srcdir)/libc/machine/iq2000/Makefile.inc $(srcdir)/libc/machine/lm32/Makefile.inc $(srcdir)/libc/machine/m32c/Makefile.inc $(srcdir)/libc/machine/m32r/Makefile.inc $(srcdir)/libc/machine/m68hc11/Makefile.inc $(srcdir)/libc/machine/m68k/Makefile.inc $(srcdir)/libc/machine/m88k/Makefile.inc $(srcdir)/libc/machine/mep/Makefile.inc $(srcdir)/libc/machine/microblaze/Makefile.inc $(srcdir)/libc/machine/mips/Makefile.inc $(srcdir)/libc/machine/mn10200/Makefile.inc $(srcdir)/libc/machine/mn10300/Makefile.inc $(srcdir)/libc/machine/moxie/Makefile.inc $(srcdir)/libc/machine/msp430/Makefile.inc $(srcdir)/libc/machine/mt/Makefile.inc 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$(srcdir)/libm/test/Makefile.inc $(srcdir)/libm/machine/aarch64/Makefile.inc $(srcdir)/libm/ld128/Makefile.inc $(srcdir)/libm/machine/amdgcn/Makefile.inc $(srcdir)/libm/machine/arm/Makefile.inc $(srcdir)/libm/machine/i386/Makefile.inc $(srcdir)/libm/ld80/Makefile.inc $(srcdir)/libm/machine/mips/Makefile.inc $(srcdir)/libm/machine/nds32/Makefile.inc $(srcdir)/libm/machine/powerpc/Makefile.inc $(srcdir)/libm/machine/pru/Makefile.inc $(srcdir)/libm/machine/sparc/Makefile.inc $(srcdir)/libm/machine/spu/Makefile.inc $(srcdir)/libm/machine/riscv/Makefile.inc $(srcdir)/libm/ld128/Makefile.inc $(srcdir)/libm/machine/x86_64/Makefile.inc $(srcdir)/libm/ld80/Makefile.inc $(srcdir)/libm/machine/xtensa/Makefile.inc $(am__empty): $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) $(SHELL) ./config.status --recheck @@ -8286,6 +8323,48 @@ libc/machine/arc/libc_a-strncpy-stub.$(OBJEXT): \ libc/machine/arc/libc_a-strncpy-bs.$(OBJEXT): \ libc/machine/arc/$(am__dirstamp) \ libc/machine/arc/$(DEPDIR)/$(am__dirstamp) +libc/machine/arc64/$(am__dirstamp): + @$(MKDIR_P) libc/machine/arc64 + @: > libc/machine/arc64/$(am__dirstamp) +libc/machine/arc64/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) libc/machine/arc64/$(DEPDIR) + @: > libc/machine/arc64/$(DEPDIR)/$(am__dirstamp) +libc/machine/arc64/libc_a-memcmp.$(OBJEXT): \ + libc/machine/arc64/$(am__dirstamp) \ + libc/machine/arc64/$(DEPDIR)/$(am__dirstamp) +libc/machine/arc64/libc_a-memcmp-stub.$(OBJEXT): \ + libc/machine/arc64/$(am__dirstamp) \ + libc/machine/arc64/$(DEPDIR)/$(am__dirstamp) +libc/machine/arc64/libc_a-memcpy.$(OBJEXT): \ + libc/machine/arc64/$(am__dirstamp) \ + libc/machine/arc64/$(DEPDIR)/$(am__dirstamp) +libc/machine/arc64/libc_a-memcpy-stub.$(OBJEXT): \ + libc/machine/arc64/$(am__dirstamp) \ + libc/machine/arc64/$(DEPDIR)/$(am__dirstamp) +libc/machine/arc64/libc_a-memset.$(OBJEXT): \ + libc/machine/arc64/$(am__dirstamp) \ + libc/machine/arc64/$(DEPDIR)/$(am__dirstamp) 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@: > libc/machine/arm/$(am__dirstamp) @@ -11059,6 +11138,12 @@ libm/ld128/libm_a-k_cosl.$(OBJEXT): libm/ld128/$(am__dirstamp) \ libm/ld128/$(DEPDIR)/$(am__dirstamp) libm/ld128/libm_a-k_sinl.$(OBJEXT): libm/ld128/$(am__dirstamp) \ libm/ld128/$(DEPDIR)/$(am__dirstamp) +libm/ld128/libm_a-k_tanl.$(OBJEXT): libm/ld128/$(am__dirstamp) \ + libm/ld128/$(DEPDIR)/$(am__dirstamp) +libm/ld128/libm_a-s_sinpil.$(OBJEXT): libm/ld128/$(am__dirstamp) \ + libm/ld128/$(DEPDIR)/$(am__dirstamp) +libm/ld128/libm_a-s_cospil.$(OBJEXT): libm/ld128/$(am__dirstamp) \ + libm/ld128/$(DEPDIR)/$(am__dirstamp) libm/machine/amdgcn/$(am__dirstamp): @$(MKDIR_P) libm/machine/amdgcn @: > libm/machine/amdgcn/$(am__dirstamp) @@ -11575,6 +11660,8 @@ libm/ld80/libm_a-k_cosl.$(OBJEXT): libm/ld80/$(am__dirstamp) \ libm/ld80/$(DEPDIR)/$(am__dirstamp) libm/ld80/libm_a-k_sinl.$(OBJEXT): libm/ld80/$(am__dirstamp) \ libm/ld80/$(DEPDIR)/$(am__dirstamp) +libm/ld80/libm_a-k_tanl.$(OBJEXT): libm/ld80/$(am__dirstamp) \ + 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libm/machine/amdgcn/$(DEPDIR)/libm_a-v64_mathcnst.Tpo -c -o libm/machine/amdgcn/libm_a-v64_mathcnst.o `test -f 'libm/machine/amdgcn/v64_mathcnst.c' || echo '$(srcdir)/'`libm/machine/amdgcn/v64_mathcnst.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) libm/machine/amdgcn/$(DEPDIR)/libm_a-v64_mathcnst.Tpo libm/machine/amdgcn/$(DEPDIR)/libm_a-v64_mathcnst.Po @@ -46534,6 +46848,20 @@ libm/ld80/libm_a-k_sinl.obj: libm/ld80/k_sinl.c @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libm_a_CPPFLAGS) $(CPPFLAGS) $(libm_a_CFLAGS) $(CFLAGS) -c -o libm/ld80/libm_a-k_sinl.obj `if test -f 'libm/ld80/k_sinl.c'; then $(CYGPATH_W) 'libm/ld80/k_sinl.c'; else $(CYGPATH_W) '$(srcdir)/libm/ld80/k_sinl.c'; fi` +libm/ld80/libm_a-k_tanl.o: libm/ld80/k_tanl.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libm_a_CPPFLAGS) $(CPPFLAGS) $(libm_a_CFLAGS) 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libm/ld80/libm_a-k_tanl.obj -MD -MP -MF libm/ld80/$(DEPDIR)/libm_a-k_tanl.Tpo -c -o libm/ld80/libm_a-k_tanl.obj `if test -f 'libm/ld80/k_tanl.c'; then $(CYGPATH_W) 'libm/ld80/k_tanl.c'; else $(CYGPATH_W) '$(srcdir)/libm/ld80/k_tanl.c'; fi` +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) libm/ld80/$(DEPDIR)/libm_a-k_tanl.Tpo libm/ld80/$(DEPDIR)/libm_a-k_tanl.Po +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='libm/ld80/k_tanl.c' object='libm/ld80/libm_a-k_tanl.obj' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libm_a_CPPFLAGS) $(CPPFLAGS) $(libm_a_CFLAGS) $(CFLAGS) -c -o libm/ld80/libm_a-k_tanl.obj `if test -f 'libm/ld80/k_tanl.c'; then $(CYGPATH_W) 'libm/ld80/k_tanl.c'; else $(CYGPATH_W) '$(srcdir)/libm/ld80/k_tanl.c'; fi` + libm/machine/mips/libm_a-feclearexcept.o: libm/machine/mips/feclearexcept.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libm_a_CPPFLAGS) $(CPPFLAGS) $(libm_a_CFLAGS) $(CFLAGS) -MT libm/machine/mips/libm_a-feclearexcept.o -MD -MP -MF libm/machine/mips/$(DEPDIR)/libm_a-feclearexcept.Tpo -c -o libm/machine/mips/libm_a-feclearexcept.o `test -f 'libm/machine/mips/feclearexcept.c' || echo '$(srcdir)/'`libm/machine/mips/feclearexcept.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) libm/machine/mips/$(DEPDIR)/libm_a-feclearexcept.Tpo libm/machine/mips/$(DEPDIR)/libm_a-feclearexcept.Po @@ -50155,6 +50483,8 @@ distclean-generic: -rm -f libc/machine/amdgcn/$(am__dirstamp) -rm -f libc/machine/arc/$(DEPDIR)/$(am__dirstamp) -rm -f libc/machine/arc/$(am__dirstamp) + -rm -f libc/machine/arc64/$(DEPDIR)/$(am__dirstamp) + -rm -f libc/machine/arc64/$(am__dirstamp) -rm -f libc/machine/arm/$(DEPDIR)/$(am__dirstamp) -rm -f libc/machine/arm/$(am__dirstamp) -rm -f libc/machine/bfin/$(DEPDIR)/$(am__dirstamp) @@ -50397,7 +50727,7 @@ clean-am: clean-aminfo clean-checkPROGRAMS clean-generic clean-local \ distclean: distclean-am -rm -f $(am__CONFIG_DISTCLEAN_FILES) - -rm -rf libc/argz/$(DEPDIR) libc/ctype/$(DEPDIR) libc/errno/$(DEPDIR) libc/iconv/ccs/$(DEPDIR) libc/iconv/ces/$(DEPDIR) libc/iconv/lib/$(DEPDIR) libc/locale/$(DEPDIR) libc/machine/aarch64/$(DEPDIR) libc/machine/amdgcn/$(DEPDIR) libc/machine/arc/$(DEPDIR) libc/machine/arm/$(DEPDIR) libc/machine/bfin/$(DEPDIR) libc/machine/cr16/$(DEPDIR) libc/machine/cris/$(DEPDIR) libc/machine/crx/$(DEPDIR) libc/machine/csky/$(DEPDIR) libc/machine/d10v/$(DEPDIR) libc/machine/d30v/$(DEPDIR) libc/machine/epiphany/$(DEPDIR) libc/machine/fr30/$(DEPDIR) libc/machine/frv/$(DEPDIR) libc/machine/ft32/$(DEPDIR) libc/machine/h8300/$(DEPDIR) libc/machine/h8500/$(DEPDIR) libc/machine/hppa/$(DEPDIR) libc/machine/i386/$(DEPDIR) libc/machine/i960/$(DEPDIR) libc/machine/iq2000/$(DEPDIR) libc/machine/lm32/$(DEPDIR) libc/machine/m32c/$(DEPDIR) libc/machine/m32r/$(DEPDIR) libc/machine/m68hc11/$(DEPDIR) libc/machine/m68k/$(DEPDIR) libc/machine/m88k/$(DEPDIR) libc/machine/mep/$(DEPDIR) libc/machine/microblaze/$(DEPDIR) libc/machine/mips/$(DEPDIR) libc/machine/mn10200/$(DEPDIR) libc/machine/mn10300/$(DEPDIR) libc/machine/moxie/$(DEPDIR) libc/machine/msp430/$(DEPDIR) libc/machine/mt/$(DEPDIR) libc/machine/nds32/$(DEPDIR) libc/machine/necv70/$(DEPDIR) libc/machine/nvptx/$(DEPDIR) libc/machine/or1k/$(DEPDIR) libc/machine/powerpc/$(DEPDIR) libc/machine/riscv/$(DEPDIR) libc/machine/rl78/$(DEPDIR) libc/machine/rx/$(DEPDIR) libc/machine/sh/$(DEPDIR) libc/machine/sparc/$(DEPDIR) libc/machine/spu/$(DEPDIR) libc/machine/tic4x/$(DEPDIR) libc/machine/tic6x/$(DEPDIR) libc/machine/tic80/$(DEPDIR) libc/machine/v850/$(DEPDIR) libc/machine/visium/$(DEPDIR) libc/machine/w65/$(DEPDIR) libc/machine/x86_64/$(DEPDIR) libc/machine/xc16x/$(DEPDIR) libc/machine/xstormy16/$(DEPDIR) libc/machine/xtensa/$(DEPDIR) libc/machine/z8k/$(DEPDIR) libc/misc/$(DEPDIR) libc/posix/$(DEPDIR) libc/reent/$(DEPDIR) libc/search/$(DEPDIR) libc/signal/$(DEPDIR) libc/ssp/$(DEPDIR) libc/stdio/$(DEPDIR) libc/stdio64/$(DEPDIR) libc/stdlib/$(DEPDIR) libc/string/$(DEPDIR) libc/sys/a29khif/$(DEPDIR) libc/sys/amdgcn/$(DEPDIR) libc/sys/arm/$(DEPDIR) libc/sys/d10v/$(DEPDIR) libc/sys/epiphany/$(DEPDIR) libc/sys/h8300hms/$(DEPDIR) libc/sys/h8500hms/$(DEPDIR) libc/sys/m88kbug/$(DEPDIR) libc/sys/mmixware/$(DEPDIR) libc/sys/netware/$(DEPDIR) libc/sys/or1k/$(DEPDIR) libc/sys/rdos/$(DEPDIR) libc/sys/rtems/$(DEPDIR) libc/sys/sh/$(DEPDIR) libc/sys/sysmec/$(DEPDIR) libc/sys/sysnec810/$(DEPDIR) libc/sys/sysnecv850/$(DEPDIR) libc/sys/sysvi386/$(DEPDIR) libc/sys/sysvnecv70/$(DEPDIR) libc/sys/tirtos/$(DEPDIR) libc/sys/w65/$(DEPDIR) libc/sys/xtensa/$(DEPDIR) libc/sys/z8ksim/$(DEPDIR) libc/syscalls/$(DEPDIR) libc/time/$(DEPDIR) libc/unix/$(DEPDIR) libc/xdr/$(DEPDIR) libm/common/$(DEPDIR) libm/complex/$(DEPDIR) libm/fenv/$(DEPDIR) libm/ld/$(DEPDIR) libm/ld128/$(DEPDIR) libm/ld80/$(DEPDIR) libm/machine/aarch64/$(DEPDIR) libm/machine/amdgcn/$(DEPDIR) libm/machine/arm/$(DEPDIR) libm/machine/i386/$(DEPDIR) libm/machine/mips/$(DEPDIR) libm/machine/nds32/$(DEPDIR) libm/machine/powerpc/$(DEPDIR) libm/machine/pru/$(DEPDIR) libm/machine/riscv/$(DEPDIR) libm/machine/sparc/$(DEPDIR) libm/machine/spu/$(DEPDIR) libm/machine/x86_64/$(DEPDIR) libm/machine/xtensa/$(DEPDIR) libm/math/$(DEPDIR) libm/mathfp/$(DEPDIR) libm/test/$(DEPDIR) + -rm -rf libc/argz/$(DEPDIR) libc/ctype/$(DEPDIR) libc/errno/$(DEPDIR) libc/iconv/ccs/$(DEPDIR) libc/iconv/ces/$(DEPDIR) libc/iconv/lib/$(DEPDIR) libc/locale/$(DEPDIR) libc/machine/aarch64/$(DEPDIR) libc/machine/amdgcn/$(DEPDIR) libc/machine/arc/$(DEPDIR) libc/machine/arc64/$(DEPDIR) libc/machine/arm/$(DEPDIR) libc/machine/bfin/$(DEPDIR) libc/machine/cr16/$(DEPDIR) libc/machine/cris/$(DEPDIR) libc/machine/crx/$(DEPDIR) libc/machine/csky/$(DEPDIR) libc/machine/d10v/$(DEPDIR) libc/machine/d30v/$(DEPDIR) libc/machine/epiphany/$(DEPDIR) libc/machine/fr30/$(DEPDIR) libc/machine/frv/$(DEPDIR) libc/machine/ft32/$(DEPDIR) libc/machine/h8300/$(DEPDIR) libc/machine/h8500/$(DEPDIR) libc/machine/hppa/$(DEPDIR) libc/machine/i386/$(DEPDIR) libc/machine/i960/$(DEPDIR) libc/machine/iq2000/$(DEPDIR) libc/machine/lm32/$(DEPDIR) libc/machine/m32c/$(DEPDIR) libc/machine/m32r/$(DEPDIR) libc/machine/m68hc11/$(DEPDIR) libc/machine/m68k/$(DEPDIR) libc/machine/m88k/$(DEPDIR) libc/machine/mep/$(DEPDIR) libc/machine/microblaze/$(DEPDIR) libc/machine/mips/$(DEPDIR) libc/machine/mn10200/$(DEPDIR) libc/machine/mn10300/$(DEPDIR) libc/machine/moxie/$(DEPDIR) libc/machine/msp430/$(DEPDIR) libc/machine/mt/$(DEPDIR) libc/machine/nds32/$(DEPDIR) libc/machine/necv70/$(DEPDIR) libc/machine/nvptx/$(DEPDIR) libc/machine/or1k/$(DEPDIR) libc/machine/powerpc/$(DEPDIR) libc/machine/riscv/$(DEPDIR) libc/machine/rl78/$(DEPDIR) libc/machine/rx/$(DEPDIR) libc/machine/sh/$(DEPDIR) libc/machine/sparc/$(DEPDIR) libc/machine/spu/$(DEPDIR) libc/machine/tic4x/$(DEPDIR) libc/machine/tic6x/$(DEPDIR) libc/machine/tic80/$(DEPDIR) libc/machine/v850/$(DEPDIR) libc/machine/visium/$(DEPDIR) libc/machine/w65/$(DEPDIR) libc/machine/x86_64/$(DEPDIR) libc/machine/xc16x/$(DEPDIR) libc/machine/xstormy16/$(DEPDIR) libc/machine/xtensa/$(DEPDIR) libc/machine/z8k/$(DEPDIR) libc/misc/$(DEPDIR) libc/posix/$(DEPDIR) libc/reent/$(DEPDIR) libc/search/$(DEPDIR) libc/signal/$(DEPDIR) libc/ssp/$(DEPDIR) libc/stdio/$(DEPDIR) libc/stdio64/$(DEPDIR) libc/stdlib/$(DEPDIR) libc/string/$(DEPDIR) libc/sys/a29khif/$(DEPDIR) libc/sys/amdgcn/$(DEPDIR) libc/sys/arm/$(DEPDIR) libc/sys/d10v/$(DEPDIR) libc/sys/epiphany/$(DEPDIR) libc/sys/h8300hms/$(DEPDIR) libc/sys/h8500hms/$(DEPDIR) libc/sys/m88kbug/$(DEPDIR) libc/sys/mmixware/$(DEPDIR) libc/sys/netware/$(DEPDIR) libc/sys/or1k/$(DEPDIR) libc/sys/rdos/$(DEPDIR) libc/sys/rtems/$(DEPDIR) libc/sys/sh/$(DEPDIR) libc/sys/sysmec/$(DEPDIR) libc/sys/sysnec810/$(DEPDIR) libc/sys/sysnecv850/$(DEPDIR) libc/sys/sysvi386/$(DEPDIR) libc/sys/sysvnecv70/$(DEPDIR) libc/sys/tirtos/$(DEPDIR) libc/sys/w65/$(DEPDIR) libc/sys/xtensa/$(DEPDIR) libc/sys/z8ksim/$(DEPDIR) libc/syscalls/$(DEPDIR) libc/time/$(DEPDIR) libc/unix/$(DEPDIR) libc/xdr/$(DEPDIR) libm/common/$(DEPDIR) libm/complex/$(DEPDIR) libm/fenv/$(DEPDIR) libm/ld/$(DEPDIR) libm/ld128/$(DEPDIR) libm/ld80/$(DEPDIR) libm/machine/aarch64/$(DEPDIR) libm/machine/amdgcn/$(DEPDIR) libm/machine/arm/$(DEPDIR) libm/machine/i386/$(DEPDIR) libm/machine/mips/$(DEPDIR) libm/machine/nds32/$(DEPDIR) libm/machine/powerpc/$(DEPDIR) libm/machine/pru/$(DEPDIR) libm/machine/riscv/$(DEPDIR) libm/machine/sparc/$(DEPDIR) libm/machine/spu/$(DEPDIR) libm/machine/x86_64/$(DEPDIR) libm/machine/xtensa/$(DEPDIR) libm/math/$(DEPDIR) libm/mathfp/$(DEPDIR) libm/test/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-DEJAGNU distclean-compile \ distclean-generic distclean-hdr distclean-local distclean-tags @@ -50535,7 +50865,7 @@ installcheck-am: maintainer-clean: maintainer-clean-am -rm -f $(am__CONFIG_DISTCLEAN_FILES) -rm -rf $(top_srcdir)/autom4te.cache - -rm -rf libc/argz/$(DEPDIR) libc/ctype/$(DEPDIR) libc/errno/$(DEPDIR) libc/iconv/ccs/$(DEPDIR) libc/iconv/ces/$(DEPDIR) libc/iconv/lib/$(DEPDIR) libc/locale/$(DEPDIR) libc/machine/aarch64/$(DEPDIR) libc/machine/amdgcn/$(DEPDIR) libc/machine/arc/$(DEPDIR) libc/machine/arm/$(DEPDIR) libc/machine/bfin/$(DEPDIR) libc/machine/cr16/$(DEPDIR) libc/machine/cris/$(DEPDIR) libc/machine/crx/$(DEPDIR) libc/machine/csky/$(DEPDIR) libc/machine/d10v/$(DEPDIR) libc/machine/d30v/$(DEPDIR) libc/machine/epiphany/$(DEPDIR) libc/machine/fr30/$(DEPDIR) libc/machine/frv/$(DEPDIR) libc/machine/ft32/$(DEPDIR) libc/machine/h8300/$(DEPDIR) libc/machine/h8500/$(DEPDIR) libc/machine/hppa/$(DEPDIR) libc/machine/i386/$(DEPDIR) libc/machine/i960/$(DEPDIR) libc/machine/iq2000/$(DEPDIR) libc/machine/lm32/$(DEPDIR) libc/machine/m32c/$(DEPDIR) libc/machine/m32r/$(DEPDIR) libc/machine/m68hc11/$(DEPDIR) libc/machine/m68k/$(DEPDIR) libc/machine/m88k/$(DEPDIR) libc/machine/mep/$(DEPDIR) libc/machine/microblaze/$(DEPDIR) libc/machine/mips/$(DEPDIR) libc/machine/mn10200/$(DEPDIR) libc/machine/mn10300/$(DEPDIR) libc/machine/moxie/$(DEPDIR) libc/machine/msp430/$(DEPDIR) libc/machine/mt/$(DEPDIR) libc/machine/nds32/$(DEPDIR) libc/machine/necv70/$(DEPDIR) libc/machine/nvptx/$(DEPDIR) libc/machine/or1k/$(DEPDIR) libc/machine/powerpc/$(DEPDIR) libc/machine/riscv/$(DEPDIR) libc/machine/rl78/$(DEPDIR) libc/machine/rx/$(DEPDIR) libc/machine/sh/$(DEPDIR) libc/machine/sparc/$(DEPDIR) libc/machine/spu/$(DEPDIR) libc/machine/tic4x/$(DEPDIR) libc/machine/tic6x/$(DEPDIR) libc/machine/tic80/$(DEPDIR) libc/machine/v850/$(DEPDIR) libc/machine/visium/$(DEPDIR) libc/machine/w65/$(DEPDIR) libc/machine/x86_64/$(DEPDIR) libc/machine/xc16x/$(DEPDIR) libc/machine/xstormy16/$(DEPDIR) libc/machine/xtensa/$(DEPDIR) libc/machine/z8k/$(DEPDIR) libc/misc/$(DEPDIR) libc/posix/$(DEPDIR) libc/reent/$(DEPDIR) libc/search/$(DEPDIR) libc/signal/$(DEPDIR) libc/ssp/$(DEPDIR) libc/stdio/$(DEPDIR) libc/stdio64/$(DEPDIR) libc/stdlib/$(DEPDIR) libc/string/$(DEPDIR) libc/sys/a29khif/$(DEPDIR) libc/sys/amdgcn/$(DEPDIR) libc/sys/arm/$(DEPDIR) libc/sys/d10v/$(DEPDIR) libc/sys/epiphany/$(DEPDIR) libc/sys/h8300hms/$(DEPDIR) libc/sys/h8500hms/$(DEPDIR) libc/sys/m88kbug/$(DEPDIR) libc/sys/mmixware/$(DEPDIR) libc/sys/netware/$(DEPDIR) libc/sys/or1k/$(DEPDIR) libc/sys/rdos/$(DEPDIR) libc/sys/rtems/$(DEPDIR) libc/sys/sh/$(DEPDIR) libc/sys/sysmec/$(DEPDIR) libc/sys/sysnec810/$(DEPDIR) libc/sys/sysnecv850/$(DEPDIR) libc/sys/sysvi386/$(DEPDIR) libc/sys/sysvnecv70/$(DEPDIR) libc/sys/tirtos/$(DEPDIR) libc/sys/w65/$(DEPDIR) libc/sys/xtensa/$(DEPDIR) libc/sys/z8ksim/$(DEPDIR) libc/syscalls/$(DEPDIR) libc/time/$(DEPDIR) libc/unix/$(DEPDIR) libc/xdr/$(DEPDIR) libm/common/$(DEPDIR) libm/complex/$(DEPDIR) libm/fenv/$(DEPDIR) libm/ld/$(DEPDIR) libm/ld128/$(DEPDIR) libm/ld80/$(DEPDIR) libm/machine/aarch64/$(DEPDIR) libm/machine/amdgcn/$(DEPDIR) libm/machine/arm/$(DEPDIR) libm/machine/i386/$(DEPDIR) libm/machine/mips/$(DEPDIR) libm/machine/nds32/$(DEPDIR) libm/machine/powerpc/$(DEPDIR) libm/machine/pru/$(DEPDIR) libm/machine/riscv/$(DEPDIR) libm/machine/sparc/$(DEPDIR) libm/machine/spu/$(DEPDIR) libm/machine/x86_64/$(DEPDIR) libm/machine/xtensa/$(DEPDIR) libm/math/$(DEPDIR) libm/mathfp/$(DEPDIR) libm/test/$(DEPDIR) + -rm -rf libc/argz/$(DEPDIR) libc/ctype/$(DEPDIR) libc/errno/$(DEPDIR) libc/iconv/ccs/$(DEPDIR) libc/iconv/ces/$(DEPDIR) libc/iconv/lib/$(DEPDIR) libc/locale/$(DEPDIR) libc/machine/aarch64/$(DEPDIR) libc/machine/amdgcn/$(DEPDIR) libc/machine/arc/$(DEPDIR) libc/machine/arc64/$(DEPDIR) libc/machine/arm/$(DEPDIR) libc/machine/bfin/$(DEPDIR) libc/machine/cr16/$(DEPDIR) libc/machine/cris/$(DEPDIR) libc/machine/crx/$(DEPDIR) libc/machine/csky/$(DEPDIR) libc/machine/d10v/$(DEPDIR) libc/machine/d30v/$(DEPDIR) libc/machine/epiphany/$(DEPDIR) libc/machine/fr30/$(DEPDIR) libc/machine/frv/$(DEPDIR) libc/machine/ft32/$(DEPDIR) libc/machine/h8300/$(DEPDIR) libc/machine/h8500/$(DEPDIR) libc/machine/hppa/$(DEPDIR) libc/machine/i386/$(DEPDIR) libc/machine/i960/$(DEPDIR) libc/machine/iq2000/$(DEPDIR) libc/machine/lm32/$(DEPDIR) libc/machine/m32c/$(DEPDIR) libc/machine/m32r/$(DEPDIR) libc/machine/m68hc11/$(DEPDIR) libc/machine/m68k/$(DEPDIR) libc/machine/m88k/$(DEPDIR) libc/machine/mep/$(DEPDIR) libc/machine/microblaze/$(DEPDIR) libc/machine/mips/$(DEPDIR) libc/machine/mn10200/$(DEPDIR) libc/machine/mn10300/$(DEPDIR) libc/machine/moxie/$(DEPDIR) libc/machine/msp430/$(DEPDIR) libc/machine/mt/$(DEPDIR) libc/machine/nds32/$(DEPDIR) libc/machine/necv70/$(DEPDIR) libc/machine/nvptx/$(DEPDIR) libc/machine/or1k/$(DEPDIR) libc/machine/powerpc/$(DEPDIR) libc/machine/riscv/$(DEPDIR) libc/machine/rl78/$(DEPDIR) libc/machine/rx/$(DEPDIR) libc/machine/sh/$(DEPDIR) libc/machine/sparc/$(DEPDIR) libc/machine/spu/$(DEPDIR) libc/machine/tic4x/$(DEPDIR) libc/machine/tic6x/$(DEPDIR) libc/machine/tic80/$(DEPDIR) libc/machine/v850/$(DEPDIR) libc/machine/visium/$(DEPDIR) libc/machine/w65/$(DEPDIR) libc/machine/x86_64/$(DEPDIR) libc/machine/xc16x/$(DEPDIR) libc/machine/xstormy16/$(DEPDIR) libc/machine/xtensa/$(DEPDIR) libc/machine/z8k/$(DEPDIR) libc/misc/$(DEPDIR) libc/posix/$(DEPDIR) libc/reent/$(DEPDIR) libc/search/$(DEPDIR) libc/signal/$(DEPDIR) libc/ssp/$(DEPDIR) libc/stdio/$(DEPDIR) libc/stdio64/$(DEPDIR) libc/stdlib/$(DEPDIR) libc/string/$(DEPDIR) libc/sys/a29khif/$(DEPDIR) libc/sys/amdgcn/$(DEPDIR) libc/sys/arm/$(DEPDIR) libc/sys/d10v/$(DEPDIR) libc/sys/epiphany/$(DEPDIR) libc/sys/h8300hms/$(DEPDIR) libc/sys/h8500hms/$(DEPDIR) libc/sys/m88kbug/$(DEPDIR) libc/sys/mmixware/$(DEPDIR) libc/sys/netware/$(DEPDIR) libc/sys/or1k/$(DEPDIR) libc/sys/rdos/$(DEPDIR) libc/sys/rtems/$(DEPDIR) libc/sys/sh/$(DEPDIR) libc/sys/sysmec/$(DEPDIR) libc/sys/sysnec810/$(DEPDIR) libc/sys/sysnecv850/$(DEPDIR) libc/sys/sysvi386/$(DEPDIR) libc/sys/sysvnecv70/$(DEPDIR) libc/sys/tirtos/$(DEPDIR) libc/sys/w65/$(DEPDIR) libc/sys/xtensa/$(DEPDIR) libc/sys/z8ksim/$(DEPDIR) libc/syscalls/$(DEPDIR) libc/time/$(DEPDIR) libc/unix/$(DEPDIR) libc/xdr/$(DEPDIR) libm/common/$(DEPDIR) libm/complex/$(DEPDIR) libm/fenv/$(DEPDIR) libm/ld/$(DEPDIR) libm/ld128/$(DEPDIR) libm/ld80/$(DEPDIR) libm/machine/aarch64/$(DEPDIR) libm/machine/amdgcn/$(DEPDIR) libm/machine/arm/$(DEPDIR) libm/machine/i386/$(DEPDIR) libm/machine/mips/$(DEPDIR) libm/machine/nds32/$(DEPDIR) libm/machine/powerpc/$(DEPDIR) libm/machine/pru/$(DEPDIR) libm/machine/riscv/$(DEPDIR) libm/machine/sparc/$(DEPDIR) libm/machine/spu/$(DEPDIR) libm/machine/x86_64/$(DEPDIR) libm/machine/xtensa/$(DEPDIR) libm/math/$(DEPDIR) libm/mathfp/$(DEPDIR) libm/test/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-aminfo \ maintainer-clean-generic maintainer-clean-local diff --git a/newlib/configure b/newlib/configure index 6a542bb..e7158c0 100755 --- a/newlib/configure +++ b/newlib/configure @@ -751,6 +751,8 @@ HAVE_LIBC_MACHINE_BFIN_FALSE HAVE_LIBC_MACHINE_BFIN_TRUE HAVE_LIBC_MACHINE_ARM_FALSE HAVE_LIBC_MACHINE_ARM_TRUE +HAVE_LIBC_MACHINE_ARC64_FALSE +HAVE_LIBC_MACHINE_ARC64_TRUE HAVE_LIBC_MACHINE_ARC_FALSE HAVE_LIBC_MACHINE_ARC_TRUE HAVE_LIBC_MACHINE_AMDGCN_FALSE @@ -775,8 +777,6 @@ HAVE_LONG_DOUBLE_FALSE HAVE_LONG_DOUBLE_TRUE HAVE_LIBC_SYS_Z8KSIM_DIR_FALSE HAVE_LIBC_SYS_Z8KSIM_DIR_TRUE -HAVE_LIBC_SYS_XTENSA_DIR_FALSE -HAVE_LIBC_SYS_XTENSA_DIR_TRUE HAVE_LIBC_SYS_W65_DIR_FALSE HAVE_LIBC_SYS_W65_DIR_TRUE HAVE_LIBC_SYS_TIRTOS_DIR_FALSE @@ -5512,13 +5512,6 @@ else HAVE_LIBC_SYS_W65_DIR_TRUE='#' HAVE_LIBC_SYS_W65_DIR_FALSE= fi - if test "${sys_dir}" = xtensa; then - HAVE_LIBC_SYS_XTENSA_DIR_TRUE= - HAVE_LIBC_SYS_XTENSA_DIR_FALSE='#' -else - HAVE_LIBC_SYS_XTENSA_DIR_TRUE='#' - HAVE_LIBC_SYS_XTENSA_DIR_FALSE= -fi if test "${sys_dir}" = z8ksim; then HAVE_LIBC_SYS_Z8KSIM_DIR_TRUE= HAVE_LIBC_SYS_Z8KSIM_DIR_FALSE='#' @@ -5764,6 +5757,13 @@ else HAVE_LIBC_MACHINE_ARC_TRUE='#' HAVE_LIBC_MACHINE_ARC_FALSE= fi + if test "${machine_dir}" = arc64; then + HAVE_LIBC_MACHINE_ARC64_TRUE= + HAVE_LIBC_MACHINE_ARC64_FALSE='#' +else + HAVE_LIBC_MACHINE_ARC64_TRUE='#' + HAVE_LIBC_MACHINE_ARC64_FALSE= +fi if test "${machine_dir}" = arm; then HAVE_LIBC_MACHINE_ARM_TRUE= HAVE_LIBC_MACHINE_ARM_FALSE='#' @@ -6263,7 +6263,7 @@ else /* end confdefs.h. */ #define _LIBM // targ-include does not exist yet, use relative path -#include "../sys/xtensa/include/xtensa/config/core-isa.h" +#include "../machine/xtensa/include/xtensa/config/core-isa.h" #if (!XCHAL_HAVE_FP_SQRT) # error "Have not XCHAL_HAVE_FP_SQRT" #endif @@ -7699,10 +7699,6 @@ if test -z "${HAVE_LIBC_SYS_W65_DIR_TRUE}" && test -z "${HAVE_LIBC_SYS_W65_DIR_F as_fn_error $? "conditional \"HAVE_LIBC_SYS_W65_DIR\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${HAVE_LIBC_SYS_XTENSA_DIR_TRUE}" && test -z "${HAVE_LIBC_SYS_XTENSA_DIR_FALSE}"; then - as_fn_error $? "conditional \"HAVE_LIBC_SYS_XTENSA_DIR\" was never defined. -Usually this means the macro was only invoked conditionally." "$LINENO" 5 -fi if test -z "${HAVE_LIBC_SYS_Z8KSIM_DIR_TRUE}" && test -z "${HAVE_LIBC_SYS_Z8KSIM_DIR_FALSE}"; then as_fn_error $? "conditional \"HAVE_LIBC_SYS_Z8KSIM_DIR\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -7751,6 +7747,10 @@ if test -z "${HAVE_LIBC_MACHINE_ARC_TRUE}" && test -z "${HAVE_LIBC_MACHINE_ARC_F as_fn_error $? "conditional \"HAVE_LIBC_MACHINE_ARC\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${HAVE_LIBC_MACHINE_ARC64_TRUE}" && test -z "${HAVE_LIBC_MACHINE_ARC64_FALSE}"; then + as_fn_error $? "conditional \"HAVE_LIBC_MACHINE_ARC64\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${HAVE_LIBC_MACHINE_ARM_TRUE}" && test -z "${HAVE_LIBC_MACHINE_ARM_FALSE}"; then as_fn_error $? "conditional \"HAVE_LIBC_MACHINE_ARM\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 diff --git a/newlib/configure.host b/newlib/configure.host index 3861834..ff2e512 100644 --- a/newlib/configure.host +++ b/newlib/configure.host @@ -122,9 +122,12 @@ case "${host_cpu}" in libm_machine_dir=amdgcn newlib_cv_initfinit_array=yes ;; - arc*) + arc | arceb) machine_dir=arc ;; + arc64 | arc32) + machine_dir=arc64 + ;; arm*) machine_dir=arm libm_machine_dir=arm @@ -443,6 +446,15 @@ case "${host}" in sys_dir=tirtos have_crt0="no" ;; + *-esp-*) + sys_dir=esp + have_crt0="no" + posix_dir=posix + newlib_cflags="${newlib_cflags} -D_NO_GLOB -D_NO_EXECVE -D_NO_GETLOGIN -D_NO_GETPWENT -D_NO_GETUT" + newlib_cflags="${newlib_cflags} -D_NO_GETPASS -D_NO_SIGSET -D_NO_WORDEXP -D_NO_POPEN -D_NO_POSIX_SPAWN" + newlib_cflags="${newlib_cflags} -DHAVE_FCNTL -DHAVE_BLKSIZE -DHAVE_OPENDIR -DHAVE_RENAME" + newlib_cflags="${newlib_cflags} -DGETREENT_PROVIDED -DSIGNAL_PROVIDED" + ;; a29k-*-*) sys_dir=a29khif signal_dir= @@ -576,9 +588,6 @@ case "${host}" in w65-*-*) sys_dir=w65 ;; - xtensa*-*-*) - sys_dir=xtensa - ;; z8k-*-coff) sys_dir=z8ksim ;; diff --git a/newlib/libc/acinclude.m4 b/newlib/libc/acinclude.m4 index 24148b1..52a6c57 100644 --- a/newlib/libc/acinclude.m4 +++ b/newlib/libc/acinclude.m4 @@ -23,7 +23,6 @@ m4_foreach_w([SYS_DIR], [ sh sysmec sysnec810 sysnecv850 sysvi386 sysvnecv70 tic80 tirtos w65 - xtensa z8ksim ], [AM_CONDITIONAL([HAVE_LIBC_SYS_]m4_toupper(SYS_DIR)[_DIR], test "${sys_dir}" = SYS_DIR)]) @@ -42,7 +41,7 @@ m4_include([libc/machine/spu/acinclude.m4]) m4_include([libc/machine/xtensa/acinclude.m4]) m4_foreach_w([MACHINE], [ - aarch64 amdgcn arc arm + aarch64 amdgcn arc arc64 arm bfin cr16 cris crx csky d10v d30v diff --git a/newlib/libc/include/dirent.h b/newlib/libc/include/dirent.h index cc7e9e0..239253e 100644 --- a/newlib/libc/include/dirent.h +++ b/newlib/libc/include/dirent.h @@ -80,9 +80,9 @@ int scandirat(int, const char *, struct dirent ***, const struct dirent **)); int versionsort(const struct dirent **, const struct dirent **); #endif -#if __POSIX_VISIBLE >= 200809 +#if __POSIX_VISIBLE >= 202405 ssize_t posix_getdents(int, void *, size_t, int); -#endif /* __POSIX_VISIBLE >= 200809 */ +#endif /* __POSIX_VISIBLE >= 202405 */ __END_DECLS #endif /*_DIRENT_H_*/ diff --git a/newlib/libc/include/glob.h b/newlib/libc/include/glob.h index 7a300e6..c14840c 100644 --- a/newlib/libc/include/glob.h +++ b/newlib/libc/include/glob.h @@ -80,6 +80,7 @@ typedef struct { #define GLOB_NOSPACE (-1) /* Malloc call failed. */ #define GLOB_ABEND (-2) /* Unignored error. */ +#define GLOB_NOMATCH (-3) /* No match and GLOB_NOCHECK not set. */ __BEGIN_DECLS int glob(const char *__restrict, int, int (*)(const char *, int), diff --git a/newlib/libc/include/locale.h b/newlib/libc/include/locale.h index e3a702a..47b02e9 100644 --- a/newlib/libc/include/locale.h +++ b/newlib/libc/include/locale.h @@ -90,7 +90,7 @@ locale_t duplocale (locale_t); locale_t uselocale (locale_t); #endif /* __POSIX_VISIBLE >= 200809 */ -#if __POSIX_VISIBLE >= 200809 /* FIXME? Starting with issue 8 */ +#if __POSIX_VISIBLE >= 202405 const char *getlocalename_l (int, struct __locale_t *); #endif diff --git a/newlib/libc/include/machine/ieeefp.h b/newlib/libc/include/machine/ieeefp.h index ede75e1..f99577b 100644 --- a/newlib/libc/include/machine/ieeefp.h +++ b/newlib/libc/include/machine/ieeefp.h @@ -337,6 +337,10 @@ #endif #endif +#ifdef __ARC64__ +#define __IEEE_LITTLE_ENDIAN +#endif + #ifdef __CRX__ #define __IEEE_LITTLE_ENDIAN #endif diff --git a/newlib/libc/include/machine/setjmp.h b/newlib/libc/include/machine/setjmp.h index 515e84c..102582c 100644 --- a/newlib/libc/include/machine/setjmp.h +++ b/newlib/libc/include/machine/setjmp.h @@ -284,6 +284,16 @@ _BEGIN_STD_C #define _JBLEN 25 /* r13-r30,blink,lp_count,lp_start,lp_end,status32,r58,r59 */ #endif +#ifdef __ARC64__ +/* r14-r27,sp,ilink,r30,blink */ +#define _JBLEN 18 +#ifdef __ARC64_ARCH64__ +#define _JBTYPE long long +#else /* __ARC64_ARCH32__ */ +#define _JBTYPE long +#endif +#endif /* __ARC64__ */ + #ifdef __MMIX__ /* Using a layout compatible with GCC's built-in. */ #define _JBLEN 5 diff --git a/newlib/libc/include/regex.h b/newlib/libc/include/regex.h index fa3e268..4da1a37 100644 --- a/newlib/libc/include/regex.h +++ b/newlib/libc/include/regex.h @@ -96,7 +96,7 @@ __BEGIN_DECLS int regcomp(regex_t *__restrict, const char *__restrict, int); size_t regerror(int, const regex_t *__restrict, char *__restrict, size_t); int regexec(const regex_t *__restrict, const char *__restrict, - size_t, regmatch_t [__restrict], int); + size_t, regmatch_t [__restrict_arr], int); void regfree(regex_t *); __END_DECLS diff --git a/newlib/libc/include/stdatomic.h b/newlib/libc/include/stdatomic.h index 2bb976f..13d1e17 100644 --- a/newlib/libc/include/stdatomic.h +++ b/newlib/libc/include/stdatomic.h @@ -33,7 +33,8 @@ #include <sys/cdefs.h> #include <sys/_types.h> -#if __has_extension(c_atomic) || __has_extension(cxx_atomic) +#if (__has_extension(c_atomic) || __has_extension(cxx_atomic)) && \ + defined(__clang__) #define __CLANG_ATOMICS #elif __GNUC_PREREQ__(4, 7) #define __GNUC_ATOMICS diff --git a/newlib/libc/include/stdlib.h b/newlib/libc/include/stdlib.h index fd89f5b..0690a03 100644 --- a/newlib/libc/include/stdlib.h +++ b/newlib/libc/include/stdlib.h @@ -221,7 +221,7 @@ char * ecvtbuf (double, int, int*, int*, char *); char * fcvtbuf (double, int, int*, int*, char *); char * ecvtf (float,int,int *,int *); #endif -#ifndef __CYGWIN__ +#if !defined (__CYGWIN__) || defined (_LIBC) char * __itoa (int, char *, int); char * __utoa (unsigned, char *, int); # if __MISC_VISIBLE diff --git a/newlib/libc/include/sys/features.h b/newlib/libc/include/sys/features.h index 6a925c8..43c029b 100644 --- a/newlib/libc/include/sys/features.h +++ b/newlib/libc/include/sys/features.h @@ -49,22 +49,25 @@ extern "C" { * * _POSIX_SOURCE (deprecated by _POSIX_C_SOURCE=1) * _POSIX_C_SOURCE >= 1 - * POSIX.1-1990 + * POSIX.1-1990 * * _POSIX_C_SOURCE >= 2 - * POSIX.2-1992 + * POSIX.2-1992 * * _POSIX_C_SOURCE >= 199309L - * POSIX.1b-1993 Real-time extensions + * POSIX.1b-1993 Real-time extensions * * _POSIX_C_SOURCE >= 199506L - * POSIX.1c-1995 Threads extensions + * POSIX.1c-1995 Threads extensions * * _POSIX_C_SOURCE >= 200112L - * POSIX.1-2001 and C99 + * POSIX.1-2001 and C99 * * _POSIX_C_SOURCE >= 200809L - * POSIX.1-2008 + * POSIX.1-2008 + * + * _POSIX_C_SOURCE >= 202405L + * POSIX.1-2024 * * _XOPEN_SOURCE * POSIX.1-1990 and XPG4 @@ -82,13 +85,13 @@ extern "C" { * SUSv4 (POSIX.1-2008 plus XSI) * * _ISOC99_SOURCE or gcc -std=c99 or g++ - * ISO C99 + * ISO C99 * * _ISOC11_SOURCE or gcc -std=c11 or g++ -std=c++11 - * ISO C11 + * ISO C11 * * _ISOC2x_SOURCE or gcc -std=c2x or g++ -std=c++20 - * ISO C11 + * ISO C11 * * _ATFILE_SOURCE (implied by _POSIX_C_SOURCE >= 200809L) * "at" functions @@ -97,15 +100,15 @@ extern "C" { * fseeko, ftello * * _GNU_SOURCE - * All of the above plus GNU extensions + * All of the above plus GNU extensions * * _BSD_SOURCE (deprecated by _DEFAULT_SOURCE) * _SVID_SOURCE (deprecated by _DEFAULT_SOURCE) * _DEFAULT_SOURCE (or none of the above) - * POSIX-1.2008 with BSD and SVr4 extensions + * POSIX-1.2008 with BSD and SVr4 extensions * * _FORTIFY_SOURCE = 1, 2 or 3 - * Object Size Checking function wrappers + * Object Size Checking function wrappers */ #ifdef _GNU_SOURCE @@ -141,7 +144,7 @@ extern "C" { #undef _POSIX_SOURCE #define _POSIX_SOURCE 1 #undef _POSIX_C_SOURCE -#define _POSIX_C_SOURCE 200809L +#define _POSIX_C_SOURCE 202405L #endif #if !defined(_POSIX_SOURCE) && !defined(_POSIX_C_SOURCE) && \ @@ -171,35 +174,39 @@ extern "C" { * of these headers. * * __POSIX_VISIBLE - * any version of POSIX.1; enabled by default, or with _POSIX_SOURCE, - * any value of _POSIX_C_SOURCE, or _XOPEN_SOURCE >= 500. + * any version of POSIX.1; enabled by default, or with _POSIX_SOURCE, + * any value of _POSIX_C_SOURCE, or _XOPEN_SOURCE >= 500. * * __POSIX_VISIBLE >= 2 - * POSIX.2-1992; enabled by default, with _POSIX_C_SOURCE >= 2, - * or _XOPEN_SOURCE >= 500. + * POSIX.2-1992; enabled by default, with _POSIX_C_SOURCE >= 2, + * or _XOPEN_SOURCE >= 500. * * __POSIX_VISIBLE >= 199309 - * POSIX.1b-1993; enabled by default, with _POSIX_C_SOURCE >= 199309L, - * or _XOPEN_SOURCE >= 500. + * POSIX.1b-1993; enabled by default, with _POSIX_C_SOURCE >= 199309L, + * or _XOPEN_SOURCE >= 500. * * __POSIX_VISIBLE >= 199506 - * POSIX.1c-1995; enabled by default, with _POSIX_C_SOURCE >= 199506L, - * or _XOPEN_SOURCE >= 500. + * POSIX.1c-1995; enabled by default, with _POSIX_C_SOURCE >= 199506L, + * or _XOPEN_SOURCE >= 500. * * __POSIX_VISIBLE >= 200112 - * POSIX.1-2001; enabled by default, with _POSIX_C_SOURCE >= 200112L, - * or _XOPEN_SOURCE >= 600. + * POSIX.1-2001; enabled by default, with _POSIX_C_SOURCE >= 200112L, + * or _XOPEN_SOURCE >= 600. * * __POSIX_VISIBLE >= 200809 - * POSIX.1-2008; enabled by default, with _POSIX_C_SOURCE >= 200809L, - * or _XOPEN_SOURCE >= 700. + * POSIX.1-2008; enabled by default, with _POSIX_C_SOURCE >= 200809L, + * or _XOPEN_SOURCE >= 700. + * + * __POSIX_VISIBLE >= 202405 + * POSIX.1-2024; enabled by default, with _POSIX_C_SOURCE >= 202405L, + * or _XOPEN_SOURCE >= 700. * * __XSI_VISIBLE * XPG4 XSI extensions; enabled with any version of _XOPEN_SOURCE. * * __XSI_VISIBLE >= 4 * SUSv1 XSI extensions; enabled with both _XOPEN_SOURCE and - * _XOPEN_SOURCE_EXTENDED together. + * _XOPEN_SOURCE_EXTENDED together. * * __XSI_VISIBLE >= 500 * SUSv2 XSI extensions; enabled with _XOPEN_SOURCE >= 500. @@ -211,43 +218,43 @@ extern "C" { * SUSv4 XSI extensions; enabled with _XOPEN_SOURCE >= 700. * * __ISO_C_VISIBLE >= 1999 - * ISO C99; enabled with gcc -std=c99 or newer (on by default since GCC 5), - * any version of C++, or with _ISOC99_SOURCE, _POSIX_C_SOURCE >= 200112L, - * or _XOPEN_SOURCE >= 600. + * ISO C99; enabled with gcc -std=c99 or newer (on by default since GCC 5), + * any version of C++, or with _ISOC99_SOURCE, _POSIX_C_SOURCE >= 200112L, + * or _XOPEN_SOURCE >= 600. * * __ISO_C_VISIBLE >= 2011 - * ISO C11; enabled with gcc -std=c11 or newer (on by default since GCC 5), - * g++ -std=c++11 or newer (on by default since GCC 6), or with - * _ISOC11_SOURCE. + * ISO C11; enabled with gcc -std=c11 or newer (on by default since GCC 5), + * g++ -std=c++11 or newer (on by default since GCC 6), or with + * _ISOC11_SOURCE. * * __ISO_C_VISIBLE >= 2020 - * ISO C2x; enabled with gcc -std=c2x or newer, - * g++ -std=c++20 or newer, or with - * _ISOC2X_SOURCE. + * ISO C2x; enabled with gcc -std=c2x or newer, + * g++ -std=c++20 or newer, or with + * _ISOC2X_SOURCE. * * __ATFILE_VISIBLE * "at" functions; enabled by default, with _ATFILE_SOURCE, - * _POSIX_C_SOURCE >= 200809L, or _XOPEN_SOURCE >= 700. + * _POSIX_C_SOURCE >= 200809L, or _XOPEN_SOURCE >= 700. * * __LARGEFILE_VISIBLE * fseeko, ftello; enabled with _LARGEFILE_SOURCE or _XOPEN_SOURCE >= 500. * * __BSD_VISIBLE - * BSD extensions; enabled by default, or with _BSD_SOURCE. + * BSD extensions; enabled by default, or with _BSD_SOURCE. * * __SVID_VISIBLE - * SVr4 extensions; enabled by default, or with _SVID_SOURCE. + * SVr4 extensions; enabled by default, or with _SVID_SOURCE. * * __MISC_VISIBLE - * Extensions found in both BSD and SVr4 (shorthand for - * (__BSD_VISIBLE || __SVID_VISIBLE)), or newlib-specific - * extensions; enabled by default. + * Extensions found in both BSD and SVr4 (shorthand for + * (__BSD_VISIBLE || __SVID_VISIBLE)), or newlib-specific + * extensions; enabled by default. * * __GNU_VISIBLE - * GNU extensions; enabled with _GNU_SOURCE. + * GNU extensions; enabled with _GNU_SOURCE. * * __SSP_FORTIFY_LEVEL - * Object Size Checking; defined to 0 (off), 1, 2 or 3. + * Object Size Checking; defined to 0 (off), 1, 2 or 3. * * In all cases above, "enabled by default" means either by defining * _DEFAULT_SOURCE, or by not defining any of the public feature test macros. @@ -296,7 +303,9 @@ extern "C" { #define __MISC_VISIBLE 0 #endif -#if (_POSIX_C_SOURCE - 0) >= 200809L +#if (_POSIX_C_SOURCE - 0) >= 202405L +#define __POSIX_VISIBLE 202405 +#elif (_POSIX_C_SOURCE - 0) >= 200809L #define __POSIX_VISIBLE 200809 #elif (_POSIX_C_SOURCE - 0) >= 200112L #define __POSIX_VISIBLE 200112 @@ -353,8 +362,8 @@ extern "C" { /* RTEMS adheres to POSIX -- 1003.1b with some features from annexes. */ #ifdef __rtems__ -#define _POSIX_JOB_CONTROL 1 -#define _POSIX_SAVED_IDS 1 +#define _POSIX_JOB_CONTROL 1 +#define _POSIX_SAVED_IDS 1 #define _POSIX_VERSION 199309L #define _POSIX_ASYNCHRONOUS_IO 1 #define _POSIX_FSYNC 1 @@ -422,7 +431,10 @@ extern "C" { #ifdef __CYGWIN__ -#if __POSIX_VISIBLE >= 200809 +#if __POSIX_VISIBLE >= 202405 +#define _POSIX_VERSION 202405L +#define _POSIX2_VERSION 202405L +#elif __POSIX_VISIBLE >= 200809 #define _POSIX_VERSION 200809L #define _POSIX2_VERSION 200809L #elif __POSIX_VISIBLE >= 200112 diff --git a/newlib/libc/include/sys/tree.h b/newlib/libc/include/sys/tree.h index 2d3cec0..f9324d5 100644 --- a/newlib/libc/include/sys/tree.h +++ b/newlib/libc/include/sys/tree.h @@ -32,6 +32,10 @@ #ifndef _SYS_TREE_H_ #define _SYS_TREE_H_ +#ifndef __PERMIT_DEPRECATED_SYS_TREE_H +#warning "sys/tree.h is deprecated and will be removed in the future." +#endif + #include <sys/cdefs.h> /* @@ -90,7 +94,7 @@ struct { \ SPLAY_RIGHT(tmp, field) = (head)->sph_root; \ (head)->sph_root = tmp; \ } while (/*CONSTCOND*/ 0) - + #define SPLAY_ROTATE_LEFT(head, tmp, field) do { \ SPLAY_RIGHT((head)->sph_root, field) = SPLAY_LEFT(tmp, field); \ SPLAY_LEFT(tmp, field) = (head)->sph_root; \ diff --git a/newlib/libc/locale/nl_langinfo.c b/newlib/libc/locale/nl_langinfo.c index c34a7d1..4477d83 100644 --- a/newlib/libc/locale/nl_langinfo.c +++ b/newlib/libc/locale/nl_langinfo.c @@ -160,7 +160,6 @@ static struct _nl_item_t _NLITEM (monetary, wmon_thousands_sep), _NLITEM (monetary, wpositive_sign), _NLITEM (monetary, wnegative_sign), - _NLITEM (messages, codeset), _NLITEM (messages, wyesexpr), _NLITEM (messages, wnoexpr), _NLITEM (messages, wyesstr), diff --git a/newlib/libc/locale/setlocale.h b/newlib/libc/locale/setlocale.h index 7abf92f..e91034a 100644 --- a/newlib/libc/locale/setlocale.h +++ b/newlib/libc/locale/setlocale.h @@ -162,13 +162,15 @@ struct lc_messages_T const char *noexpr; const char *yesstr; const char *nostr; -#ifdef __HAVE_LOCALE_INFO_EXTENDED__ +#ifdef __HAVE_LOCALE_INFO__ const char *codeset; /* codeset for mbtowc conversion */ +#ifdef __HAVE_LOCALE_INFO_EXTENDED__ const wchar_t *wyesexpr; const wchar_t *wnoexpr; const wchar_t *wyesstr; const wchar_t *wnostr; #endif +#endif }; extern const struct lc_messages_T _C_messages_locale; diff --git a/newlib/libc/machine/Makefile.inc b/newlib/libc/machine/Makefile.inc index a53cf9c..162be4f 100644 --- a/newlib/libc/machine/Makefile.inc +++ b/newlib/libc/machine/Makefile.inc @@ -7,6 +7,9 @@ endif if HAVE_LIBC_MACHINE_ARC include %D%/arc/Makefile.inc endif +if HAVE_LIBC_MACHINE_ARC64 +include %D%/arc64/Makefile.inc +endif if HAVE_LIBC_MACHINE_ARM include %D%/arm/Makefile.inc endif diff --git a/newlib/libc/machine/arc/memcpy-archs.S b/newlib/libc/machine/arc/memcpy-archs.S index f30dafd..e8a2a7e 100644 --- a/newlib/libc/machine/arc/memcpy-archs.S +++ b/newlib/libc/machine/arc/memcpy-archs.S @@ -70,7 +70,21 @@ # define ZOLAND 0xF #endif -#ifdef __ARC_ALIGNED_ACCESS__ + +;;; MEMCPY copy memory regions +;;; Input arguments: +;;; r0 - output memory region +;;; r1 - input memory region +;;; r2 - size in bytes +;;; Returns: +;;; r0 - pointer to the first byte of the output region +;;; Clobber: +;;; r1, r2, r3, r4, r5, r6, r8r9, r10r11, lp_count + +#if !defined (__ARC_UNALIGNED__) + +;;; MEMCPY routine for the case when the CPU only accepts ALIGNED +;;; accesses to memory. ENTRY (memcpy) prefetch [r1] ; Prefetch the read location prefetchw [r0] ; Prefetch the write location @@ -81,12 +95,12 @@ ENTRY (memcpy) ; if size <= 8 cmp r2, 8 - bls.d @.Lsmallchunk + bls.d .Lsmallchunk mov.f lp_count, r2 and.f r4, r0, 0x03 rsub lp_count, r4, 4 - lpnz @.Laligndestination + lpnz .Laligndestination ; LOOP BEGIN ldb.ab r5, [r1,1] sub r2, r2, 1 @@ -95,12 +109,12 @@ ENTRY (memcpy) ; Check the alignment of the source and.f r4, r1, 0x03 - bnz.d @.Lsourceunaligned + bnz.d .Lsourceunaligned ; CASE 0: Both source and destination are 32bit aligned ; Convert len to Dwords, unfold x4 lsr.f lp_count, r2, ZOLSHFT - lpnz @.Lcopy32_64bytes + lpnz .Lcopy32_64bytes ; LOOP START LOADX (r6, r1) PREFETCH_READ (r1) @@ -116,7 +130,7 @@ ENTRY (memcpy) and.f lp_count, r2, ZOLAND ;Last remaining 31 bytes .Lsmallchunk: - lpnz @.Lcopyremainingbytes + lpnz .Lcopyremainingbytes ; LOOP START ldb.ab r5, [r1,1] stb.ab r5, [r3,1] @@ -127,10 +141,10 @@ ENTRY (memcpy) .Lsourceunaligned: cmp r4, 2 - beq.d @.LunalignedOffby2 + beq.d .LunalignedOffby2 sub r2, r2, 1 - bhi.d @.LunalignedOffby3 + bhi.d .LunalignedOffby3 ldb.ab r5, [r1, 1] ; CASE 1: The source is unaligned, off by 1 @@ -145,7 +159,7 @@ ENTRY (memcpy) or r5, r5, r6 ; Both src and dst are aligned - lpnz @.Lcopy8bytes_1 + lpnz .Lcopy8bytes_1 ; LOOP START ld.ab r6, [r1, 4] prefetch [r1, 28] ;Prefetch the next read location @@ -172,7 +186,7 @@ ENTRY (memcpy) stb.ab r5, [r3, 1] and.f lp_count, r2, 0x07 ;Last 8bytes - lpnz @.Lcopybytewise_1 + lpnz .Lcopybytewise_1 ; LOOP START ldb.ab r6, [r1,1] stb.ab r6, [r3,1] @@ -190,7 +204,7 @@ ENTRY (memcpy) #ifdef __BIG_ENDIAN__ asl.nz r5, r5, 16 #endif - lpnz @.Lcopy8bytes_2 + lpnz .Lcopy8bytes_2 ; LOOP START ld.ab r6, [r1, 4] prefetch [r1, 28] ;Prefetch the next read location @@ -215,7 +229,7 @@ ENTRY (memcpy) sth.ab r5, [r3, 2] and.f lp_count, r2, 0x07 ;Last 8bytes - lpnz @.Lcopybytewise_2 + lpnz .Lcopybytewise_2 ; LOOP START ldb.ab r6, [r1,1] stb.ab r6, [r3,1] @@ -232,7 +246,7 @@ ENTRY (memcpy) #ifdef __BIG_ENDIAN__ asl.ne r5, r5, 24 #endif - lpnz @.Lcopy8bytes_3 + lpnz .Lcopy8bytes_3 ; LOOP START ld.ab r6, [r1, 4] prefetch [r1, 28] ;Prefetch the next read location @@ -257,7 +271,7 @@ ENTRY (memcpy) stb.ab r5, [r3, 1] and.f lp_count, r2, 0x07 ;Last 8bytes - lpnz @.Lcopybytewise_3 + lpnz .Lcopybytewise_3 ; LOOP START ldb.ab r6, [r1,1] stb.ab r6, [r3,1] @@ -268,6 +282,8 @@ ENDFUNC (memcpy) #else +;;; MEMCPY routine which is used by systems with unaligned memory +;;; accesses. This is the case for most of ARCHS CPU family. ENTRY(memcpy) prefetch [r1] ; Prefetch the read location prefetchw [r0] ; Prefetch the write location @@ -278,12 +294,12 @@ ENTRY(memcpy) ;;; if size <= 8 cmp r2, 8 - bls.d @.Lsmallchunk + bls.d .Lsmallchunk mov.f lp_count, r2 ;;; Convert len to Dwords, unfold x4 lsr.f lp_count, r2, ZOLSHFT - lpnz @.Lcopyfast + lpnz .Lcopyfast ;; LOOP START LOADX (r6, r1) PREFETCH_READ (r1) @@ -300,7 +316,7 @@ ENTRY(memcpy) #ifdef __ARC_LL64__ and r2, r2, ZOLAND ;Remaining 31 bytes lsr.f lp_count, r2, 3 ;Convert to 64-bit words. - lpnz @.Lcopy64b + lpnz .Lcopy64b ;; LOOP START ldd.ab r6,[r1,8] std.ab r6,[r3,8] @@ -312,7 +328,7 @@ ENTRY(memcpy) #endif .Lsmallchunk: - lpnz @.Lcopyremainingbytes + lpnz .Lcopyremainingbytes ;; LOOP START ldb.ab r5, [r1,1] stb.ab r5, [r3,1] diff --git a/newlib/libc/machine/arc/strcmp-archs.S b/newlib/libc/machine/arc/strcmp-archs.S index 543cebc..3226c37 100644 --- a/newlib/libc/machine/arc/strcmp-archs.S +++ b/newlib/libc/machine/arc/strcmp-archs.S @@ -40,7 +40,7 @@ ENTRY (strcmp) or r2, r0, r1 bmsk_s r2, r2, 1 - brne r2, 0, @.Lcharloop + brne r2, 0, .Lcharloop ; s1 and s2 are word aligned ld.ab r2, [r0, 4] diff --git a/newlib/libc/machine/arc64/Makefile.inc b/newlib/libc/machine/arc64/Makefile.inc new file mode 100644 index 0000000..6515857 --- /dev/null +++ b/newlib/libc/machine/arc64/Makefile.inc @@ -0,0 +1,13 @@ +libc_a_SOURCES += \ + %D%/memcmp.S \ + %D%/memcmp-stub.c \ + %D%/memcpy.S \ + %D%/memcpy-stub.c \ + %D%/memset.S \ + %D%/memset-stub.c \ + %D%/setjmp.S \ + %D%/strlen.S \ + %D%/strcat.S \ + %D%/memmove.S\ + %D%/strcmp.S \ + %D%/memchr.S diff --git a/newlib/libc/machine/arc64/memchr.S b/newlib/libc/machine/arc64/memchr.S new file mode 100644 index 0000000..3545c37 --- /dev/null +++ b/newlib/libc/machine/arc64/memchr.S @@ -0,0 +1,371 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +; r0 void* ptr +; r1 int ch +; r2 size_t count + +#if defined (__ARC64_ARCH32__) + +ENTRY (memchr) + LSRP.f 0, r2, 4 ; counter for 16-byte chunks + beq.d @.L_start_1_byte_search + + ; Filter for 1 byte + bmsk r1, r1, 7 + lsl8 r9, r1 + + or r9, r9, r1 + vpack2hl r1, r9, r9 + + ; r1 is now setup with the special 4 byte repetition of the target byte + ; We use r1 because we dont have any more registers free inside the main loop + ; r9 can be repurposed + mov r8, NULL_32DT_1 + ror r9, r8 + + xor r3, r3, r3 + +.L_search_16_bytes: + +#if defined (__ARC64_LL64__) + + ldd.ab r4r5, [r0, +8] + ldd.ab r6r7, [r0, +8] + +#else + + ld.ab r4, [r0, +4] + ld.ab r5, [r0, +4] + ld.ab r6, [r0, +4] + ld.ab r7, [r0, +4] + +#endif + + xor r4, r4, r1 + xor r5, r5, r1 + xor r6, r6, r1 + xor r7, r7, r1 + + sub r10, r4, r8 + sub r11, r5, r8 + sub r12, r6, r8 + sub r13, r7, r8 + + bic r10, r10, r4 + bic r11, r11, r5 + bic r12, r12, r6 + bic r13, r13, r7 + + tst r10, r9 + bset.ne r3, r3, 4 + + tst r11, r9 + bset.ne r3, r3, 3 + + tst r12, r9 + bset.ne r3, r3, 2 + + tst r13, r9 + bset.ne r3, r3, 1 + + ; Break if found + brne.d r3, 0, @.L_found_in_16B + + ; Keep going we have more 16 byte chunks + sub r2, r2, 16 + + brge r2, 16, @.L_search_16_bytes + + ; Reset byte repetition of r1 to 1 single byte + bmsk r1, r1, 7 + +.L_start_1_byte_search: + ; Check if r2 is 0 + breq.d r2, 0, @.L_byte_not_found + ldb.ab r10, [r0, +1] + +.L_search_1_byte: + + breq r10, r1, @.L_found_byte + + dbnz.d r2, @.L_search_1_byte + ldb.ab r10, [r0, +1] + +; Byte not found +.L_byte_not_found: + j.d [blink] + MOVP r0, 0 + +.L_found_byte: + j_s.d [blink] + SUBP r0, r0, 1 + +.L_found_in_16B: + + fls r5, r3 ; [2] + +; Select appropriate register to analyze [4] + mov r2, r13 + +; Point r13 to first NULL byte containing double word [3] + sub2 r0, r0, r5 + + + asr.f r3, r3, 3 + mov.c r2, r12 + + asr.f r3, r3, 1 + mov.c r2, r11 + + asr.f r3, r3, 1 + mov.c r2, r10 + + and r2, r2, r9 ; [5] + + ffs r2, r2 ; [6] + + xbfu r2, r2, 0b0111000011 ; [7] + + j.d [blink] + add r0, r0, r2 ; [8] + +ENDFUNC (memchr) + +#else + +ENTRY (memchr) + lsrl.f 0, r2, 5 ; counter for 32-byte chunks + beq.d @.L_start_1_byte_search + + ; Filter for 1 byte + bmsk r1, r1, 7 + lsl8 r9, r1 + + or r9, r9, r1 + + vpack2hl r1, r9, r9 + vpack2wl r1, r1, r1 + + ; r1 is now setup with the special 4 byte repetition of the target byte + ; We use r1 because we dont have any more registers free inside the main loop + ; r9 can be repurposed + vpack2wl r8, NULL_32DT_1, NULL_32DT_1 + asll r9, r8, 7 + + xorl r3, r3, r3 + +.L_search_32_bytes: + +; Using 128-bit memory operations +#if defined (__ARC64_M128__) + + lddl.ab r4r5, [r0, +16] + lddl.ab r6r7, [r0, +16] + +; The 64-bit crunching implementation. +#elif defined (__ARC64_ARCH64__) + + ldl.ab r4, [r0, +8] + ldl.ab r5, [r0, +8] + ldl.ab r6, [r0, +8] + ldl.ab r7, [r0, +8] + +#else + # error Unknown configuration +#endif + + xorl r4, r4, r1 + xorl r5, r5, r1 + xorl r6, r6, r1 + xorl r7, r7, r1 + + subl r10, r4, r8 + subl r11, r5, r8 + subl r12, r6, r8 + subl r13, r7, r8 + + bicl r10, r10, r4 + bicl r11, r11, r5 + bicl r12, r12, r6 + bicl r13, r13, r7 + + tstl r10, r9 + bset.ne r3, r3, 4 + + tstl r11, r9 + bset.ne r3, r3, 3 + + tstl r12, r9 + bset.ne r3, r3, 2 + + tstl r13, r9 + bset.ne r3, r3, 1 + + ; Break if found + brne.d r3, 0, @.L_found_in_32B + + ; Keep going we have more 16 byte chunks + subl r2, r2, 32 + brge r2, 32, @.L_search_32_bytes + + ; Reset byte repetition of r1 to 1 single byte + bmskl r1, r1, 7 + +.L_start_1_byte_search: + ; Check if r2 is 0 + breq.d r2, 0, @.L_byte_not_found + ldb.ab r10, [r0, +1] + +.L_search_1_byte: + + breq r10, r1, @.L_found_byte + + dbnz.d r2, @.L_search_1_byte + ldb.ab r10, [r0, +1] + +; Byte not found +.L_byte_not_found: + j.d [blink] + movl r0, 0 + +.L_found_byte: + j_s.d [blink] + subl r0, r0, 1 + +.L_found_in_32B: + + fls r5, r3 ; [2] + +; Select appropriate register to analyze [4] + movl r2, r13 + +; Point r13 to first NULL byte containing double word [3] + sub3l r0, r0, r5 + + asr.f r3, r3, 3 + movl.c r2, r12 + + asr.f r3, r3, 1 + movl.c r2, r11 + + asr.f r3, r3, 1 + movl.c r2, r10 + + andl r2, r2, r9 ; [5] + + ffsl r2, r2 ; [6] + + xbful r2, r2, 0b0111000011 ; [7] + + j.d [blink] + addl r0, r0, r2 ; [8] + +ENDFUNC (memchr) +#endif + +;; This code uses a common technique for NULL byte detection inside a word. +;; Details on this technique can be found in: +;; (https://graphics.stanford.edu/~seander/bithacks.html#ZeroInWord) +; +; In sum, this technique allows for detecting a NULL byte inside any given +; amount of bits by performing the following operation +; DETECTNULL(X) (((X) - 0x01010101) & ~(X) & 0x80808080) [0] +; +; The code above implements this by setting r8 to a 0x01010101... sequence and +; r9 to a 0x80808080... sequence of appropriate length +; As LIMM are 32 bit only, we need to perform MOVHL and ORL [1] operations to +; have the appropriate 64 bit values in place +; +; As we want a specific byte and not a NULL byte, we create in r1 a constant +; that is made up of the target byte, on each byte position, that we xor with +; the loaded data to force a NULL byte only if the target byte is present. +; After that we can use the technique directly +; +;; Search is done 32 bytes at a time, either with 64 bit loads or 128 bit loads +;; If the target byte is detected, the position of the double word is encoded +;; in r3, which is eventually used to adjust r0 +; +; r3 is set via bset, which means we can simply use a fls to obtain the first +; match (or ffs depending on the values in bset) [2]. +; The reason for starting at 1 and not 0 is so r3 encodes how many double +; words to go back, and it wouldnt make sense to go back 0 (the byte would be +; in the next loop iteration). +; +; The first step to take is point r0 to the appropriate double word. +; As the chosen encoded information is how many double words to go back, +; we can simply multiply r3 by 8 and reduce r0 by that amount [3] +; +; Then, we need to place the loaded double word containing the first target byte +; found, into a "common" register we can operate on later [4]. +; +; To do this without any jumps, we can shift r3 and perform a conditional mov +; based on the carry flag value. +; The order is very important because the byte can appear in several double +; words, so we want to analyze from last to first. +; +; We can ignore the first asr (which would be asr.f 2, as we started r3 on 1) +; because if r13 isnt the target byte, r2 will always be overwritten so we can +; just decide to start at r7, and overwrite it if needed. +; +; Now comes the tricky part. In order to obtain the first target byte, we need +; to understand the NULL byte detection operation. It is explained in depth in +; the link above but in short, it works by first setting the highest bit of each +; byte to 1, if the corresponding byte is either 0 or more than 0x80 +; Then, separately, it makes the highest bit of each byte 1, if the byte is +; less than 0x80. The last step is to AND these two values (this operation is +; simplified with the SUB, BIC and TST instructions). +; +; This means that the evaluated equation result value [5] has zeros for all non +; zero bytes, except for the NULL bytes (which are the target bytes after the +; xor). Therefore, we can simply find the first non zero bit (counting from bit +; 0) which will be inside the position of the first NULL byte. +; +; One thing to note, is that ffs oddly returns 31 if no bit is found, setting +; the zero flag. As r9 is never all 0s at this stage (would mean there is no +; NULL byte and we wouldnt be here) we dont need to worry about that. [6] +; +; We can then convert the bit position into the last byte position by looking +; into bits 3 to 5, and shifting 3 bits to the right. This can be combined into +; a single xbful operation. The bottom 000011 represent shift by 3 and the top +; 0111 represents the mask (3 to 5 shifted by 3 is 0 to 2). We dont need to +; worry about the case where ffs does not find a bit, because we know for sure +; there is at least one NULL byte, and therefore one of the highest bits is set +; to 1 [7] +; +; Finally, we can add the NULL/target byte position inside the loaded double +; word to r0 to obtain the bytes absolute position [8] +; +; +; Some operations are re-ordered such that register dependency is reduced, +; allowing the CPU to run more instructions in parallel +; diff --git a/newlib/libc/machine/arc64/memcmp-stub.c b/newlib/libc/machine/arc64/memcmp-stub.c new file mode 100644 index 0000000..3fa06d5 --- /dev/null +++ b/newlib/libc/machine/arc64/memcmp-stub.c @@ -0,0 +1,35 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#if defined (__ARC64_ARCH32__) +# include "../../string/memcmp.c" +#else +/* See memcpy.S. */ +#endif diff --git a/newlib/libc/machine/arc64/memcmp.S b/newlib/libc/machine/arc64/memcmp.S new file mode 100644 index 0000000..5defd0c --- /dev/null +++ b/newlib/libc/machine/arc64/memcmp.S @@ -0,0 +1,269 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +#if defined (__ARC64_ARCH64__) + +; R0: lhs +; R1: rhs +; R2: count +; ret (R0): +; - lhs < rhs: <0 +; - lhs = rhs: 0 +; - lhs > rhs: >0 +ENTRY (memcmp) + cmpl r2, 64 + bls.d @.L_compare_1_bytes + movl r3, r0 ; "r0" will be used as return value + ; If one is curious why the code below looks like the way it does, + ; there is a documentation at the end of this file. + lsrl r12, r2, 5 ; counter for 32-byte chunks + xor r13, r13, r13 ; the mask showing inequal registers + ldl.ab r4, [r3, +8] + ldl.ab r5, [r1, +8] +.L_compare_32_bytes: + ldl.ab r6, [r3, +8] + ldl.ab r7, [r1, +8] + ldl.ab r8, [r3, +8] + ldl.ab r9, [r1, +8] + ldl.ab r10, [r3, +8] + ldl.ab r11, [r1, +8] + xorl.f 0, r4, r5 + xor.ne r13, r13, 0b0001 + xorl.f 0, r6, r7 + xor.ne r13, r13, 0b0010 + xorl.f 0, r8, r9 + xor.ne r13, r13, 0b0100 + xorl.f 0, r10, r11 + xor.ne r13, r13, 0b1000 + brne r13, 0, @.L_unequal_find + ldl.ab r4, [r3, +8] + dbnz.d r12, @.L_compare_32_bytes + ldl.ab r5, [r1, +8] + ; Adjusting the pointers because of the extra loads in the end + subl r1, r1, 8 + subl r3, r3, 8 + bmsk_s r2, r2, 4 ; any remaining bytes to compare +.L_compare_1_bytes: + cmp r2, 0 + jeq.d [blink] + xor_s r0, r0, r0 + ldb.ab r4, [r3, +1] + ldb.ab r5, [r1, +1] +2: + sub.f r0, r4, r5 + jne.d [blink] + ldb.ab r4, [r3, +1] + dbnz.d r2, @2b + ldb.ab r5, [r1, +1] ; this load may read beyond the "count". + j_s [blink] +; At this point, we want to find the _first_ comparison that marked the +; inequality of "lhs" and "rhs". The rest acts like a multiplexer: +; +; if r4 was not equal to r5 --> r1=r4, r2=r5 +; if r6 was not equal to r7 --> r1=r6, r2=r7 +; if r8 was not equal to r9 --> r1=r8, r2=r9 +; if r10 was not equal to r11 --> r1=r10, r2=r11 +; find_different_byte(r1, r2) +; +; About the "bi [n]" (branch index) instruction: This instruction alters +; next PC (program counter): +; +; next_pc = current_pc + n*4 n*4 is the same as n<<2 +; +; In other words, it tells the processor to execute the n'th instruction +; from where we are (assuming all the next instructions are 4 bytes long). +; +; We used this to our benefit. We made each "case" (unequal_r4r5, +; unequal_r5r6, ...) 16 bytes long (power of 2) and fed "bi" an index +; that is already multiplied by 4 (asl r13, r13, 2). This translates +; into "bi [n]" jumping to 16-bytes slots. The last slot we did not +; make 16 bytes long with "nop" because we don't need to address after +; it. +.L_unequal_find: + ffs r13, r13 + asl r13, r13, 2 + bi [r13] +.L_unequal_r4r5: + movl r1, r4 + b.d @.L_diff_byte_in_regs + movl r2, r5 + nop +.L_unequal_r6r7: + movl r1, r6 + b.d @.L_diff_byte_in_regs + movl r2, r7 + nop +.L_unequal_r8r9: + movl r1, r8 + b.d @.L_diff_byte_in_regs + movl r2, r9 + nop +.L_unequal_r10r11: + movl r1, r10 + movl r2, r11 + ; fall-through +; If we're here, that means the two operands are not equal. +; 1) First we have to get a mask of their inequality through "xor" +; 2) Then, find the first bit position that they're different: "ffs" +; 3) Depending on the bit position, we want the whole byte containing +; that bit, in both operands, to become the very first byte (least +; significant byte), so that we can subtract one from another. +; Below is an illustration of bit positions and how much we should +; shift the numbers right: +; bit position range : (in binary) | shift right by : (in binary) +; -------------------+-------------------+----------------+------------ +; [ 0, 7] : (000000 - 000111) | lsr 0 : 000000 +; [ 8,15] : (001000 - 001111) | lsr 8 : 001000 +; [16,23] : (010000 - 010111) | lsr 16 : 010000 +; [24,31] : (011000 - 011111) | lsr 24 : 011000 +; ... : ... | ... : ... +; [56,63] : (111000 - 111111) | lsr 56 : 111000 +; We need to ignore the least 3 bits of "position" to get "shift right" +; amount: "and 0x38, ..." +; 4) When the bytes are positioned at byte #0, mask out the rest of the +; bytes and subtract the two operands: lhs - rhs +.L_diff_byte_in_regs: + xorl r0, r1, r2 ; (1) + ffsl r0, r0 ; (2) + and r0, r0, 0x38 ; (3) + lsrl r1, r1, r0 ; (3) + lsrl r2, r2, r0 ; (3) + bmsk_s r1, r1, 7 ; (4) + bmsk_s r2, r2, 7 ; (4) + j_s.d [blink] + subl r0, r1, r2 ; (4) +ENDFUNC (memcmp) + +; __ARC64_ARCH64__ +#endif + +; The loop at the heart of the "memcmp" function follows some specific +; logic and has gone through a few optimisation filters. Knowing them +; will help understand the code better. +; +; The comparison logic +; -------------------- +; In each loop, we compare 32 bytes of data from "lhs" and "rhs". Those +; comparisons takes place by using 8 sets of registers: +; +; r4 == r5 xor.f 0, r4, r5 lhs[i+0] == rhs[i+0] +; r6 == r7 xor.f 0, r6, r7 lhs[i+8] == rhs[i+8] +; r8 == r9 xor.f 0, r8, r9 lhs[i+16] == rhs[i+16] +; r10 == r11 xor.f 0, r10, r11 lhs[i+24] == rhs[i+32] +; +; The idea is to set a corresponding bit in r13 register for each +; comparison that fails. The relation between the bits and the +; comparisons are: +; +; r13[0..63] = 0 +; r13[0] = 1 if r4 != r5 +; r13[1] = 1 if r6 != r7 +; r13[2] = 1 if r8 != r9 +; r13[3] = 1 if r10 != r11 +; +; If r13 remains 0, the next possible iteration of the loop begins. +; If it is not 0 anymore, the algorithm will be interested in the +; lowest bit that is set to 1. That is achieved by the "ffs" +; (find first set) instruction. +; +; The loop transformation +; ----------------------- +; 1) At first, the loop looks like below: +; +; .loop +; ldl.ab r4, [r3, +8] +; ldl.ab r5, [r1, +8] +; ... +; ldl.ab r10, [r3, +8] +; ldl.ab r11, [r1, +8] +; xorl.f 0, r4, r5 +; xor.ne r13, r13, 0b0001 +; ... +; xorl.f 0, r10, r11 +; xor.ne r13, r13, 0b1000 +; brne r13, 0, @.unequal_find +; dbnz r12, @.loop +; +; 2) "dbnz" instruction has a delay slot. To make the code more +; efficient, we can bring the first 2 instructions of the loop +; to the end (they will be executed just before the next iteration +; begins). To make the logic of the program sound, those 2 +; instructions need to be duplicated before the loop start as well: +; +; ldl.ab r4, [r3, +8] +; ldl.ab r5, [r1, +8] +; .loop +; ldl.ab r6, [r3, +8] +; ldl.ab r7, [r1, +8] +; ... +; ldl.ab r10, [r3, +8] +; ldl.ab r11, [r1, +8] +; xorl.f 0, r4, r5 +; xor.ne r13, r13, 0b0001 +; ... +; xorl.f 0, r10, r11 +; xor.ne r13, r13, 0b1000 +; brne r13, 0, @.unequal_find +; ldl.ab r4, [r3, +8] +; dbnz.d r12, @.loop +; ldl.ab r5, [r1, +8] +; +; There is one more loose end to take care of: At the last iteration +; of the loop, there is an extra load into r4 and r5 registers while +; incrementing the pointers (r3 and r1). We have to correct for that +; after the loop: +; +; .loop: +; .. +; brne r13, 0, @.unequal_find +; ldl.ab r4, [r3, +8] +; dbnz.d r12, @.loop +; ldl.ab r5, [r1, +8] +; subl r1, r1, 8 +; subl r3, r3, 8 +; +; One last remark about NOT filling the delay slot of "brne" with +; "ldl.ab r4, ...". If the branch is taken, the rest of code that +; is responsible for finding the differentiating bytes relies that +; all 8 registers hold the comparison data of the loop. Putting +; "ldl.ab r4, ..." into the delay slot of "brne ..." would clobber +; the "r4" register: +; +; .loop: +; .. +; brne.d r13, 0, @.unequal_find --> this branch might be taken +; ldl.ab r4, [r3, +8] --> clobbers r4 +; dbnz.d r12, @.loop +; ldl.ab r5, [r1, +8] +; +; Having "ldl.ab r4, ..." between "brne" and "dbnz" as two control flow +; altering instructions is good enough. diff --git a/newlib/libc/machine/arc64/memcpy-stub.c b/newlib/libc/machine/arc64/memcpy-stub.c new file mode 100644 index 0000000..06d7305 --- /dev/null +++ b/newlib/libc/machine/arc64/memcpy-stub.c @@ -0,0 +1,35 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#if !defined (__ARC64_ARCH32__) && !defined (__ARC64_ARCH64__) +# include "../../string/memcpy.c" +#else +/* See memcpy.S. */ +#endif diff --git a/newlib/libc/machine/arc64/memcpy.S b/newlib/libc/machine/arc64/memcpy.S new file mode 100644 index 0000000..77cf307 --- /dev/null +++ b/newlib/libc/machine/arc64/memcpy.S @@ -0,0 +1,236 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +; This file contains variants of the same function with different +; instructions. The generic one, the implementation that comes the +; last after the #else macro, is the most commented. + +; Using 128-bit memory operations +#if defined (__ARC64_M128__) + +ENTRY (memcpy) + lsrl.f r12, r2, 6 ; Check size < 64bytes + beq.d @.L_write_1_bytes + movl r3, r0 +.L_write_64_bytes: + lddl.ab r4r5, [r1, +16] + lddl.ab r6r7, [r1, +16] + lddl.ab r8r9, [r1, +16] + lddl.ab r10r11, [r1, +16] + stdl.ab r4r5, [r3, +16] + stdl.ab r6r7, [r3, +16] + stdl.ab r8r9, [r3, +16] + dbnz.d r12, @.L_write_64_bytes + stdl.ab r10r11, [r3, +16] +.L_write_1_bytes: + ;; Handle anything between 15bytes < size < 64bytes + ;; The algorithm has two phases: + ;; - copy 16, 32, or 48 bytes of data using 128bit ops + ;; - copy the remaining 15 bytes of data using a single stdl/lddl pair + bmsk.f r2, r2, 5 ; Check size == 0 + jeq.d [blink] + lsr.f r12, r2, 4 ; Check size < 16bytes + beq.d @1f + xor r12, r12, 3 + ;; R12 can be 3,2, or 1, which are indicating how much data we should + ;; copy: 3 -> 48bytes, 2 -> 32bytes, 1 -> 16bytes. + ;; Zero case shouldn't happen as we check for it above. + ;; Then I use the BI instructions to implement the following code + ;; switch ($R12) + ;; case 3: + ;; lddl RA, ... + ;; stdl RA, ... + ;; case 2: + ;; lddl RA, ... + ;; stdl RA, ... + ;; case 1: + ;; lddl RA, ... + ;; stdl RA, ... + ;; case 0: + ;; break + ;; N.B the BI instruction works the other way than I expected, namely + ;; BI's entry 0 is the closest to instruction, hence I need to bit + ;; invert R12 to get the desired behaviour (done by above XOR). + asl r12,r12,1 + bi [r12] + lddl.ab r4r5, [r1, +16] + stdl.ab r4r5, [r3, +16] + lddl.ab r6r7, [r1, +16] + stdl.ab r6r7, [r3, +16] + lddl.ab r8r9, [r1, +16] + stdl.ab r8r9, [r3, +16] + bmsk.f r2, r2, 3 ; Check size == 0 + jeq.d [blink] + subl r2, r2, 16 + ;; We are still having 15 bytes top to transfer, exactly like in the + ;; case of below byte-by-byte transfer. However, we already transfered + ;; at least 16bytes before, thus, we can create a new 16byte load which + ;; re-reads parts of the already transfer data AND the remaining up to + ;; 15 bytes of data still to be transfered. + ;; The position of the window is controlled by the $r12 which is the + ;; complement of the number of remaining bytes. + addl r3, r3, r2 + lddl r4r5, [r1, r2] + j_s.d [blink] + stdl r4r5, [r3] +1: + ;; Anything size < 16 we go byte by byte. + ldb.ab r4, [r1, +1] + dbnz.d r2, @1b + stb.ab r4, [r3, +1] + j_s [blink] +ENDFUNC (memcpy) + +; The 64-bit crunching implementation. +#elif defined (__ARC64_ARCH64__) \ + || (defined (__ARC64_ARCH32__) && defined (__ARC64_LL64__)) + +; R0: dest +; R1: source +; R2: count +; ret (R0): dest +; clobber: r1, r3, r4r5, r6r7, r8r9, r10r11, r12 +ENTRY (memcpy) + LSRP.f r12, r2, 5 ; counter for 32-byte chunks + beq.d @.L_write_31_bytes + MOVP r3, r0 ; do not clobber the "dest" +.L_write_32_bytes: ; Take care of 32 byte chunks + LD64.ab r4, [r1, +8] + LD64.ab r6, [r1, +8] + LD64.ab r8, [r1, +8] + LD64.ab r10,[r1, +8] + ST64.ab r4, [r3, +8] + ST64.ab r6, [r3, +8] + ST64.ab r8, [r3, +8] + dbnz.d r12, @.L_write_32_bytes + ST64.ab r10, [r3, +8] ; Shove store in delay slot + bmsk_s r2, r2, 4 ; From now on, we only care for the remainder % 32 + + +; The remainder bits indicating how many more bytes to copy +; .------------------------. +; | b4 | b3 | b2 | b1 | b0 | +; `------------------------' +; 16 8 4 2 1 +.L_write_31_bytes: + bbit0.d r2, 2, @1f ; is b2 set? then copy 4 bytes + lsr r12, r2, 3 ; see the notes below + ld.ab r4, [r1, 4] + st.ab r4, [r3, 4] +1: + bbit0.d r2, 1, @1f ; is b1 set? then copy 2 bytes + xor r12, r12, 3 + ldh.ab r4, [r1, 2] + sth.ab r4, [r3, 2] +1: + bbit0.d r2, 0, @1f ; is b0 set? then copy 1 byte + asl r12, r12, 1 + ldb.ab r4, [r1, 1] + stb.ab r4, [r3, 1] + +; Interpreting bits (b4,b3) [1] and how they correlate to branch index: +; +; (b4,b3) | bytes to copy | branch index +; --------+---------------+------------- +; 00b | 0 | 3 (11b) +; 01b | 8 | 2 (10b) +; 10b | 16 | 1 (01b) +; 11b | 24 | 0 (00b) +; +; To go from (b4,b3) to branch index, the bits must be flipped. +; In other words, they must be XORed with 11b [2]. +; +; Last but not least, "bi" jumps at boundaries of 4. We need to double +; the index to jump 8 bytes [3]. +; +; Hence, the 3 operations for calculating the branch index that are spread +; in "bbit0" delay slots: +; +; lsr r12, r2, 3 [1] +; xor r12, r12, 3 [2] +; asl r12, r12, 1 [3] +1: + bi [r12] + LD64.ab r4, [r1, 8] + ST64.ab r4, [r3, 8] + LD64.ab r4, [r1, 8] + ST64.ab r4, [r3, 8] + LD64.ab r4, [r1, 8] + ST64.ab r4, [r3, 8] + + j_s [blink] +ENDFUNC (memcpy) + +#elif defined (__ARC64_ARCH32__) + +ENTRY (memcpy) + lsr.f r11, r2, 4 ; counter for 16-byte chunks + beq.d @.L_write_15_bytes + mov r3, r0 ; work on a copy of "r0" +.L_write_16_bytes: + ld.ab r4, [r1, 4] + ld.ab r5, [r1, 4] + ld.ab r6, [r1, 4] + ld.ab r7, [r1, 4] + st.ab r4, [r3, 4] + st.ab r5, [r3, 4] + st.ab r6, [r3, 4] + dbnz.d r11, @.L_write_16_bytes + st.ab r7, [r3, 4] + bmsk_s r2, r2, 3 + +.L_write_15_bytes: + bbit0.d r2, 1, @1f + lsr r11, r2, 2 + ldh.ab r4, [r1, 2] + sth.ab r4, [r3, 2] +1: + bbit0.d r2, 0, @1f + xor r11, r11, 3 + ldb.ab r4, [r1, 1] + stb.ab r4, [r3, 1] +1: + asl r11, r11, 1 + bi [r11] + ld.ab r4,[r1, 4] + st.ab r4,[r3, 4] + ld.ab r4,[r1, 4] + st.ab r4,[r3, 4] + ld r4,[r1] + st r4,[r3] + + j_s [blink] +ENDFUNC (memcpy) + +#else +# error Unknown configuration +#endif diff --git a/newlib/libc/machine/arc64/memmove.S b/newlib/libc/machine/arc64/memmove.S new file mode 100644 index 0000000..5458dd0 --- /dev/null +++ b/newlib/libc/machine/arc64/memmove.S @@ -0,0 +1,312 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +; r0 void* dest +; r1 const void* src +; r2 size_t count + +; The 64-bit crunching implementation. + +#if defined (__ARC64_ARCH32__) && !defined(__ARC64_LL64__) + +ENTRY (memmove) + +; If the destination is greater than the source + cmp r0, r1 + ADDP r4, r1, r2 +; or if the source plus count is smaller than the destination + cmp.eq r4, r0 + +; We can safely perform a normal memcpy. Otherwise, we need to perform it +; backwards + blo.d @.L_normal_memcpy + lsr.f r11, r2, 4 ; counter for 16-byte chunks + + ADDP r3, r0, r2 + +; Backwards search +; The only thing that changes between memcpy and memmove is copy direction +; in case the dest and src address memory locations overlap +; More detailed information is in the forwards copy and at the end of +; this document + + ADDP r1, r1, r2 + bmsk_s r2, r2, 3 + + bbit0.d r2, 1, @1f + lsr r5, r2, 2 + ldh.aw r4, [r1, -2] + sth.aw r4, [r3, -2] +1: + bbit0.d r2, 0, @1f + xor r5, r5, 3 + ldb.aw r4, [r1, -1] + stb.aw r4, [r3, -1] +1: + asl r5, r5, 1 + bi [r5] + ld.aw r4,[r1, -4] + st.aw r4,[r3, -4] + ld.aw r4,[r1, -4] + st.aw r4,[r3, -4] + ld.aw r4,[r1, -4] + st.aw r4,[r3, -4] + +; Return if there are no 16 byte chunks + jeq [blink] + +.L_write_backwards_16_bytes: + ld.aw r4, [r1, -4] + ld.aw r5, [r1, -4] + ld.aw r6, [r1, -4] + ld.aw r7, [r1, -4] + st.aw r4, [r3, -4] + st.aw r5, [r3, -4] + st.aw r6, [r3, -4] + dbnz.d r11, @.L_write_backwards_16_bytes + st.aw r7, [r3, -4] + + j_s [blink] + +.L_normal_memcpy: + beq.d @.L_write_forwards_15_bytes + mov r3, r0 ; work on a copy of "r0" + +.L_write_forwards_16_bytes: + ld.ab r4, [r1, 4] + ld.ab r5, [r1, 4] + ld.ab r6, [r1, 4] + ld.ab r7, [r1, 4] + st.ab r4, [r3, 4] + st.ab r5, [r3, 4] + st.ab r6, [r3, 4] + dbnz.d r11, @.L_write_forwards_16_bytes + st.ab r7, [r3, 4] + bmsk_s r2, r2, 3 + +.L_write_forwards_15_bytes: + bbit0.d r2, 1, @1f + lsr r11, r2, 2 + ldh.ab r4, [r1, 2] + sth.ab r4, [r3, 2] +1: + bbit0.d r2, 0, @1f + xor r11, r11, 3 + ldb.ab r4, [r1, 1] + stb.ab r4, [r3, 1] +1: + asl r11, r11, 1 + bi [r11] + ld.ab r4,[r1, 4] + st.ab r4,[r3, 4] + ld.ab r4,[r1, 4] + st.ab r4,[r3, 4] + ld r4,[r1] + st r4,[r3] + + j_s [blink] + +ENDFUNC (memmove) + +#else + +ENTRY (memmove) +; If the destination is greater than the source + cmp r0, r1 + ADDP r4, r1, r2 +; or if the source plus count is smaller than the destination + cmp.eq r4, r0 + +; We can safely perform a normal memcpy. Otherwise, we need to perform it +; backwards + blo.d @.L_normal_memcpy + LSRP.f r12, r2, 5 ; counter for 32-byte chunks + + ADDP r3, r0, r2 + +; Backwards search +; The only thing that changes between memcpy and memmove is copy direction +; in case the dest and src address memory locations overlap +; More detailed information is in the forwards copy and at the end of +; this document + +; Set both r0 and r1 to point to the end of each memory location + ADDP r1, r1, r2 + bmsk_s r2, r2, 4 + + bbit0.d r2, 0, @1f + lsr r11, r2, 3 + ldb.aw r4, [r1, -1] + stb.aw r4, [r3, -1] +1: + bbit0.d r2, 1, @1f + xor r11, r11, 3 + ldh.aw r4, [r1, -2] + sth.aw r4, [r3, -2] +1: + bbit0.d r2, 2, @1f + asl r11, r11, 1 + ld.aw r4, [r1, -4] + st.aw r4, [r3, -4] +1: + bi [r11] + LD64.aw r4, [r1, -8] + ST64.aw r4, [r3, -8] + LD64.aw r4, [r1, -8] + ST64.aw r4, [r3, -8] + LD64.aw r4, [r1, -8] + ST64.aw r4, [r3, -8] + +; Jump if there are no 32 byte chunks + jeq [blink] + +.L_write_backwards_32_bytes: ; Take care of 32 byte chunks +#if defined (__ARC64_M128__) + + lddl.aw r4r5, [r1, -16] + lddl.aw r6r7, [r1, -16] + + stdl.aw r4r5, [r3, -16] + stdl.aw r6r7, [r3, -16] + dbnz r12, @.L_write_backwards_32_bytes + +#elif defined (__ARC64_ARCH64__) || ( defined (__ARC64_ARCH32__) && defined (__ARC64_LL64__) ) + + LD64.aw r4, [r1, -8] + LD64.aw r6, [r1, -8] + LD64.aw r8, [r1, -8] + LD64.aw r10,[r1, -8] + + ST64.aw r4, [r3, -8] + ST64.aw r6, [r3, -8] + ST64.aw r8, [r3, -8] + dbnz.d r12, @.L_write_backwards_32_bytes + ST64.aw r10, [r3, -8] + +#else +# error Unknown configuration +#endif + + j_s [blink] + +; Normal memcpy +.L_normal_memcpy: + ;LSRP.f r12, r2, 5 ; Moved up + + beq.d @.L_write_forwards_31_bytes + MOVP r3, r0 ; do not clobber the "dest" + +.L_write_forwards_32_bytes: ; Take care of 32 byte chunks +#if defined (__ARC64_M128__) + + lddl.ab r4r5, [r1, +16] + lddl.ab r6r7, [r1, +16] + + stdl.ab r4r5, [r3, +16] + stdl.ab r6r7, [r3, +16] + dbnz r12, @.L_write_forwards_32_bytes + +#elif defined (__ARC64_ARCH64__) || ( defined (__ARC64_ARCH32__) && defined (__ARC64_LL64__) ) + + LD64.ab r4, [r1, +8] + LD64.ab r6, [r1, +8] + LD64.ab r8, [r1, +8] + LD64.ab r10,[r1, +8] + ST64.ab r4, [r3, +8] + ST64.ab r6, [r3, +8] + ST64.ab r8, [r3, +8] + dbnz.d r12, @.L_write_forwards_32_bytes + ST64.ab r10, [r3, +8] ; Shove store in delay slot + +#else +# error Unknown configuration +#endif + + bmsk_s r2, r2, 4 ; From now on, we only care for the remainder % 32 + + +; The remainder bits indicating how many more bytes to copy +; .------------------------. +; | b4 | b3 | b2 | b1 | b0 | +; `------------------------' +; 16 8 4 2 1 +.L_write_forwards_31_bytes: + bbit0.d r2, 2, @1f ; is b2 set? then copy 4 bytes + lsr r12, r2, 3 ; see the notes below + ld.ab r4, [r1, 4] + st.ab r4, [r3, 4] +1: + bbit0.d r2, 1, @1f ; is b1 set? then copy 2 bytes + xor r12, r12, 3 + ldh.ab r4, [r1, 2] + sth.ab r4, [r3, 2] +1: + bbit0.d r2, 0, @1f ; is b0 set? then copy 1 byte + asl r12, r12, 1 + ldb.ab r4, [r1, 1] + stb.ab r4, [r3, 1] + +; Interpreting bits (b4,b3) [1] and how they correlate to branch index: +; +; (b4,b3) | bytes to copy | branch index +; --------+---------------+------------- +; 00b | 0 | 3 (11b) +; 01b | 8 | 2 (10b) +; 10b | 16 | 1 (01b) +; 11b | 24 | 0 (00b) +; +; To go from (b4,b3) to branch index, the bits must be flipped. +; In other words, they must be XORed with 11b [2]. +; +; Last but not least, "bi" jumps at boundaries of 4. We need to double +; the index to jump 8 bytes [3]. +; +; Hence, the 3 operations for calculating the branch index that are spread +; in "bbit0" delay slots: +; +; lsr r12, r2, 3 [1] +; xor r12, r12, 3 [2] +; asl r12, r12, 1 [3] +1: + bi [r12] + LD64.ab r4, [r1, 8] + ST64.ab r4, [r3, 8] + LD64.ab r4, [r1, 8] + ST64.ab r4, [r3, 8] + LD64.ab r4, [r1, 8] + ST64.ab r4, [r3, 8] + + j_s [blink] + +ENDFUNC (memmove) + +#endif diff --git a/newlib/libc/machine/arc64/memset-stub.c b/newlib/libc/machine/arc64/memset-stub.c new file mode 100644 index 0000000..e7f81ee --- /dev/null +++ b/newlib/libc/machine/arc64/memset-stub.c @@ -0,0 +1,35 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#if !defined (__ARC64_ARCH32__) && !defined (__ARC64_ARCH64__) +# include "../../string/memset.c" +#else +/* See memcpy.S. */ +#endif diff --git a/newlib/libc/machine/arc64/memset.S b/newlib/libc/machine/arc64/memset.S new file mode 100644 index 0000000..88c8e09 --- /dev/null +++ b/newlib/libc/machine/arc64/memset.S @@ -0,0 +1,184 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +; This file contains variants of the same function with different +; instructions. The generic one, the implementation that comes the +; last after the #else macro, is the most commented. + +; Using 128-bit memory operations +#if defined (__ARC64_M128__) + +ENTRY (memset) + ;; Assemble 128b token + bmsk_s r1, r1, 7 + lsl8 r3, r1 + or_s r1, r1, r3 + lsl16 r3, r1 + or r6, r1, r3 + addhl r6, r6, r6 + movl r7, r6 + + lsrl.f r5, r2, 6 + beq.d @.L_write_63_bytes + movl r4, r0 +.L_write_64_bytes: + stdl.ab r6r7, [r4, +16] + stdl.ab r6r7, [r4, +16] + stdl.ab r6r7, [r4, +16] + dbnz.d r5, @.L_write_64_bytes + stdl.ab r6r7, [r4, +16] + bmsk_s r2, r2, 5 + +.L_write_63_bytes: + bbit0.d r2, 3, @1f + lsr r3, r2, 4 + stl.ab r6, [r4, 8] +1: + bbit0.d r2, 2, @1f + xor r3, r3, 3 + st.ab r6, [r4, 4] +1: + bbit0 r2, 1, @1f + sth.ab r6, [r4, 2] +1: + bbit0 r2, 0, @1f + stb.ab r6, [r4, 1] +1: + bi [r3] + stdl.ab r6r7,[r4, 16] + stdl.ab r6r7,[r4, 16] + stdl.ab r6r7,[r4, 16] + + j_s [blink] + +.L_write_1_bytes: + breq r2, 0, @.L_return + dbnz.d r2, @. + stb.ab r1, [r4, +1] +.L_return: + j_s [blink] +ENDFUNC (memset) + +; The generic 64-bit implementation without any frills. +#elif defined (__ARC64_ARCH64__) || defined (__ARC64_LL64__) + +#if defined (__ARC64_ARCH32__) +# define MOVH mov r7,r6 +#elif defined (__ARC64_ARCH64__) +# define MOVH addhl r6,r6,r6 +#else +# error Please use either 32-bit or 64-bit version of arc64 compiler +#endif + +; R0: dest +; R1: ch +; R2: count +; ret (R0): dest +ENTRY (memset) + ;; Assemble the bytes to 64bit words + bmsk_s r1, r1, 7 ; treat it like unsigned char + lsl8 r3, r1 + or_s r1, r1, r3 + lsl16 r3, r1 + or r6, r1, r3 + MOVH + + LSRP.f r5, r2, 5 ; counter for 32-byte chunks + beq.d @.L_write_31_bytes + MOVP r4, r0 ; work on a copy of "r0" +.L_write_32_bytes: + ST64.ab r6, [r4, +8] + ST64.ab r6, [r4, +8] + ST64.ab r6, [r4, +8] + dbnz.d r5, @.L_write_32_bytes + ST64.ab r6, [r4, +8] + bmsk_s r2, r2, 4 + +.L_write_31_bytes: + bbit0.d r2, 2, @1f + lsr r3, r2, 3 + st.ab r6, [r4, 4] +1: + bbit0.d r2, 1, @1f + xor r3, r3, 3 + sth.ab r6, [r4, 2] +1: + bbit0 r2, 0, @1f + stb.ab r6, [r4, 1] +1: + bi [r3] + ST64.ab r6,[r4, 8] + ST64.ab r6,[r4, 8] + ST64.ab r6,[r4, 8] + + j_s [blink] +ENDFUNC (memset) + +#elif defined (__ARC64_ARCH32__) +ENTRY (memset) + ;; Assemble the bytes to 32bit words + bmsk_s r1, r1, 7 ; treat it like unsigned char + lsl8 r3, r1 + or_s r1, r1, r3 + lsl16 r3, r1 + or r6, r1, r3 + + lsr.f r5, r2, 4 ; counter for 16-byte chunks + beq.d @.L_write_15_bytes + mov r4, r0 ; work on a copy of "r0" +.L_write_16_bytes: + st.ab r6, [r4, 4] + st.ab r6, [r4, 4] + st.ab r6, [r4, 4] + dbnz.d r5, @.L_write_16_bytes + st.ab r6, [r4, 4] + bmsk_s r2, r2, 3 + +.L_write_15_bytes: + bbit0.d r2, 1, @1f + lsr r3, r2, 2 + sth.ab r6, [r4, 2] +1: + bbit0.d r2, 0, @1f + xor r3, r3, 3 + stb.ab r6, [r4, 1] +1: + bi [r3] + st.ab r6,[r4, 4] + st.ab r6,[r4, 4] + st.ab r6,[r4, 4] + + j_s [blink] +ENDFUNC (memset) +#else +# error Unknown configuration +#endif diff --git a/newlib/libc/machine/arc64/setjmp.S b/newlib/libc/machine/arc64/setjmp.S new file mode 100644 index 0000000..a4c9cf1 --- /dev/null +++ b/newlib/libc/machine/arc64/setjmp.S @@ -0,0 +1,106 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +/* ABI interface file + these are the stack mappings for the registers + as stored in the ABI for ARC */ + +ABIr14 = 0 +ABIr15 = ABIr14 + REG_SZ +ABIr16 = ABIr15 + REG_SZ +ABIr17 = ABIr16 + REG_SZ +ABIr18 = ABIr17 + REG_SZ +ABIr19 = ABIr18 + REG_SZ +ABIr20 = ABIr19 + REG_SZ +ABIr21 = ABIr20 + REG_SZ +ABIr22 = ABIr21 + REG_SZ +ABIr23 = ABIr22 + REG_SZ +ABIr24 = ABIr23 + REG_SZ +ABIr25 = ABIr24 + REG_SZ +ABIr26 = ABIr25 + REG_SZ +ABIr27 = ABIr26 + REG_SZ +ABIr28 = ABIr27 + REG_SZ +ABIr29 = ABIr28 + REG_SZ +ABIr30 = ABIr29 + REG_SZ +ABIr31 = ABIr30 + REG_SZ + + +ENTRY (setjmp) + REG_ST r14, [r0, ABIr14] + REG_ST r15, [r0, ABIr15] + REG_ST r16, [r0, ABIr16] + REG_ST r17, [r0, ABIr17] + REG_ST r18, [r0, ABIr18] + REG_ST r19, [r0, ABIr19] + REG_ST r20, [r0, ABIr20] + REG_ST r21, [r0, ABIr21] + REG_ST r22, [r0, ABIr22] + REG_ST r23, [r0, ABIr23] + REG_ST r24, [r0, ABIr24] + REG_ST r25, [r0, ABIr25] + REG_ST r26, [r0, ABIr26] + REG_ST r27, [r0, ABIr27] + REG_ST r28, [r0, ABIr28] + REG_ST r29, [r0, ABIr29] + REG_ST r30, [r0, ABIr30] + REG_ST blink, [r0, ABIr31] + + j.d [blink] + mov r0,0 + .size setjmp,.-setjmp + +ENTRY (longjmp) + ; load registers + REG_LD r14, [r0, ABIr14] + REG_LD r15, [r0, ABIr15] + REG_LD r16, [r0, ABIr16] + REG_LD r17, [r0, ABIr17] + REG_LD r18, [r0, ABIr18] + REG_LD r19, [r0, ABIr19] + REG_LD r20, [r0, ABIr20] + REG_LD r21, [r0, ABIr21] + REG_LD r22, [r0, ABIr22] + REG_LD r23, [r0, ABIr23] + REG_LD r24, [r0, ABIr24] + REG_LD r25, [r0, ABIr25] + REG_LD r26, [r0, ABIr26] + REG_LD r27, [r0, ABIr27] + REG_LD r28, [r0, ABIr28] + REG_LD r29, [r0, ABIr29] + REG_LD r30, [r0, ABIr30] + REG_LD blink, [r0, ABIr31] + + mov.f r1, r1 ; to avoid return 0 from longjmp + mov.z r1, 1 + j.d [blink] + mov r0,r1 + .size longjmp,.-longjmp diff --git a/newlib/libc/machine/arc64/strcat.S b/newlib/libc/machine/arc64/strcat.S new file mode 100644 index 0000000..48e6ce1 --- /dev/null +++ b/newlib/libc/machine/arc64/strcat.S @@ -0,0 +1,592 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + + +; r0 char* dest +; r1 const char* src + +; dest and src MUST NOT intercept + +; Brief: +; Perform the same operation as strlen for finding the end of r0 string +; If r0 and r1 have +; If 4 byte aligned +; Do 4 byte search until there are no more 4 byte chunks +; Then, do 1 byte search +; Otherwise, 1 byte search until alignment +; Then, do 4 byte search as previously specified +; +;; More in depth description at the end +; +; R0 char* dest (destination string) +; R1 const char* src (source string) +; ret (R0): +; - char* (destiantion string) +; + +#if defined (__ARC64_ARCH32__) + +ENTRY (strcat) +; Find end of r0 string +; ========================== STRLEN CODE START ========================== + +; Preserve r0 for size calculation when returning + mov r13, r0 + xor r6, r6, r6 + +; Setup byte detector (more information below) [1] + mov r8, NULL_32DT_1 + asl r9, r8, 7 + +.L_4_4B_search: + +#if defined (__ARC64_LL64__) + + ldd.ab r2r3, [r13, +8] + ldd.ab r4r5, [r13, +8] + +#else + + ld.ab r2, [r13, +4] + ld.ab r3, [r13, +4] + ld.ab r4, [r13, +4] + ld.ab r5, [r13, +4] + +#endif + +; NULL byte position is detected and encoded in r6 [0] [9] + sub r10, r2, r8 + sub r11, r3, r8 + sub r12, r4, r8 + sub r7, r5, r8 + + bic r10, r10, r2 + bic r11, r11, r3 + bic r12, r12, r4 + bic r7, r7, r5 + + tst r10, r9 + bset.ne r6, r6, 4 + + tst r11, r9 + bset.ne r6, r6, 3 + + tst r12, r9 + bset.ne r6, r6, 2 + + tst r7, r9 + bset.ne r6, r6, 1 + + breq.d r6, 0, @.L_4_4B_search + + fls r5, r6 ; [2] + +; Point r13 to first NULL byte containing double word [3] + sub2 r13, r13, r5 + + ; Select appropriate register to analyze [4] + mov r2, r7 + + asr.f r6, r6, 3 + mov.c r2, r12 + + asr.f r6, r6, 1 + mov.c r2, r11 + + asr.f r6, r6, 1 + mov.c r2, r10 + +; Point r13 to first NULL byte in selected double word + and r2, r2, r9 ; [5] + + ffs r2, r2 ; [6] + + xbfu r2, r2, 0b0111000011 ; [7] + + add r13, r13, r2 ; [8] + + +; ========================== STRLEN CODE END >|< ========================== + + xor r6, r6, r6 + +.L_4_4B_search_src: + +#if defined (__ARC64_LL64__) + + ldd.ab r2r3, [r1, +8] + ldd.ab r4r5, [r1, +8] + +#else + + ld.ab r2, [r1, +4] + ld.ab r3, [r1, +4] + ld.ab r4, [r1, +4] + ld.ab r5, [r1, +4] + +#endif + +; NULL byte position is detected and encoded in r6 [0] [9] + sub r10, r2, r8 + sub r11, r3, r8 + sub r12, r4, r8 + sub r7, r5, r8 + + bic r10, r10, r2 + bic r11, r11, r3 + bic r12, r12, r4 + bic r7, r7, r5 + + tst r10, r9 + bset.ne r6, r6, 4 + + tst r11, r9 + bset.ne r6, r6, 3 + + tst r12, r9 + bset.ne r6, r6, 2 + + tst r7, r9 + bset.ne r6, r6, 1 + + brne r6, 0, @.L_found_in_32B + +#if defined (__ARC64_LL64__) + + std.ab r2r3, [r13, +8] + std.ab r4r5, [r13, +8] + +#else + + st.ab r2, [r13, +4] + st.ab r3, [r13, +4] + st.ab r4, [r13, +4] + st.ab r5, [r13, +4] + +#endif + + b @.L_4_4B_search_src + +.L_found_in_32B: + + fls r6, r6 ; [2] + +; Point r1 to first NULL byte containing double word [3] + sub2 r1, r1, r6 + +;; Store the already loaded data + + ; 4 -> 1 to 3 -> 0 + ;subl r6, r6, 1 + +; Invert so the biggest branch is at the end, and we dont need to increase +; block size + ; 3 -> 0 to 0 -> 3 + ;subl r6, 3, r6 + + ; Condense the two subs here + rsub r6, r6, 4 + + asl r6, r6, 2 + +; Store double words + bi [r6] + + b.d @.L_store_lastL32bits + mov r11, r2 + nop + nop + + st.ab r2, [r13, +4] + b.d @.L_store_lastL32bits + mov r11, r3 + nop + + st.ab r2, [r13, +4] + st.ab r3, [r13, +4] + b.d @.L_store_lastL32bits + mov r11, r4 + + st.ab r2, [r13, +4] + st.ab r3, [r13, +4] + st.ab r4, [r13, +4] + mov r11, r5 + +; r11 now contains the data to write +.L_store_lastL32bits: + sub r10, r11, r8 + bic r10, r10, r11 + and r10, r10, r9 ; [5] + + ffs r2, r10 ; [6] + add r2, r2, 1 + + xbfu r2, r2, 0b0111000011 ; [7] + + mov r3, -1; Bitmask setup + + ; If the NULL byte is in byte 3 (starting from the right) + ; we want to store 8-3 bytes + rsub r2, r2, 8 + asl r2, r2, 3 + + ; According to the target byte, setup masks + lsr r3, r3, r2 + not r4, r3 + + ; Obtain relevant data from destination + ld r10, [r13] + + ; Get which data from dest is not to be overwritten and OR it + ; with the relevant data to write + and r3, r3, r11 + and r4, r4, r10 + + or r3, r3, r4 + + j_s.d [blink] + st.ab r3, [r13, +4] + + + +ENDFUNC (strcat) + +#else + +ENTRY (strcat) +; Find end of r0 string +; ========================== STRLEN CODE START ========================== + +; Preserve r0 for size calculation when returning + movl r13, r0 + xorl r6, r6, r6 + +; Setup byte detector (more information below) [1] + vpack2wl r8, NULL_32DT_1, NULL_32DT_1 + asll r9, r8, 7 + +.L_4_8B_search: + +; Using 128-bit memory operations +#if defined (__ARC64_M128__) + + lddl.ab r2r3, [r13, +16] + lddl.ab r4r5, [r13, +16] + +; The 64-bit crunching implementation. +#elif defined (__ARC64_ARCH64__) + + ldl.ab r2, [r13, +8] + ldl.ab r3, [r13, +8] + ldl.ab r4, [r13, +8] + ldl.ab r5, [r13, +8] + +#else +# error Unknown configuration +#endif + +; NULL byte position is detected and encoded in r6 [0] [9] + subl r10, r2, r8 + subl r11, r3, r8 + subl r12, r4, r8 + subl r7, r5, r8 + + bicl r10, r10, r2 + bicl r11, r11, r3 + bicl r12, r12, r4 + bicl r7, r7, r5 + + tstl r10, r9 + bset.ne r6, r6, 4 + + tstl r11, r9 + bset.ne r6, r6, 3 + + tstl r12, r9 + bset.ne r6, r6, 2 + + tstl r7, r9 + bset.ne r6, r6, 1 + + breq.d r6, 0, @.L_4_8B_search + + fls r5, r6 ; [2] + +; Point r13 to first NULL byte containing double word [3] + sub3l r13, r13, r5 + + ; Select appropriate register to analyze [4] + MOVP r2, r7 + + asr.f r6, r6, 3 + MOVP.c r2, r12 + + asr.f r6, r6, 1 + MOVP.c r2, r11 + + asr.f r6, r6, 1 + MOVP.c r2, r10 + +; Point r13 to first NULL byte in selected double word + andl r2, r2, r9 ; [5] + + ffsl r2, r2 ; [6] + + xbful r2, r2, 0b0111000011 ; [7] + + addl r13, r13, r2 ; [8] + + +; ========================== STRLEN CODE END >|< ========================== + + xorl r6, r6, r6 + +.L_4_8B_search_src: +#if defined (__ARC64_M128__) + + lddl.ab r2r3, [r1, +16] + lddl.ab r4r5, [r1, +16] + +#elif defined (__ARC64_ARCH64__) + + ldl.ab r2, [r1, +8] + ldl.ab r3, [r1, +8] + ldl.ab r4, [r1, +8] + ldl.ab r5, [r1, +8] + +#else + # error Unknown configuration +#endif + +; NULL byte position is detected and encoded in r6 [0] [9] + subl r10, r2, r8 + subl r11, r3, r8 + subl r12, r4, r8 + subl r7, r5, r8 + + bicl r10, r10, r2 + bicl r11, r11, r3 + bicl r12, r12, r4 + bicl r7, r7, r5 + + tstl r10, r9 + bset.ne r6, r6, 4 + + tstl r11, r9 + bset.ne r6, r6, 3 + + tstl r12, r9 + bset.ne r6, r6, 2 + + tstl r7, r9 + bset.ne r6, r6, 1 + + brne r6, 0, @.L_found_in_32B + +#if defined (__ARC64_M128__) + + stdl.ab r2r3, [r13, +16] + stdl.ab r4r5, [r13, +16] + +#elif defined (__ARC64_ARCH64__) + + stl.ab r2, [r13, +8] + stl.ab r3, [r13, +8] + stl.ab r4, [r13, +8] + stl.ab r5, [r13, +8] + +#else +# error Unknown configuration +#endif + + b @.L_4_8B_search_src + +.L_found_in_32B: + + fls r6, r6 ; [2] + +; Point r1 to first NULL byte containing double word [3] + sub3l r1, r1, r6 + +;; Store the already loaded data + + ; 4 -> 1 to 3 -> 0 + ;subl r6, r6, 1 + +; Invert so the biggest branch is at the end, and we dont need to increase +; block size + ; 3 -> 0 to 0 -> 3 + ;subl r6, 3, r6 + + ; Condense the two subs here + rsubl r6, r6, 4 + + asll r6, r6, 2 + +; Store double words + bi [r6] + + b.d @.L_store_lastL64bits + MOVP r11, r2 + nop + nop + + stl.ab r2, [r13, +8] + b.d @.L_store_lastL64bits + MOVP r11, r3 + nop + + stl.ab r2, [r13, +8] + stl.ab r3, [r13, +8] + b.d @.L_store_lastL64bits + MOVP r11, r4 + + stl.ab r2, [r13, +8] + stl.ab r3, [r13, +8] + stl.ab r4, [r13, +8] + MOVP r11, r5 + +; r11 now contains the data to write +.L_store_lastL64bits: + subl r10, r11, r8 + bicl r10, r10, r11 + + andl r10, r10, r9 ; [5] + + ffsl r2, r10 ; [6] + addl r2, r2, 1 + + xbful r2, r2, 0b0111000011 ; [7] + + movl r3, -1; Bitmask setup + + ; If the NULL byte is in byte 3 (starting from the right) + ; we want to store 8-3 bytes + rsubl r2, r2, 8 + asl r2, r2, 3 + + ; According to the target byte, setup masks + lsrl r3, r3, r2 + notl r4, r3 + + ; Obtain relevant data from destination + ldl r10, [r13] + + ; Get which data from dest is not to be overwritten and OR it + ; with the relevant data to write + andl r3, r3, r11 + andl r4, r4, r10 + + orl r3, r3, r4 + + j_s.d [blink] + stl.ab r3, [r13, +8] + + +ENDFUNC (strcat) + +#endif + +;; This code uses a common technique for NULL byte detection inside a word. +;; Details on this technique can be found in: +;; (https://graphics.stanford.edu/~seander/bithacks.html#ZeroInWord) +; +; In sum, this technique allows for detecting a NULL byte inside any given +; amount of bits by performing the following operation +; DETECTNULL(X) (((X) - 0x01010101) & ~(X) & 0x80808080) [0] +; +; The code above implements this by setting r8 to a 0x01010101... sequence and +; r9 to a 0x80808080... sequence of appropriate length +; As LIMM are 32 bit only, we need to perform MOVHL and ORL [1] operations to +; have the appropriate 64 bit values in place +; +;; Search is done 32 bytes at a time, either with 64 bit loads or 128 bit loads +;; If a NULL byte is detected, the position of the double word is encoded +;; in r6, which is then used to adjust r13 to the exact byte +; +; r6 is set via bset, which means we can simply use a fls to obtain the first +; match (or ffs depending on the values in bset) [2]. +; The reason for starting at 1 and not 0 is so r6 encodes how many double +; words to go back, and it wouldnt make sense to go back 0 (the NULL would be +; in the next loop iteration). +; +; The first step to take is point r13 to the appropriate double word. +; As the chosen encoded information is how many double words to go back, +; we can simply multiply r6 by 8 and reduce r13 by that amount [3] +; +; Then, we need to place the loaded double word containing the first NULL byte +; into a "common" register we can operate on later [4]. +; +; To do this without any jumps, we can shift r6 and perform a conditional mov +; based on the carry flag value. +; The order is very important because the NULL byte can appear in several +; double words, so we want to analyze from last to first. +; +; We can ignore the first asr (which would be asr.f 2, as we started r6 on 1) +; because if r7 isnt the NULL byte, r2 will always be overwritten so we can +; just decide to start at r7, and overwrite it if needed. +; +; Now comes the tricky part. In order to obtain the first NULL byte, we need to +; understand the NULL byte detection operation. It is explained in depth in the +; link above but in short, it works by first setting the highest bit of each +; byte to 1, if the corresponding byte is either 0 or less than 0x80 +; Then, separately, it makes the highest bit of each byte 1, if the byte is +; less than 0x80. The last step is to and these two values (this operation is +; simplified with the subl, bicl and tst instructions). +; +; This means that the evaluated equation result value [5] has zeros for all non +; zero bytes, except for the NULL bytes. Therefore, we can simply find the +; first non zero bit (counting from bit 0) which will be inside the position of +; the first NULL byte. +; +; One thing to note, is that ffs oddly returns 31 if no bit is found, setting +; the zero flag. As r9 is never all 0s at this stage (would mean there is no +; NULL byte and we wouldnt be here) we dont need to worry about that. [6] +; +; We can then convert the bit position into the last byte position by looking +; into bits 3 to 5, and shifting 3 bits to the right. This can be combined into +; a single xbful operation. The bottom 000011 represent shift by 3 and the top +; 0111 represents the mask (3 to 5 shifted by 3 is 0 to 2). We dont need to worry +; about the case where ffs does not find a bit, because we know for sure there is +; at least one NULL byte, and therefore one of the highest bits is set to 1 [7] +; +; Finally, we can add the NULL byte position inside the loaded double word to +; r13 and subtract r0 from r13 to obtain the string size [8] +; +; Some operations are re-ordered such that register dependency is reduced, +; allowing the CPU to run more instructions in parallel [9] +; +; +; Some data was already read, and needs to be stored following the same read +; order. To do this, we need to make the +; +; diff --git a/newlib/libc/machine/arc64/strcmp.S b/newlib/libc/machine/arc64/strcmp.S new file mode 100644 index 0000000..fc42f53 --- /dev/null +++ b/newlib/libc/machine/arc64/strcmp.S @@ -0,0 +1,342 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +#if defined (__ARC64_ARCH32__) + +; 64 bit version has the same working principles, with slightly different +; instructions, so it is more commented + +ENTRY (strcmp) + xor r12, r12, r12 + + mov r8, NULL_32DT_1 + + asl r9, r8, 7 + +.L_3_4B_comparison: + + ld.ab r6, [r0, +4] + + ld.ab r7, [r1, +4] + +#if defined (__ARC64_LL64__) + + ldd.ab r2r3, [r0, +8] + + ldd.ab r4r5, [r1, +8] + +#else + + ld.ab r2, [r0, +4] + ld.ab r3, [r0, +4] + + ld.ab r4, [r1, +4] + ld.ab r5, [r1, +4] + +#endif + + sub r13, r6, r8 + sub r10, r2, r8 + sub r11, r3, r8 + + bic r13, r13, r6 + bic r10, r10, r2 + bic r11, r11, r3 + + ; Look for difference + sub.f 0, r6, r7 + bset.ne r12, r12, 3 + + sub.f 0, r2, r4 + bset.ne r12, r12, 2 + + sub.f 0, r3, r5 + bset.ne r12, r12, 1 + + + ; Look for NULL byte + and.f r13, r13, r9 + bset.ne r12, r12, 3 + + and.f r10, r10, r9 + bset.ne r12, r12, 2 + + and.f r11, r11, r9 + bset.ne r12, r12, 1 + + breq r12, 0, @.L_3_4B_comparison + +; Setup r0, r3 and r5 with the relevant loaded and intermediate values + mov r0, r11 + mov r3, r3 + mov r5, r5 + + asr.f r12, r12, 3 + + mov.c r0, r10 + mov.c r3, r2 + mov.c r5, r4 + + asr.f r12, r12, 1 + + mov.c r0, r13 + mov.c r3, r6 + mov.c r5, r7 + + + ffs.f r10, r0 + xor r12, r3, r5 + + mov.z r10, 32 + ffs r12, r12 + + xbfu r10, r10, 0b0111000011 + xbfu r12, r12, 0b0111000011 + + + sub.f 0, r10, r12 + + asl.ge r12, r12, 3 + +; Difference is first + lsr.ge r3, r3, r12 + lsr.ge r5, r5, r12 + + bmsk r3, r3, 7 + bmsk r5, r5, 7 + + j_s.d [blink] + sub r0, r3, r5 + + +ENDFUNC(strcmp) + +#else + +ENTRY (strcmp) + + xorl r12, r12, r12 + +; Setup byte detector (more information bellow) [1] + vpack2wl r8, NULL_32DT_1, NULL_32DT_1 +; Set r9 as a copy of r8 for vectorized sub + asll r9, r8, 7 + +.L_3_8B_comparison: + + ldl.ab r6, [r0, +8] + + ldl.ab r7, [r1, +8] + +; Using 128-bit memory operations +#if defined (__ARC64_M128__) + + lddl.ab r2r3, [r0, +16] + + lddl.ab r4r5, [r1, +16] + +; The 64-bit crunching implementation. +#elif defined (__ARC64_ARCH64__) + + ldl.ab r2, [r0, +8] + ldl.ab r3, [r0, +8] + + ldl.ab r4, [r1, +8] + ldl.ab r5, [r1, +8] + +#else + # error Unknown configuration +#endif + + subl r13, r6, r8 + subl r10, r2, r8 + subl r11, r3, r8 + + bicl r13, r13, r6 + bicl r10, r10, r2 + bicl r11, r11, r3 + +; Look for difference + subl.f 0, r6, r7 + bset.ne r12, r12, 3 + + subl.f 0, r2, r4 + bset.ne r12, r12, 2 + + subl.f 0, r3, r5 + bset.ne r12, r12, 1 + +; Look for NULL byte + andl.f r13, r13, r9 + bset.ne r12, r12, 3 + + andl.f r10, r10, r9 + bset.ne r12, r12, 2 + + andl.f r11, r11, r9 + bset.ne r12, r12, 1 + + breq r12, 0, @.L_3_8B_comparison + +; Setup r0, r3 and r5 with the relevant loaded and intermediate values [2] + ; [3] + movl r0, r11 + movl r3, r3 + movl r5, r5 + + asr.f r12, r12, 3 + + movl.c r0, r10 + movl.c r3, r2 + movl.c r5, r4 + + asr.f r12, r12, 1 + + movl.c r0, r13 + movl.c r3, r6 + movl.c r5, r7 + + ffsl.f r10, r0 ; [5] + xorl r12, r3, r5 + + movl.z r10, 64 ; [6] + ffsl r12, r12 ; [8] + + xbful r10, r10, 0b0111000011 ; [7] + xbful r12, r12, 0b0111000011 + +; r12 contains position of difference and r10 the position of a NULL byte +; r3 and r5 contain the differing 8 bytes + +; Is there a difference? + subl.f 0, r10, r12 +; Multiply the byte position by 8 to get bit shift + asll.ge r12, r12, 3 + + lsrl.ge r3, r3, r12 + lsrl.ge r5, r5, r12 + +; There is no difference. Up until the NULL byte which must be + + bmskl r3, r3, 7 + bmskl r5, r5, 7 + + j_s.d [blink] + subl r0, r3, r5 + + +ENDFUNC (strcmp) + +#endif + +;; One important thing to note, is that we look for the first byte difference on +;; both strings but we only look for the NULL byte in one string. +;; This is because if a NULL byte appears first, it will be the first different +;; byte. If it doesnt, the difference is what matters either way. If there is no +;; difference, the NULL bytes will coincide! +; +; +;; This code uses a common technique for NULL byte detection inside a word. +;; Details on this technique can be found in: +;; (https://graphics.stanford.edu/~seander/bithacks.html#ZeroInWord) +; +; In sum, this technique allows for detecting a NULL byte inside any given +; amount of bits by performing the following operation +; DETECTNULL(X) (((X) - 0x01010101) & ~(X) & 0x80808080) [0] +; +; The code above implements this by setting r8 to a 0x01010101... sequence and +; r1 to a 0x80808080... sequence of appropriate length +; As LIMM are 32 bit only, we need to perform MOVHL and ORL [1] operations to +; have the appropriate 64 bit values in place +; +;; Comparison is done 24 bytes at a time, either with 3 64 bit loads or 1 128 bit +;; load and 1 64 bit. +;; If either a NULL byte or a difference between the strings is found, r12 is +;; used to know in which word the NULL/difference is found +; +; With the carry bit from r12, we can use mov.c to only move the appropriate +; registers into the ones we will operate on [2]. We can safely directly move +; the last set of registers without looking at r12, because if they aren't the +; appropriate ones, they will be rewritten afterwards. [3] +; +;; Knowing the registers that contain the relevant information, we only need to +;; look into where the difference and one of the zeros is. +;; This is because, if the zeros are in different places, the difference will +;; either be an earlier difference, or the first zero, so the actual zeros are +;; irrelevant. +;; Zero position is only relevant if there is no difference. And if there is no +;; difference, the zeros have the same position. +; +; So now comes the tricky part. In order to obtain the position of a "first +; NULL byte", we need to understand the NULL byte detection operation. +; It is explained in depth in the link above but in short, it works by first +; setting the highest bit of each byte to 1, if the corresponding byte is either +; 0 or more than 0x80 +; Then, it makes the highest bit of each byte 1, if the byte is less than 0x80. +; The last step is to AND these two values (this operation is simplified with +; the SUB, BIC and TST instructions). +; +; This means that the evaluated equation result value has zeros for all non +; zero bytes, except for the NULL bytes. Therefore, we can simply find the +; first non zero bit (counting from bit 0) which will be inside the position of +; the first NULL byte. [5] +; +; One thing to note, is that ffs oddly returns 31/63 if no bit is found, setting +; the zero flag. As there can be that no NULL byte is present on one or both +; strings at this point, we must set r10 and r11 to 32/64 when appropriate. [6] +; +; We can then convert the bit position into the last byte position by looking +; into bits 3 to 5, and shifting 3 bits to the right. This can be combined into +; a single xbful operation. The bottom 000011 represent shift by 3 and the top +; 0111 represents the mask (3 to 5 shifted by 3 is 0 to 2). [7] +; +; To obtain the position of the difference, all we need to do is xor the two +; registers. This way, every equal byte cancels out and all we are left with +; is gibberish in the differing bytes. We can use the same ffs and xbuf +; operations to get the differing byte position. +; +; Note that the order of the operations isnt the same as in this explanation, +; to reduce register dependency between instructions +; +; +; Unlike with r10, we dont need to check the zero flag for r12s' ffs because if +; it is 0, it means there is no difference in the loaded data so any subtraction +; operation will return 0 [8] +; +; There is one optimization that is being overlooked, which is returning 0 if +; there is no difference, but there are NULL bytes anywhere, right after the +; main loop. The reason for this is because the only way this can happen is if +; the strings have the same length AND either are a multiple of 16/8 bytes, or +; the bytes that follow the NULL bytes also match. As this is extremely +; unlikely, it isnt worth it to perform this optimization since it would require +; an extra branch in all runs +; diff --git a/newlib/libc/machine/arc64/strlen.S b/newlib/libc/machine/arc64/strlen.S new file mode 100644 index 0000000..2f1a96a --- /dev/null +++ b/newlib/libc/machine/arc64/strlen.S @@ -0,0 +1,301 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#include <sys/asm.h> + +; Code Brief (more info at the bottom): +; Searches the provided string, 32 bytes at a time, using 128 bit loads +; Finds the NULL bytes inside the loaded data +; Analyzes the first NULL byte containing double word and calculates +; size appropriately +; +; R0 const char* ptr (string to measure) +; ret (R0): +; - unsigned (string size) +; + +#if defined (__ARC64_ARCH32__) + +ENTRY (strlen) + +; Preserve r0 for size calculation when returning + mov r13, r0 + xor r12, r12, r12 + +; Setup byte detector (more information bellow) [1] + mov r8, NULL_32DT_1 +; Set r9 as a copy of r8 for vectorized sub + mov r9, r8 + + asl r1, r8, 7 + +.L_4_4B_search: + +#if defined (__ARC64_LL64__) + + ldd.ab r2r3, [r13, +8] + ldd.ab r4r5, [r13, +8] + +#else + + ld.ab r2, [r13, +4] + ld.ab r3, [r13, +4] + ld.ab r4, [r13, +4] + ld.ab r5, [r13, +4] + +#endif + +; NULL byte position is detected and encoded in r12 [0] [9] + + vsub2 r10, r2, r8 + vsub2 r6, r4, r8 + + bic r10, r10, r2 + bic r11, r11, r3 + bic r6, r6, r4 + bic r7, r7, r5 + + tst r10, r1 + bset.ne r12, r12, 4 + + tst r11, r1 + bset.ne r12, r12, 3 + + tst r6, r1 + bset.ne r12, r12, 2 + + tst r7, r1 + bset.ne r12, r12, 1 + + breq.d r12, 0, @.L_4_4B_search + + fls r5, r12 ; [2] + +; Point r13 to first NULL byte containing double word [3] + sub2 r13, r13, r5 + +; Select appropriate register to analyze [4] + mov r2, r7 + + asr.f r12, r12, 3 + mov.c r2, r6 + + asr.f r12, r12, 1 + mov.c r2, r11 + + asr.f r12, r12, 1 + mov.c r2, r10 + +; Point r13 to first NULL byte in selected double word +.L_fix_r13: + and r1, r2, r1 ; [5] + + ffs r1, r1 ; [6] + + xbfu r1, r1, 0b0111000011 ; [7] + + add r13, r13, r1 ; [8] + + j_s.d [blink] + sub r0, r13, r0 + + +ENDFUNC (strlen) + +#else + +ENTRY (strlen) + +; Preserve r0 for size calculation when returning + movl r13, r0 + xor r12, r12, r12 + +; Setup byte detector (more information bellow) [1] + vpack2wl r8, NULL_32DT_1, NULL_32DT_1 + + asll r1, r8, 7 + +.L_4_8B_search: + +; Using 128-bit memory operations +#if defined (__ARC64_M128__) + + lddl.ab r2r3, [r13, +16] + lddl.ab r4r5, [r13, +16] + +; The 64-bit crunching implementation. +#elif defined (__ARC64_ARCH64__) + + ldl.ab r2, [r13, +8] + ldl.ab r3, [r13, +8] + ldl.ab r4, [r13, +8] + ldl.ab r5, [r13, +8] + +#else + # error Unknown configuration +#endif + +; NULL byte position is detected and encoded in r6 [0] [9] + subl r10, r2, r8 + subl r11, r3, r8 + subl r6, r4, r8 + subl r7, r5, r8 + + bicl r10, r10, r2 + bicl r11, r11, r3 + bicl r6, r6, r4 + bicl r7, r7, r5 + + tstl r10, r1 + bset.ne r12, r12, 4 + + tstl r11, r1 + bset.ne r12, r12, 3 + + tstl r6, r1 + bset.ne r12, r12, 2 + + tstl r7, r1 + bset.ne r12, r12, 1 + + breq.d r12, 0, @.L_4_8B_search + + flsl r5, r12 ; [2] + +; Point r13 to first NULL byte containing double word [3] + sub3l r13, r13, r5 + +; Select appropriate register to analyze [4] + movl r2, r7 + + asr.f r12, r12, 3 + movl.c r2, r6 + + asr.f r12, r12, 1 + movl.c r2, r11 + + asr.f r12, r12, 1 + movl.c r2, r10 + +; Point r13 to first NULL byte in selected double word +.L_fix_r13: + andl r1, r2, r1 ; [5] + + ffsl r1, r1 ; [6] + + xbful r1, r1, 0b0111000011 ; [7] + + addl r13, r13, r1 ; [8] + + j_s.d [blink] + subl r0, r13, r0 + + +ENDFUNC (strlen) + +#endif + +;; This code uses a common technique for NULL byte detection inside a word. +;; Details on this technique can be found in: +;; (https://graphics.stanford.edu/~seander/bithacks.html#ZeroInWord) +; +; In sum, this technique allows for detecting a NULL byte inside any given +; amount of bits by performing the following operation +; DETECTNULL(X) (((X) - 0x01010101) & ~(X) & 0x80808080) [0] +; +; The code above implements this by setting r8 to a +; 0x01010101... sequence and r1 to a 0x80808080... sequence of +; appropriate length As LIMM are 32 bit only, we need to perform MOVHL +; and ORL [1] operations to have the appropriate 64 bit values in +; place +; +;; Search is done 32 bytes at a time, either with 64 bit loads or 128 +;; bit loads If a NULL byte is detected, the position of the double +;; word is encoded in r12, which is then used to adjust r13 +; +; r12 is set via bset, which means we can simply use a fls to obtain +; the first match (or ffs depending on the values in bset) [2]. The +; reason for starting at 1 and not 0 is so r12 encodes how many double +; words to go back, and it wouldnt make sense to go back 0 (the NULL +; would be in the next loop iteration). +; +; The first step to take is point r13 to the appropriate double word. +; As the chosen encoded information is how many double words to go +; back, we can simply multiply r12 by 8 and reduce r13 by that amount +; [3] +; +; Then, we need to place the loaded double word containing the first +; NULL byte into a "common" register we can operate on later [4]. +; +; To do this without any jumps, we can shift r12 and perform a +; conditional mov based on the carry flag value. The order is very +; important because the NULL byte can appear in several double words, +; so we want to analyze from last to first. +; +; We can ignore the first asr (which would be asr.f 2, as we started +; r12 on 1) because if r7 isnt the NULL byte, r2 will always be +; overwritten so we can just decide to start at r7, and overwrite it +; if needed. +; +; Now comes the tricky part. In order to obtain the first NULL byte, +; we need to understand the NULL byte detection operation. It is +; explained in depth in the link above but in short, it works by first +; setting the highest bit of each byte to 1, if the corresponding byte +; is either 0 or more than 0x80 Then, separately, it makes the highest +; bit of each byte 1, if the byte is less than 0x80. The last step is +; to AND these two values (this operation is simplified with the SUB, +; BIC and TST instructions). +; +; This means that the evaluated equation result value [5] has zeros +; for all non zero bytes, except for the NULL bytes. Therefore, we can +; simply find the first non zero bit (counting from bit 0) which will +; be inside the position of the first NULL byte. +; +; One thing to note, is that ffs oddly returns 31 if no bit is found, +; setting the zero flag. As r9 is never all 0s at this stage (would +; mean there is no NULL byte and we wouldnt be here) we dont need to +; worry about that. [6] +; +; We can then convert the bit position into the last byte position by +; looking into bits 3 to 5, and shifting 3 bits to the right. This can +; be combined into a single xbful operation. The bottom 000011 +; represent shift by 3 and the top 0111 represents the mask (3 to 5 +; shifted by 3 is 0 to 2). We dont need to worry about the case where +; ffs does not find a bit, because we know for sure there is at least +; one NULL byte, and therefore one of the highest bits is set to 1 [7] +; +; Finally, we can add the NULL byte position inside the loaded double +; word to r13 and subtract r0 from r13 to obtain the string size [8] +; +; +; Some operations are re-ordered such that register dependency is +; reduced, allowing the CPU to run more instructions in parallel [9] +; +; diff --git a/newlib/libc/machine/arc64/sys/asm.h b/newlib/libc/machine/arc64/sys/asm.h new file mode 100644 index 0000000..d1fbb75 --- /dev/null +++ b/newlib/libc/machine/arc64/sys/asm.h @@ -0,0 +1,70 @@ +/* + Copyright (c) 2024, Synopsys, Inc. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1) Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2) Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3) Neither the name of the Synopsys, Inc., nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _SYS_ASM_H +#define _SYS_ASM_H + +/* + * Macros to handle different pointer/register sizes for 32/64-bit code + */ +#if defined (__ARC64_ARCH32__) +# define ST64 std +# define LD64 ldd +# define MOVP mov +# define LSRP lsr +# define ADDP add +# define SUBP sub +# define REG_SZ 4 +# define REG_ST st +# define REG_LD ld +#elif defined (__ARC64_ARCH64__) +# define ST64 stl +# define LD64 ldl +# define MOVP movl +# define LSRP lsrl +# define ADDP addl +# define SUBP subl +# define REG_SZ 8 +# define REG_ST stl +# define REG_LD ldl +#else +# error Please use either 32-bit or 64-bit version of arc64 compiler +#endif + +# define NULL_32DT_1 0x01010101 +# define NULL_32DT_2 0x80808080 + +#define _ENTRY(name) .text ` .balign 4 ` .globl name ` name: +#define FUNC(name) .type name,@function +#define ENDFUNC0(name) .Lfe_##name: .size name,.Lfe_##name-name +#define ENDFUNC(name) ENDFUNC0 (name) +#define ENTRY(name) _ENTRY (name) ` FUNC (name) + +#endif /* _SYS_ASM_H */ diff --git a/newlib/libc/sys/xtensa/include/xtensa/config/core-isa.h b/newlib/libc/machine/xtensa/include/xtensa/config/core-isa.h index 2accd41..2accd41 100644 --- a/newlib/libc/sys/xtensa/include/xtensa/config/core-isa.h +++ b/newlib/libc/machine/xtensa/include/xtensa/config/core-isa.h diff --git a/newlib/libc/sys/xtensa/include/fenv.h b/newlib/libc/machine/xtensa/sys/fenv.h index 2fa76f7..69c94f0 100644 --- a/newlib/libc/sys/xtensa/include/fenv.h +++ b/newlib/libc/machine/xtensa/sys/fenv.h @@ -26,8 +26,8 @@ OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef _FENV_H -#define _FENV_H +#ifndef _SYS_FENV_H +#define _SYS_FENV_H #ifdef __cplusplus extern "C" { @@ -85,4 +85,4 @@ int fegetexcept(void); } #endif -#endif +#endif // _SYS_FENV_H diff --git a/newlib/libc/posix/glob.c b/newlib/libc/posix/glob.c index 5e6c2fc..20eec02 100644 --- a/newlib/libc/posix/glob.c +++ b/newlib/libc/posix/glob.c @@ -502,11 +502,14 @@ glob0(pattern, pglob, limit) * and the pattern did not contain any magic characters * GLOB_NOMAGIC is there just for compatibility with csh. */ - if (pglob->gl_pathc == oldpathc && - ((pglob->gl_flags & GLOB_NOCHECK) || - ((pglob->gl_flags & GLOB_NOMAGIC) && - !(pglob->gl_flags & GLOB_MAGCHAR)))) - return(globextend(pattern, pglob, limit)); + if (pglob->gl_pathc == oldpathc) { + if ((pglob->gl_flags & GLOB_NOCHECK) || + ((pglob->gl_flags & GLOB_NOMAGIC) && + !(pglob->gl_flags & GLOB_MAGCHAR))) + return(globextend(pattern, pglob, limit)); + else + return(GLOB_NOMATCH); + } else if (!(pglob->gl_flags & GLOB_NOSORT)) qsort(pglob->gl_pathv + pglob->gl_offs + oldpathc, pglob->gl_pathc - oldpathc, sizeof(char *), compare); diff --git a/newlib/libc/stdlib/_mallocr.c b/newlib/libc/stdlib/_mallocr.c index c73982c..56968cb 100644 --- a/newlib/libc/stdlib/_mallocr.c +++ b/newlib/libc/stdlib/_mallocr.c @@ -731,16 +731,16 @@ do { \ /* SVID2/XPG mallinfo structure */ struct mallinfo { - int arena; /* total space allocated from system */ - int ordblks; /* number of non-inuse chunks */ - int smblks; /* unused -- always zero */ - int hblks; /* number of mmapped regions */ - int hblkhd; /* total space in mmapped regions */ - int usmblks; /* unused -- always zero */ - int fsmblks; /* unused -- always zero */ - int uordblks; /* total allocated space */ - int fordblks; /* total non-inuse space */ - int keepcost; /* top-most, releasable (via malloc_trim) space */ + size_t arena; /* total space allocated from system */ + size_t ordblks; /* number of non-inuse chunks */ + size_t smblks; /* unused -- always zero */ + size_t hblks; /* number of mmapped regions */ + size_t hblkhd; /* total space in mmapped regions */ + size_t usmblks; /* unused -- always zero */ + size_t fsmblks; /* unused -- always zero */ + size_t uordblks; /* total allocated space */ + size_t fordblks; /* total non-inuse space */ + size_t keepcost; /* top-most, releasable (via malloc_trim) space */ }; /* SVID2/XPG mallopt options */ diff --git a/newlib/libc/sys/Makefile.inc b/newlib/libc/sys/Makefile.inc index 24d8407..9f87589 100644 --- a/newlib/libc/sys/Makefile.inc +++ b/newlib/libc/sys/Makefile.inc @@ -64,9 +64,6 @@ endif if HAVE_LIBC_SYS_W65_DIR include %D%/w65/Makefile.inc endif -if HAVE_LIBC_SYS_XTENSA_DIR -include %D%/xtensa/Makefile.inc -endif if HAVE_LIBC_SYS_Z8KSIM_DIR include %D%/z8ksim/Makefile.inc endif diff --git a/newlib/libc/sys/esp/include/sys/dirent.h b/newlib/libc/sys/esp/include/sys/dirent.h new file mode 100644 index 0000000..0e0c2f5 --- /dev/null +++ b/newlib/libc/sys/esp/include/sys/dirent.h @@ -0,0 +1,49 @@ +#ifndef _SYS_DIRENT_H +#define _SYS_DIRENT_H + +#include <sys/cdefs.h> +#include <sys/_types.h> + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef _INO_T_DECLARED +typedef __ino_t ino_t; +#define _INO_T_DECLARED +#endif + +struct dirent { + ino_t d_ino; /* file number */ + __uint8_t d_type; /* file type, see below */ + char d_name[255 + 1]; /* zero-terminated file name */ +}; + +typedef struct { + __uint16_t dd_vfs_idx; /*!< VFS index, not to be used by applications */ + __uint16_t dd_rsv; /*!< field reserved for future extension */ + /* remaining fields are defined by VFS implementation */ +} DIR; + +#if __BSD_VISIBLE +#define MAXNAMLEN 255 + +/* File types */ +#define DT_UNKNOWN 0 +#define DT_REG 1 +#define DT_DIR 2 + +/* File types which are not defined for ESP. + * But must be present to build libstd++ */ +#define DT_CHR 4 +#define DT_BLK 6 +#define DT_FIFO 8 +#define DT_LNK 10 +#define DT_SOCK 12 +#define DT_WHT 14 +#endif + +#ifdef __cplusplus +} +#endif +#endif diff --git a/newlib/libc/sys/xtensa/Makefile.inc b/newlib/libc/sys/xtensa/Makefile.inc deleted file mode 100644 index ddee58a..0000000 --- a/newlib/libc/sys/xtensa/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -libc_a_SOURCES += %D%/creat.c %D%/isatty.c %D%/clibrary_init.c diff --git a/newlib/libc/sys/xtensa/creat.c b/newlib/libc/sys/xtensa/creat.c deleted file mode 100644 index 21e6a18..0000000 --- a/newlib/libc/sys/xtensa/creat.c +++ /dev/null @@ -1,9 +0,0 @@ -/* creat() "system call" (copied from libc/posix/creat.c) */ - -#include <fcntl.h> - -int -creat (const char *path, mode_t mode) -{ - return open (path, O_WRONLY | O_CREAT | O_TRUNC, mode); -} diff --git a/newlib/libc/sys/xtensa/crt0.c b/newlib/libc/sys/xtensa/crt0.c deleted file mode 100644 index 11725dc..0000000 --- a/newlib/libc/sys/xtensa/crt0.c +++ /dev/null @@ -1,16 +0,0 @@ -/* Dummy crt0 code. */ - -/* Copyright (c) 2003 by Tensilica Inc. ALL RIGHTS RESERVED. - These coded instructions, statements, and computer programs are the - copyrighted works and confidential proprietary information of Tensilica Inc. - They may not be modified, copied, reproduced, distributed, or disclosed to - third parties in any manner, medium, or form, in whole or in part, without - the prior written consent of Tensilica Inc. */ - -/* Xtensa systems normally use a crt1 file associated with a particular - linker support package (LSP). There is no need for this crt0 file, - except that the newlib makefiles require it to exist if there is a - sys/xtensa directory. The directory exists only to hold the header - files for the Xtensa ISS semihosting "platform". */ - -void crt0_unused (void) {} diff --git a/newlib/libc/sys/xtensa/include/unistd.h b/newlib/libc/sys/xtensa/include/unistd.h deleted file mode 100644 index 4f6fd29..0000000 --- a/newlib/libc/sys/xtensa/include/unistd.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _UNISTD_H_ -#define _UNISTD_H_ - -# include <sys/unistd.h> - -#ifndef L_SET -/* Old BSD names for the same constants; just for compatibility. */ -#define L_SET SEEK_SET -#define L_INCR SEEK_CUR -#define L_XTND SEEK_END -#endif - -#endif /* _UNISTD_H_ */ diff --git a/newlib/libc/sys/xtensa/isatty.c b/newlib/libc/sys/xtensa/isatty.c deleted file mode 100644 index fe64209..0000000 --- a/newlib/libc/sys/xtensa/isatty.c +++ /dev/null @@ -1,18 +0,0 @@ -/* isatty.c */ - -/* Dumb implementation so programs will at least run. */ - -#include <sys/stat.h> -#include <reent.h> - -int -_isatty_r (struct _reent *ptr, int fd) -{ - struct stat buf; - - if (_fstat_r (ptr, fd, &buf) < 0) - return 0; - if (S_ISCHR (buf.st_mode)) - return 1; - return 0; -} diff --git a/newlib/libc/sys/xtensa/sys/file.h b/newlib/libc/sys/xtensa/sys/file.h deleted file mode 100644 index 48a2ca0..0000000 --- a/newlib/libc/sys/xtensa/sys/file.h +++ /dev/null @@ -1,33 +0,0 @@ -/* Copyright (c) 2005-2006 Tensilica Inc. ALL RIGHTS RESERVED. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TENSILICA - INCORPORATED BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - -#include <sys/fcntl.h> - -/* Alternate names for values for the WHENCE argument to `lseek'. - These are the same as SEEK_SET, SEEK_CUR, and SEEK_END, respectively. */ -#ifndef L_SET -#define L_SET 0 /* Seek from beginning of file. */ -#define L_INCR 1 /* Seek from current position. */ -#define L_XTND 2 /* Seek from end of file. */ -#endif diff --git a/newlib/libm/ld/math_private.h b/newlib/libm/ld/math_private.h index c5b88f6..6d0183e 100644 --- a/newlib/libm/ld/math_private.h +++ b/newlib/libm/ld/math_private.h @@ -705,6 +705,59 @@ irintl(long double x) } #endif +/* + * The following are fast floor macros for 0 <= |x| < 0x1p(N-1), where + * N is the precision of the type of x. These macros are used in the + * half-cycle trignometric functions (e.g., sinpi(x)). + */ +#define FFLOORF(x, j0, ix) do { \ + (j0) = (((ix) >> 23) & 0xff) - 0x7f; \ + (ix) &= ~(0x007fffff >> (j0)); \ + SET_FLOAT_WORD((x), (ix)); \ +} while (0) + +#define FFLOOR(x, j0, ix, lx) do { \ + (j0) = (((ix) >> 20) & 0x7ff) - 0x3ff; \ + if ((j0) < 20) { \ + (ix) &= ~(0x000fffff >> (j0)); \ + (lx) = 0; \ + } else { \ + (lx) &= ~((uint32_t)0xffffffff >> ((j0) - 20)); \ + } \ + INSERT_WORDS((x), (ix), (lx)); \ +} while (0) + +#define FFLOORL80(x, j0, ix, lx) do { \ + j0 = ix - 0x3fff + 1; \ + if ((j0) < 32) { \ + (lx) = ((lx) >> 32) << 32; \ + (lx) &= ~((((lx) << 32)-1) >> (j0)); \ + } else { \ + uint64_t _m; \ + _m = (uint64_t)-1 >> (j0); \ + if ((lx) & _m) (lx) &= ~_m; \ + } \ + INSERT_LDBL80_WORDS((x), (ix), (lx)); \ +} while (0) + +#define FFLOORL128(x, ai, ar) do { \ + union IEEEl2bits u; \ + uint64_t m; \ + int e; \ + u.e = (x); \ + e = u.bits.exp - 16383; \ + if (e < 48) { \ + m = ((1llu << 49) - 1) >> (e + 1); \ + u.bits.manh &= ~m; \ + u.bits.manl = 0; \ + } else { \ + m = (uint64_t)-1 >> (e - 48); \ + u.bits.manl &= ~m; \ + } \ + (ai) = u.e; \ + (ar) = (x) - (ai); \ +} while (0) + #ifdef DEBUG #if defined(__amd64__) || defined(__i386__) #define breakpoint() asm("int $3") diff --git a/newlib/libm/ld128/Makefile.inc b/newlib/libm/ld128/Makefile.inc index 337284d..3a04b99 100644 --- a/newlib/libm/ld128/Makefile.inc +++ b/newlib/libm/ld128/Makefile.inc @@ -1,7 +1,8 @@ %C%_lsrc = \ %D%/e_powl.c %D%/s_erfl.c %D%/s_exp2l.c %D%/s_expl.c \ %D%/s_logl.c %D%/b_tgammal.c %D%/invtrig.c \ - %D%/e_lgammal_r.c %D%/k_cosl.c %D%/k_sinl.c + %D%/e_lgammal_r.c %D%/k_cosl.c %D%/k_sinl.c \ + %D%/k_tanl.c %D%/s_sinpil.c %D%/s_cospil.c libm_a_CFLAGS_%C% = -fbuiltin -fno-math-errno diff --git a/newlib/libm/ld128/k_cospil.h b/newlib/libm/ld128/k_cospil.h new file mode 100644 index 0000000..592f192 --- /dev/null +++ b/newlib/libm/ld128/k_cospil.h @@ -0,0 +1,42 @@ +/*- + * Copyright (c) 2017 Steven G. Kargl + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * See ../src/k_cospi.c for implementation details. + */ + +static inline long double +__kernel_cospil(long double x) +{ + long double hi, lo; + + hi = (double)x; + lo = x - hi; + lo = lo * (pi_lo + pi_hi) + hi * pi_lo; + hi *= pi_hi; + _2sumF(hi, lo); + return (__kernel_cosl(hi, lo)); +} diff --git a/newlib/libm/ld128/k_sinpil.h b/newlib/libm/ld128/k_sinpil.h new file mode 100644 index 0000000..fa4e7d6 --- /dev/null +++ b/newlib/libm/ld128/k_sinpil.h @@ -0,0 +1,42 @@ +/*- + * Copyright (c) 2017 Steven G. Kargl + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * See ../src/k_sinpi.c for implementation details. + */ + +static inline long double +__kernel_sinpil(long double x) +{ + long double hi, lo; + + hi = (double)x; + lo = x - hi; + lo = lo * (pi_lo + pi_hi) + hi * pi_lo; + hi *= pi_hi; + _2sumF(hi, lo); + return (__kernel_sinl(hi, lo, 1)); +} diff --git a/newlib/libm/ld128/k_tanl.c b/newlib/libm/ld128/k_tanl.c new file mode 100644 index 0000000..9a58cd2 --- /dev/null +++ b/newlib/libm/ld128/k_tanl.c @@ -0,0 +1,114 @@ +/* + * ==================================================== + * Copyright 2004 Sun Microsystems, Inc. All Rights Reserved. + * Copyright (c) 2008 Steven G. Kargl, David Schultz, Bruce D. Evans. + * + * Permission to use, copy, modify, and distribute this + * software is freely granted, provided that this notice + * is preserved. + * ==================================================== + */ + +/* + * ld128 version of k_tan.c. See ../src/k_tan.c for most comments. + */ + +#include "math.h" +#include "../ld/math_private.h" + +/* + * Domain [-0.67434, 0.67434], range ~[-3.37e-36, 1.982e-37] + * |tan(x)/x - t(x)| < 2**-117.8 (XXX should be ~1e-37) + * + * See ../ld80/k_cosl.c for more details about the polynomial. + */ +static const long double +T3 = 0x1.5555555555555555555555555553p-2L, +T5 = 0x1.1111111111111111111111111eb5p-3L, +T7 = 0x1.ba1ba1ba1ba1ba1ba1ba1b694cd6p-5L, +T9 = 0x1.664f4882c10f9f32d6bbe09d8bcdp-6L, +T11 = 0x1.226e355e6c23c8f5b4f5762322eep-7L, +T13 = 0x1.d6d3d0e157ddfb5fed8e84e27b37p-9L, +T15 = 0x1.7da36452b75e2b5fce9ee7c2c92ep-10L, +T17 = 0x1.355824803674477dfcf726649efep-11L, +T19 = 0x1.f57d7734d1656e0aceb716f614c2p-13L, +T21 = 0x1.967e18afcb180ed942dfdc518d6cp-14L, +T23 = 0x1.497d8eea21e95bc7e2aa79b9f2cdp-15L, +T25 = 0x1.0b132d39f055c81be49eff7afd50p-16L, +T27 = 0x1.b0f72d33eff7bfa2fbc1059d90b6p-18L, +T29 = 0x1.5ef2daf21d1113df38d0fbc00267p-19L, +T31 = 0x1.1c77d6eac0234988cdaa04c96626p-20L, +T33 = 0x1.cd2a5a292b180e0bdd701057dfe3p-22L, +T35 = 0x1.75c7357d0298c01a31d0a6f7d518p-23L, +T37 = 0x1.2f3190f4718a9a520f98f50081fcp-24L, +pio4 = 0x1.921fb54442d18469898cc51701b8p-1L, +pio4lo = 0x1.cd129024e088a67cc74020bbea60p-116L; + +static const double +T39 = 0.000000028443389121318352, /* 0x1e8a7592977938.0p-78 */ +T41 = 0.000000011981013102001973, /* 0x19baa1b1223219.0p-79 */ +T43 = 0.0000000038303578044958070, /* 0x107385dfb24529.0p-80 */ +T45 = 0.0000000034664378216909893, /* 0x1dc6c702a05262.0p-81 */ +T47 = -0.0000000015090641701997785, /* -0x19ecef3569ebb6.0p-82 */ +T49 = 0.0000000029449552300483952, /* 0x194c0668da786a.0p-81 */ +T51 = -0.0000000022006995706097711, /* -0x12e763b8845268.0p-81 */ +T53 = 0.0000000015468200913196612, /* 0x1a92fc98c29554.0p-82 */ +T55 = -0.00000000061311613386849674, /* -0x151106cbc779a9.0p-83 */ +T57 = 1.4912469681508012e-10; /* 0x147edbdba6f43a.0p-85 */ + +long double +__kernel_tanl(long double x, long double y, int iy) { + long double z, r, v, w, s; + long double osign; + int i; + + iy = (iy == 1 ? -1 : 1); /* XXX recover original interface */ + osign = (x >= 0 ? 1.0 : -1.0); /* XXX slow, probably wrong for -0 */ + if (fabsl(x) >= 0.67434) { + if (x < 0) { + x = -x; + y = -y; + } + z = pio4 - x; + w = pio4lo - y; + x = z + w; + y = 0.0; + i = 1; + } else + i = 0; + z = x * x; + w = z * z; + r = T5 + w * (T9 + w * (T13 + w * (T17 + w * (T21 + + w * (T25 + w * (T29 + w * (T33 + + w * (T37 + w * (T41 + w * (T45 + w * (T49 + w * (T53 + + w * T57)))))))))))); + v = z * (T7 + w * (T11 + w * (T15 + w * (T19 + w * (T23 + + w * (T27 + w * (T31 + w * (T35 + + w * (T39 + w * (T43 + w * (T47 + w * (T51 + w * T55)))))))))))); + s = z * x; + r = y + z * (s * (r + v) + y); + r += T3 * s; + w = x + r; + if (i == 1) { + v = (long double) iy; + return osign * + (v - 2.0 * (x - (w * w / (w + v) - r))); + } + if (iy == 1) + return w; + else { + /* + * if allow error up to 2 ulp, simply return + * -1.0 / (x+r) here + */ + /* compute -1.0 / (x+r) accurately */ + long double a, t; + z = w; + z = z + 0x1p32 - 0x1p32; + v = r - (z - x); /* z+v = r+x */ + t = a = -1.0 / w; /* a = -1.0/w */ + t = t + 0x1p32 - 0x1p32; + s = 1.0 + t * z; + return t + a * (s + t * v); + } +} diff --git a/newlib/libm/ld128/s_cospil.c b/newlib/libm/ld128/s_cospil.c new file mode 100644 index 0000000..0ef3177 --- /dev/null +++ b/newlib/libm/ld128/s_cospil.c @@ -0,0 +1,108 @@ +/*- + * Copyright (c) 2017-2023 Steven G. Kargl + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * See ../src/s_cospi.c for implementation details. + */ + +#include "../ld/fpmath.h" +#include "math.h" +#include "../ld/math_private.h" + +/* + * pi_hi contains the leading 56 bits of a 169 bit approximation for pi. + */ +static const long double +pi_hi = 3.14159265358979322702026593105983920e+00L, +pi_lo = 1.14423774522196636802434264184180742e-17L; + +#include "k_cospil.h" +#include "k_sinpil.h" + +volatile static const double vzero = 0; + +long double +cospil(long double x) +{ + long double ai, ar, ax, c; + + ax = fabsl(x); + + if (ax <= 1) { + if (ax < 0.25) { + if (ax < 0x1p-60) { + if ((int)x == 0) + return (1); + } + return (__kernel_cospil(ax)); + } + + if (ax < 0.5) + c = __kernel_sinpil(0.5 - ax); + else if (ax < 0.75) { + if (ax == 0.5) + return (0); + c = -__kernel_sinpil(ax - 0.5); + } else + c = -__kernel_cospil(1 - ax); + return (c); + } + + if (ax < 0x1p112) { + /* Split ax = ai + ar with 0 <= ar < 1. */ + FFLOORL128(ax, ai, ar); + + if (ar < 0.5) { + if (ar < 0.25) + c = ar == 0 ? 1 : __kernel_cospil(ar); + else + c = __kernel_sinpil(0.5 - ar); + } else { + if (ar < 0.75) { + if (ar == 0.5) + return (0); + c = -__kernel_sinpil(ar - 0.5); + } else + c = -__kernel_cospil(1 - ar); + } + return (fmodl(ai, 2.L) == 0 ? c : -c); + } + + if (isinf(x) || isnan(x)) + return (vzero / vzero); + + /* + * For |x| >= 0x1p113, it is always an even integer, so return 1. + */ + if (ax >= 0x1p113) + return (1); + /* + * For 0x1p112 <= |x| < 0x1p113 need to determine if x is an even + * or odd integer to return 1 or -1. + */ + + return (fmodl(ax, 2.L) == 0 ? 1 : -1); +} diff --git a/newlib/libm/ld128/s_sinpil.c b/newlib/libm/ld128/s_sinpil.c new file mode 100644 index 0000000..30d1881 --- /dev/null +++ b/newlib/libm/ld128/s_sinpil.c @@ -0,0 +1,111 @@ +/*- + * Copyright (c) 2017-2023 Steven G. Kargl + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * See ../src/s_sinpi.c for implementation details. + */ + +#include "../ld/fpmath.h" +#include "math.h" +#include "../ld/math_private.h" + +/* + * pi_hi contains the leading 56 bits of a 169 bit approximation for pi. + */ +static const long double +pi_hi = 3.14159265358979322702026593105983920e+00L, +pi_lo = 1.14423774522196636802434264184180742e-17L; + +#include "k_cospil.h" +#include "k_sinpil.h" + +volatile static const double vzero = 0; + +long double +sinpil(long double x) +{ + long double ai, ar, ax, hi, lo, s, xhi, xlo; + + ax = fabsl(x); + + if (ax < 1) { + if (ax < 0.25) { + if (ax < 0x1p-60) { + if (x == 0) + return (x); + hi = (double)x; + hi *= 0x1p113L; + lo = x * 0x1p113L - hi; + s = (pi_lo + pi_hi) * lo + pi_lo * lo + + pi_hi * hi; + return (s * 0x1p-113L); + } + + s = __kernel_sinpil(ax); + return (x < 0 ? -s : s); + } + + if (ax < 0.5) + s = __kernel_cospil(0.5 - ax); + else if (ax < 0.75) + s = __kernel_cospil(ax - 0.5); + else + s = __kernel_sinpil(1 - ax); + return (x < 0 ? -s : s); + } + + if (ax < 0x1p112) { + /* Split ax = ai + ar with 0 <= ar < 1. */ + FFLOORL128(ax, ai, ar); + + if (ar == 0) { + s = 0; + } else { + if (ar < 0.5) { + if (ar <= 0.25) + s = __kernel_sinpil(ar); + else + s = __kernel_cospil(0.5 - ar); + } else { + if (ar < 0.75) + s = __kernel_cospil(ar - 0.5); + else + s = __kernel_sinpil(1 - ar); + } + + s = fmodl(ai, 2.L) == 0 ? s : -s; + } + return (x < 0 ? -s : s); + } + + if (isinf(x) || isnan(x)) + return (vzero / vzero); + + /* + * |x| >= 0x1p112 is always an integer, so return +-0. + */ + return (copysignl(0, x)); +} diff --git a/newlib/libm/ld80/Makefile.inc b/newlib/libm/ld80/Makefile.inc index 97fbacd..7bb20f7 100644 --- a/newlib/libm/ld80/Makefile.inc +++ b/newlib/libm/ld80/Makefile.inc @@ -1,8 +1,8 @@ %C%_lsrc = \ %D%/b_tgammal.c %D%/e_powl.c %D%/s_erfl.c %D%/s_exp2l.c \ %D%/s_expl.c %D%/s_logl.c %D%/s_sinpil.c %D%/s_cospil.c \ - %D%/invtrig.c %D%/e_lgammal_r.c %D%/k_cosl.c %D%/k_sinl.c - + %D%/invtrig.c %D%/e_lgammal_r.c %D%/k_cosl.c %D%/k_sinl.c \ + %D%/k_tanl.c libm_a_CFLAGS_%C% = -fbuiltin -fno-math-errno diff --git a/newlib/libm/ld80/k_tanl.c b/newlib/libm/ld80/k_tanl.c new file mode 100644 index 0000000..c55303f --- /dev/null +++ b/newlib/libm/ld80/k_tanl.c @@ -0,0 +1,119 @@ +/* + * ==================================================== + * Copyright 2004 Sun Microsystems, Inc. All Rights Reserved. + * Copyright (c) 2008 Steven G. Kargl, David Schultz, Bruce D. Evans. + * + * Permission to use, copy, modify, and distribute this + * software is freely granted, provided that this notice + * is preserved. + * ==================================================== + */ + +/* + * ld80 version of k_tan.c. See ../src/k_tan.c for most comments. + */ + +#include "math.h" +#include "../ld/math_private.h" + +/* + * Domain [-0.67434, 0.67434], range ~[-2.25e-22, 1.921e-22] + * |tan(x)/x - t(x)| < 2**-71.9 + * + * See k_cosl.c for more details about the polynomial. + */ +#if defined(__amd64__) || defined(__i386__) +/* Long double constants are slow on these arches, and broken on i386. */ +static const volatile double +T3hi = 0.33333333333333331, /* 0x15555555555555.0p-54 */ +T3lo = 1.8350121769317163e-17, /* 0x15280000000000.0p-108 */ +T5hi = 0.13333333333333336, /* 0x11111111111112.0p-55 */ +T5lo = 1.3051083651294260e-17, /* 0x1e180000000000.0p-109 */ +T7hi = 0.053968253968250494, /* 0x1ba1ba1ba1b827.0p-57 */ +T7lo = 3.1509625637859973e-18, /* 0x1d100000000000.0p-111 */ +pio4_hi = 0.78539816339744828, /* 0x1921fb54442d18.0p-53 */ +pio4_lo = 3.0628711372715500e-17, /* 0x11a80000000000.0p-107 */ +pio4lo_hi = -1.2541394031670831e-20, /* -0x1d9cceba3f91f2.0p-119 */ +pio4lo_lo = 6.1493048227390915e-37; /* 0x1a280000000000.0p-173 */ +#define T3 ((long double)T3hi + T3lo) +#define T5 ((long double)T5hi + T5lo) +#define T7 ((long double)T7hi + T7lo) +#define pio4 ((long double)pio4_hi + pio4_lo) +#define pio4lo ((long double)pio4lo_hi + pio4lo_lo) +#else +static const long double +T3 = 0.333333333333333333180L, /* 0xaaaaaaaaaaaaaaa5.0p-65 */ +T5 = 0.133333333333333372290L, /* 0x88888888888893c3.0p-66 */ +T7 = 0.0539682539682504975744L, /* 0xdd0dd0dd0dc13ba2.0p-68 */ +pio4 = 0.785398163397448309628L, /* 0xc90fdaa22168c235.0p-64 */ +pio4lo = -1.25413940316708300586e-20L; /* -0xece675d1fc8f8cbb.0p-130 */ +#endif + +static const double +T9 = 0.021869488536312216, /* 0x1664f4882cc1c2.0p-58 */ +T11 = 0.0088632355256619590, /* 0x1226e355c17612.0p-59 */ +T13 = 0.0035921281113786528, /* 0x1d6d3d185d7ff8.0p-61 */ +T15 = 0.0014558334756312418, /* 0x17da354aa3f96b.0p-62 */ +T17 = 0.00059003538700862256, /* 0x13559358685b83.0p-63 */ +T19 = 0.00023907843576635544, /* 0x1f56242026b5be.0p-65 */ +T21 = 0.000097154625656538905, /* 0x1977efc26806f4.0p-66 */ +T23 = 0.000038440165747303162, /* 0x14275a09b3ceac.0p-67 */ +T25 = 0.000018082171885432524, /* 0x12f5e563e5487e.0p-68 */ +T27 = 0.0000024196006108814377, /* 0x144c0d80cc6896.0p-71 */ +T29 = 0.0000078293456938132840, /* 0x106b59141a6cb3.0p-69 */ +T31 = -0.0000032609076735050182, /* -0x1b5abef3ba4b59.0p-71 */ +T33 = 0.0000023261313142559411; /* 0x13835436c0c87f.0p-71 */ + +long double +__kernel_tanl(long double x, long double y, int iy) { + long double z, r, v, w, s; + long double osign; + int i; + + iy = (iy == 1 ? -1 : 1); /* XXX recover original interface */ + osign = (x >= 0 ? 1.0 : -1.0); /* XXX slow, probably wrong for -0 */ + if (fabsl(x) >= 0.67434) { + if (x < 0) { + x = -x; + y = -y; + } + z = pio4 - x; + w = pio4lo - y; + x = z + w; + y = 0.0; + i = 1; + } else + i = 0; + z = x * x; + w = z * z; + r = T5 + w * (T9 + w * (T13 + w * (T17 + w * (T21 + + w * (T25 + w * (T29 + w * T33)))))); + v = z * (T7 + w * (T11 + w * (T15 + w * (T19 + w * (T23 + + w * (T27 + w * T31)))))); + s = z * x; + r = y + z * (s * (r + v) + y); + r += T3 * s; + w = x + r; + if (i == 1) { + v = (long double) iy; + return osign * + (v - 2.0 * (x - (w * w / (w + v) - r))); + } + if (iy == 1) + return w; + else { + /* + * if allow error up to 2 ulp, simply return + * -1.0 / (x+r) here + */ + /* compute -1.0 / (x+r) accurately */ + long double a, t; + z = w; + z = z + 0x1p32 - 0x1p32; + v = r - (z - x); /* z+v = r+x */ + t = a = -1.0 / w; /* a = -1.0/w */ + t = t + 0x1p32 - 0x1p32; + s = 1.0 + t * z; + return t + a * (s + t * v); + } +} diff --git a/newlib/libm/machine/xtensa/acinclude.m4 b/newlib/libm/machine/xtensa/acinclude.m4 index 4d242e0..fc5001d 100644 --- a/newlib/libm/machine/xtensa/acinclude.m4 +++ b/newlib/libm/machine/xtensa/acinclude.m4 @@ -2,7 +2,7 @@ AC_CACHE_CHECK([for XCHAL_HAVE_FP_SQRT], newlib_cv_xchal_have_fp_sqrt, [dnl AC_PREPROC_IFELSE([AC_LANG_PROGRAM( [[#define _LIBM // targ-include does not exist yet, use relative path -#include "../sys/xtensa/include/xtensa/config/core-isa.h" +#include "../machine/xtensa/include/xtensa/config/core-isa.h" #if (!XCHAL_HAVE_FP_SQRT) # error "Have not XCHAL_HAVE_FP_SQRT" #endif diff --git a/newlib/libm/math/ef_pow.c b/newlib/libm/math/ef_pow.c index 07b225f..8cf58db 100644 --- a/newlib/libm/math/ef_pow.c +++ b/newlib/libm/math/ef_pow.c @@ -50,8 +50,8 @@ lg2_h = 6.93145752e-01, /* 0x3f317200 */ lg2_l = 1.42860654e-06, /* 0x35bfbe8c */ ovt = 4.2995665694e-08, /* -(128-log2(ovfl+.5ulp)) */ cp = 9.6179670095e-01, /* 0x3f76384f =2/(3ln2) */ -cp_h = 9.6179199219e-01, /* 0x3f763800 =head of cp */ -cp_l = 4.7017383622e-06, /* 0x369dc3a0 =tail of cp_h */ +cp_h = 9.6191406250e-01f, /* 0x3f764000 =12b of cp */ +cp_l = -1.1736857402e-04f, /* 0xb8f623c6 =tail of cp_h */ ivln2 = 1.4426950216e+00, /* 0x3fb8aa3b =1/ln2 */ ivln2_h = 1.4426879883e+00, /* 0x3fb8aa00 =16b 1/ln2*/ ivln2_l = 7.0526075433e-06; /* 0x36eca570 =1/ln2 tail*/ @@ -173,7 +173,8 @@ ivln2_l = 7.0526075433e-06; /* 0x36eca570 =1/ln2 tail*/ GET_FLOAT_WORD(is,s_h); SET_FLOAT_WORD(s_h,is&0xfffff000); /* t_h=ax+bp[k] High */ - SET_FLOAT_WORD(t_h,((ix>>1)|0x20000000)+0x0040000+(k<<21)); + is = ((ix >> 1) & 0xfffff000U) | 0x20000000; + SET_FLOAT_WORD(t_h, is + 0x00400000 + (k << 21)); t_l = ax - (t_h-bp[k]); s_l = v*((u-s_h*t_h)-s_h*t_l); /* compute log(ax) */ @@ -241,7 +242,7 @@ ivln2_l = 7.0526075433e-06; /* 0x36eca570 =1/ln2 tail*/ } t = p_l+p_h; GET_FLOAT_WORD(is,t); - SET_FLOAT_WORD(t,is&0xfffff000); + SET_FLOAT_WORD(t,is&0xffff8000); u = t*lg2_h; v = (p_l-(t-p_h))*lg2+t*lg2_l; z = u+v; diff --git a/newlib/testsuite/lib/newlib.exp b/newlib/testsuite/lib/newlib.exp index 8b43d2e..f1df40e 100644 --- a/newlib/testsuite/lib/newlib.exp +++ b/newlib/testsuite/lib/newlib.exp @@ -66,13 +66,13 @@ proc newlib_target_compile { source dest type options } { [target_info needs_status_wrapper] != "0" && \ [info exists gluefile] } { lappend options "libs=$gluefile" - lappend options "LDFLAGS=$wrap_flags" + lappend options "ldflags=$wrap_flags" } if [string match $host_triplet $target_triplet] then { if [string match "i686-pc-linux-gnu" $host_triplet] then { lappend options "libs=$objdir/crt0.o -lc -lgcc" - lappend options "LDFLAGS=-nostdlib -L$objdir/.libs [newlib_include_flags]" + lappend options "ldflags=-nostdlib -L$objdir/.libs [newlib_include_flags]" } } diff --git a/winsup/cygwin/exceptions.cc b/winsup/cygwin/exceptions.cc index 28d0431..3195d57 100644 --- a/winsup/cygwin/exceptions.cc +++ b/winsup/cygwin/exceptions.cc @@ -665,7 +665,7 @@ exception::handle (EXCEPTION_RECORD *e, exception_list *frame, CONTEXT *in, siginfo_t si = {}; si.si_code = SI_KERNEL; /* Coerce win32 value to posix value. */ - switch (e->ExceptionCode) + switch ((NTSTATUS) e->ExceptionCode) { case STATUS_FLOAT_DIVIDE_BY_ZERO: si.si_signo = SIGFPE; diff --git a/winsup/cygwin/fhandler/console.cc b/winsup/cygwin/fhandler/console.cc index d4c3f10..dc43cd9 100644 --- a/winsup/cygwin/fhandler/console.cc +++ b/winsup/cygwin/fhandler/console.cc @@ -818,6 +818,7 @@ fhandler_console::set_input_mode (tty::cons_mode m, const termios *t, GetConsoleMode (p->input_handle, &oflags); DWORD flags = oflags & (ENABLE_EXTENDED_FLAGS | ENABLE_INSERT_MODE | ENABLE_QUICK_EDIT_MODE); + con.curr_input_mode = m; switch (m) { case tty::restore: @@ -867,6 +868,7 @@ fhandler_console::set_output_mode (tty::cons_mode m, const termios *t, if (con.orig_virtual_terminal_processing_mode) flags |= ENABLE_VIRTUAL_TERMINAL_PROCESSING; WaitForSingleObject (p->output_mutex, mutex_timeout); + con.curr_output_mode = m; switch (m) { case tty::restore: @@ -1109,12 +1111,12 @@ fhandler_console::bg_check (int sig, bool dontsignal) /* Setting-up console mode for cygwin app. This is necessary if the cygwin app and other non-cygwin apps are started simultaneously in the same process group. */ - if (sig == SIGTTIN) + if (sig == SIGTTIN && con.curr_input_mode != tty::cygwin) { set_input_mode (tty::cygwin, &tc ()->ti, get_handle_set ()); set_disable_master_thread (false, this); } - if (sig == SIGTTOU) + if (sig == SIGTTOU && con.curr_output_mode != tty::cygwin) set_output_mode (tty::cygwin, &tc ()->ti, get_handle_set ()); return fhandler_termios::bg_check (sig, dontsignal); @@ -2921,6 +2923,8 @@ fhandler_console::char_command (char c) } if (con.args[i] == 1) /* DECCKM */ con.cursor_key_app_mode = (c == 'h'); + if (con.args[i] == 9001) /* win32-input-mode (https://github.com/microsoft/terminal/blob/main/doc/specs/%234999%20-%20Improved%20keyboard%20handling%20in%20Conpty.md) */ + set_disable_master_thread (c == 'h', this); } /* Call fix_tab_position() if screen has been alternated. */ if (need_fix_tab_position) diff --git a/winsup/cygwin/fhandler/pipe.cc b/winsup/cygwin/fhandler/pipe.cc index ae43cbc..c686df6 100644 --- a/winsup/cygwin/fhandler/pipe.cc +++ b/winsup/cygwin/fhandler/pipe.cc @@ -13,6 +13,7 @@ details. */ #include "security.h" #include "path.h" #include "fhandler.h" +#include "select.h" #include "dtable.h" #include "cygheap.h" #include "pinfo.h" @@ -433,6 +434,7 @@ fhandler_pipe_fifo::raw_write (const void *ptr, size_t len) NTSTATUS status = STATUS_SUCCESS; IO_STATUS_BLOCK io; HANDLE evt; + bool short_write_once = false; if (!len) return 0; @@ -471,6 +473,7 @@ fhandler_pipe_fifo::raw_write (const void *ptr, size_t len) len1 = chunk; else len1 = (ULONG) left; + /* NtWriteFile returns success with # of bytes written == 0 if writing on a non-blocking pipe fails because the pipe buffer doesn't have sufficient space. @@ -498,9 +501,16 @@ fhandler_pipe_fifo::raw_write (const void *ptr, size_t len) (PVOID) ptr, len1, NULL, NULL); if (status == STATUS_PENDING) { - while (WAIT_TIMEOUT == - (waitret = cygwait (evt, (DWORD) 0, cw_cancel | cw_sig))) + do { + /* To allow constant reader_closed() checking even if the + signal has been set up with SA_RESTART, we're handling + the signal here --> cw_sig_eintr. */ + waitret = cygwait (evt, (DWORD) 0, cw_cancel | cw_sig_eintr); + /* Break out if no SA_RESTART. */ + if (waitret == WAIT_SIGNALED + && !_my_tls.call_signal_handler ()) + break; if (reader_closed ()) { CancelIo (get_handle ()); @@ -508,9 +518,20 @@ fhandler_pipe_fifo::raw_write (const void *ptr, size_t len) raise (SIGPIPE); goto out; } - else - cygwait (select_sem, 10); + /* Break out on completion */ + if (waitret == WAIT_OBJECT_0) + break; + /* If we got a timeout in the blocking case, and we already + did a short write, we got a signal in the previous loop. */ + if (waitret == WAIT_TIMEOUT && short_write_once) + { + waitret = WAIT_SIGNALED; + break; + } + cygwait (select_sem, 10, cw_cancel); } + /* Loop in case of blocking write or SA_RESTART */ + while (waitret == WAIT_TIMEOUT || waitret == WAIT_SIGNALED); /* If io.Status is STATUS_CANCELLED after CancelIo, IO has actually been cancelled and io.Information contains the number of bytes processed so far. @@ -524,13 +545,38 @@ fhandler_pipe_fifo::raw_write (const void *ptr, size_t len) status = STATUS_THREAD_CANCELED; else if (waitret == WAIT_SIGNALED) status = STATUS_THREAD_SIGNALED; + else if (waitret == WAIT_TIMEOUT && io.Status == STATUS_CANCELLED) + status = STATUS_SUCCESS; else status = io.Status; } - if (!is_nonblocking () || !NT_SUCCESS (status) || io.Information > 0 - || len <= PIPE_BUF) + if (status != STATUS_THREAD_SIGNALED && !NT_SUCCESS (status)) break; - len1 >>= 1; + if (io.Information > 0 || len <= PIPE_BUF || short_write_once) + break; + /* Independent of being blocking or non-blocking, if we're here, + the pipe has less space than requested. If the pipe is a + non-Cygwin pipe, just try the old strategy of trying a half + write. If the pipe has at + least PIPE_BUF bytes available, try to write all matching + PIPE_BUF sized blocks. If it's less than PIPE_BUF, try + the next less power of 2 bytes. This is not really the Linux + strategy because Linux is filling the pages of a pipe buffer + in a very implementation-defined way we can't emulate, but it + resembles it closely enough to get useful results. */ + ssize_t avail = pipe_data_available (-1, this, get_handle (), + PDA_WRITE); + if (avail < 1) /* error or pipe closed */ + break; + if (avail > len1) /* somebody read from the pipe */ + avail = len1; + if (avail == 1) /* 1 byte left or non-Cygwin pipe */ + len1 >>= 1; + else if (avail >= PIPE_BUF) + len1 = avail & ~(PIPE_BUF - 1); + else + len1 = 1 << (31 - __builtin_clzl (avail)); + short_write_once = true; } if (isclosed ()) /* A signal handler might have closed the fd. */ { @@ -560,7 +606,7 @@ fhandler_pipe_fifo::raw_write (const void *ptr, size_t len) else __seterrno_from_nt_status (status); - if (nbytes_now == 0) + if (nbytes_now == 0 || short_write_once) break; } out: diff --git a/winsup/cygwin/fhandler/proc.cc b/winsup/cygwin/fhandler/proc.cc index baf0cae..f1cd468 100644 --- a/winsup/cygwin/fhandler/proc.cc +++ b/winsup/cygwin/fhandler/proc.cc @@ -1021,14 +1021,14 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 9, "apic"); /* APIC enabled */ ftcprint (features1, 11, "sep"); /* sysenter/sysexit */ ftcprint (features1, 12, "mtrr"); /* memory type range registers */ - ftcprint (features1, 13, "pge"); /* page global extension */ + ftcprint (features1, 13, "pge"); /* page global enable */ ftcprint (features1, 14, "mca"); /* machine check architecture */ ftcprint (features1, 15, "cmov"); /* conditional move */ ftcprint (features1, 16, "pat"); /* page attribute table */ ftcprint (features1, 17, "pse36");/* 36 bit page size extensions */ ftcprint (features1, 18, "pn"); /* processor serial number */ ftcprint (features1, 19, "clflush"); /* clflush instruction */ - ftcprint (features1, 21, "dts"); /* debug store */ + ftcprint (features1, 21, "ds"); /* debug store */ ftcprint (features1, 22, "acpi"); /* ACPI via MSR */ ftcprint (features1, 23, "mmx"); /* multimedia extensions */ ftcprint (features1, 24, "fxsr"); /* fxsave/fxrstor */ @@ -1326,13 +1326,6 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 3, "epb"); /* energy perf bias */ } - /* cpuid 0x00000007:1 ebx */ - if (maxf >= 0x00000007) - { - cpuid (&unused, &features1, &unused, &unused, 0x00000007, 1); - - ftcprint (features1, 0, "intel_ppin"); /* Prot Proc Id No */ - } /* cpuid 0x00000010 ebx */ if (maxf >= 0x00000010) { @@ -1360,6 +1353,13 @@ format_proc_cpuinfo (void *, char *&destbuf) /* ftcprint (features1, 11, "pti");*//* Page Table Isolation reqd with Meltdown */ + /* cpuid 0x00000007:1 ebx */ + if (maxf >= 0x00000007) + { + cpuid (&unused, &features1, &unused, &unused, 0x00000007, 1); + + ftcprint (features1, 0, "intel_ppin"); /* Prot Proc Id No */ + } /* cpuid 0x00000010:2 ecx */ if (maxf >= 0x00000010) { @@ -1406,8 +1406,8 @@ format_proc_cpuinfo (void *, char *&destbuf) /* ftcprint (features1, 4, "rdpru"); *//* user level rd proc reg */ /* ftcprint (features1, 6, "mba"); *//* memory BW alloc */ /* ftcprint (features1, 9, "wbnoinvd"); *//* wbnoinvd instruction */ - ftcprint (features1, 12, "ibpb"); /* ind br pred barrier */ ftcprint (features1, 14, "ibrs"); /* ind br restricted spec */ + ftcprint (features1, 12, "ibpb"); /* ind br pred barrier */ ftcprint (features1, 15, "stibp"); /* 1 thread ind br pred */ ftcprint (features1, 16, "ibrs_enhanced"); /* ibrs_enhanced IBRS always on */ /* ftcprint (features1, 17, "stibp_always_on"); */ /* stibp always on */ @@ -1442,14 +1442,14 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 3, "bmi1"); /* bit manip ext group 1 */ ftcprint (features1, 4, "hle"); /* hardware lock elision */ ftcprint (features1, 5, "avx2"); /* AVX ext instructions */ -/* ftcprint (features1, 6, "fpdx"); */ /* "" FP data ptr upd on exc */ +/* ftcprint (features1, 6, "fdp_excptn_only"); *//* FP data ptr upd on exc */ ftcprint (features1, 7, "smep"); /* super mode exec prot */ ftcprint (features1, 8, "bmi2"); /* bit manip ext group 2 */ ftcprint (features1, 9, "erms"); /* enh rep movsb/stosb */ ftcprint (features1, 10, "invpcid"); /* inv proc context id */ ftcprint (features1, 11, "rtm"); /* restricted txnal mem */ ftcprint (features1, 12, "cqm"); /* cache QoS monitoring */ -/* ftcprint (features1, 13, "fpcsdsz"); */ /* "" zero FP cs/ds */ +/* ftcprint (features1, 13, "zero_fcs_fds");*//* zero FP CS/DS */ ftcprint (features1, 14, "mpx"); /* mem prot ext */ ftcprint (features1, 15, "rdt_a"); /* rsrc dir tech alloc */ ftcprint (features1, 16, "avx512f"); /* vec foundation */ @@ -1541,11 +1541,11 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 4, "rdpru"); /* user level rd proc reg */ /* ftcprint (features1, 6, "mba"); */ /* memory BW alloc */ ftcprint (features1, 9, "wbnoinvd"); /* wbnoinvd instruction */ -/* ftcprint (features1, 12, "ibpb" ); */ /* ind br pred barrier */ -/* ftcprint (features1, 14, "ibrs" ); */ /* ind br restricted spec */ -/* ftcprint (features1, 15, "stibp"); */ /* 1 thread ind br pred */ -/* ftcprint (features1, 16, "ibrs_enhanced"); */ /* ibrs_enhanced IBRS always on */ -/* ftcprint (features1, 17, "stibp_always_on"); */ /* stibp always on */ +/* ftcprint (features1, 12, "amd_ibpb" ); */ /* ind br pred barrier */ +/* ftcprint (features1, 14, "amd_ibrs" ); */ /* ind br restricted spec */ +/* ftcprint (features1, 15, "amd_stibp"); */ /* 1 thread ind br pred */ +/* ftcprint (features1, 16, "ibrs_enhanced");*//* ibrs_enhanced IBRS always on */ +/* ftcprint (features1, 17, "amd_stibp_always_on");*//* stibp always on */ /* ftcprint (features1, 18, "ibrs_pref"); */ /* ibrs_pref IBRS preferred */ ftcprint (features1, 23, "amd_ppin"); /* protected proc id no */ /* ftcprint (features1, 24, "ssbd"); */ /* spec store byp dis */ @@ -1572,6 +1572,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 9, "hwp_act_window"); /* HWP activity window */ ftcprint (features1, 10, "hwp_epp"); /* HWP energy perf pref */ ftcprint (features1, 11, "hwp_pkg_req"); /* HWP package level req */ +/* ftcprint (features1, 15, "hwp_highest_perf_change");*//* HWP highest perf change */ ftcprint (features1, 19, "hfi"); /* Hardware Feedback Interface */ } @@ -1593,6 +1594,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 13, "avic"); /* virt int control */ ftcprint (features1, 15, "v_vmsave_vmload"); /* virt vmsave vmload */ ftcprint (features1, 16, "vgif"); /* virt glb int flag */ + ftcprint (features1, 18, "x2avic"); /* virt x2apic */ ftcprint (features1, 20, "v_spec_ctrl"); /* virt spec ctrl support */ ftcprint (features1, 25, "vnmi"); /* virt NMI */ /* ftcprint (features1, 28, "svme_addr_chk"); *//* secure vmexit addr check */ @@ -1687,6 +1689,13 @@ format_proc_cpuinfo (void *, char *&destbuf) /* ftcprint (features2, 16, "vte"); *//* virtual transparent encryption */ } + /* cpuid 0x80000022 eax */ + if (is_amd && maxe >= 0x80000022) + { + cpuid (&features1, &unused, &unused, &unused, 0x80000022); + ftcprint (features1, 2, "amd_lbr_pmc_freeze ");/* AMD LBR & PMC Freeze */ + } + print ("\n"); bufptr += __small_sprintf (bufptr, "bogomips\t: %d.00\n", @@ -1744,16 +1753,17 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 12, "acc_power"); /* core power reporting */ /* ftcprint (features1, 13, "connstby"); */ /* connected standby */ /* ftcprint (features1, 14, "rapl"); */ /* running average power limit */ + + print ("\n"); } + print ("\n"); + if (orig_affinity_mask != 0) SetThreadGroupAffinity (GetCurrentThread (), &orig_group_affinity, NULL); - print ("\n"); } - print ("\n"); - destbuf = (char *) crealloc_abort (destbuf, bufptr - buf); memcpy (destbuf, buf, bufptr - buf); return bufptr - buf; @@ -2183,8 +2193,7 @@ format_proc_locale_proc (LPWSTR win_locale, DWORD info, LPARAM param) if (!(cp2 = wcschr (cp + 2, L'-'))) return TRUE; /* Otherwise, store in iso15924 */ - if (iso15924) - wcpcpy (wcpncpy (iso15924, cp, cp2 - cp), L";"); + wcpcpy (wcpncpy (iso15924, cp, cp2 - cp), L";"); } cp = wcsrchr (win_locale, L'-'); if (cp) diff --git a/winsup/cygwin/fhandler/socket.cc b/winsup/cygwin/fhandler/socket.cc index f7c5ff6..c0cef7d 100644 --- a/winsup/cygwin/fhandler/socket.cc +++ b/winsup/cygwin/fhandler/socket.cc @@ -86,7 +86,7 @@ struct __old_ifreq { int fhandler_socket::ioctl (unsigned int cmd, void *p) { - extern int get_ifconf (struct ifconf *ifc, int what); /* net.cc */ + extern int get_ifconf (struct ifconf *ifc, unsigned int what); /* net.cc */ int res; struct ifconf ifc, *ifcp; struct ifreq *ifrp; diff --git a/winsup/cygwin/fhandler/tape.cc b/winsup/cygwin/fhandler/tape.cc index 0e235f1..732fd1b 100644 --- a/winsup/cygwin/fhandler/tape.cc +++ b/winsup/cygwin/fhandler/tape.cc @@ -894,9 +894,9 @@ mtinfo_drive::get_status (HANDLE mt, struct mtget *get) } int -mtinfo_drive::set_options (HANDLE mt, int32_t options) +mtinfo_drive::set_options (HANDLE mt, uint32_t options) { - int32_t what = (options & MT_ST_OPTIONS); + uint32_t what = (options & MT_ST_OPTIONS); bool call_setparams = false; bool set; TAPE_SET_DRIVE_PARAMETERS sdp = diff --git a/winsup/cygwin/include/asm/socket.h b/winsup/cygwin/include/asm/socket.h index 9aeb889..276df3a 100644 --- a/winsup/cygwin/include/asm/socket.h +++ b/winsup/cygwin/include/asm/socket.h @@ -17,8 +17,8 @@ details. */ #define IOC_IN 0x80000000 /* copy in parameters */ #define _IO(x,y) (IOC_VOID|(x<<8)|y) -#define _IOR(x,y,t) (IOC_OUT|(((long)sizeof(t)&IOCPARM_MASK)<<16)|(x<<8)|y) -#define _IOW(x,y,t) (IOC_IN|(((long)sizeof(t)&IOCPARM_MASK)<<16)|(x<<8)|y) +#define _IOR(x,y,t) (IOC_OUT|((sizeof(t)&IOCPARM_MASK)<<16)|(x<<8)|y) +#define _IOW(x,y,t) (IOC_IN|((sizeof(t)&IOCPARM_MASK)<<16)|(x<<8)|y) #define SIOCATMARK _IOR('s', 7, long) /* at oob mark? */ #define FIONREAD _IOR('f', 127, long) /* get # bytes to read */ diff --git a/winsup/cygwin/include/getopt.h b/winsup/cygwin/include/getopt.h index c5af1ac..63e068b 100644 --- a/winsup/cygwin/include/getopt.h +++ b/winsup/cygwin/include/getopt.h @@ -85,4 +85,4 @@ int getopt_long_only (int, char *const *, const char *, const struct option *, i #endif /* __GETOPT_LONG_H__ */ #endif /* __UNISTD_GETOPT__ */ -#endif /*_INSIDE_NEWLIB*/ +#endif /*_LIBC */ diff --git a/winsup/cygwin/include/sys/dirent.h b/winsup/cygwin/include/sys/dirent.h index 6272ea3..983b69d 100644 --- a/winsup/cygwin/include/sys/dirent.h +++ b/winsup/cygwin/include/sys/dirent.h @@ -37,7 +37,7 @@ struct dirent char d_name[NAME_MAX + 1]; }; -#if __POSIX_VISIBLE >= 200809 +#if __POSIX_VISIBLE >= 202405 #define DT_FORCE_TYPE 0x01 /* Suggested by SUS Base Specs Issue 8 */ typedef __uint16_t reclen_t; @@ -54,13 +54,13 @@ struct posix_dent __uint32_t __d_internal1; char d_name[NAME_MAX + 1]; }; -#endif /* __POSIX_VISIBLE >= 200809 */ +#endif /* __POSIX_VISIBLE >= 202405 */ #define d_fileno d_ino /* BSD compatible definition */ typedef struct __DIR DIR; -#if __BSD_VISIBLE || __POSIX_VISIBLE >= 200809 +#if __BSD_VISIBLE || __POSIX_VISIBLE >= 202405 /* File types for `d_type'. */ enum { @@ -83,7 +83,7 @@ enum DT_WHT = 14 # define DT_WHT DT_WHT }; -#endif /* __BSD_VISIBLE || __POSIX_VISIBLE >= 200809 */ +#endif /* __BSD_VISIBLE || __POSIX_VISIBLE >= 202405 */ #if __BSD_VISIBLE /* Convert between stat structure types and directory types. */ diff --git a/winsup/cygwin/local_includes/fhandler.h b/winsup/cygwin/local_includes/fhandler.h index 8b02a2b..1c339cf 100644 --- a/winsup/cygwin/local_includes/fhandler.h +++ b/winsup/cygwin/local_includes/fhandler.h @@ -2171,6 +2171,8 @@ class dev_console char *cons_rapoi; bool cursor_key_app_mode; bool disable_master_thread; + tty::cons_mode curr_input_mode; + tty::cons_mode curr_output_mode; bool master_thread_suspended; int num_processed; /* Number of input events in the current input buffer already processed by cons_master_thread(). */ diff --git a/winsup/cygwin/local_includes/mtinfo.h b/winsup/cygwin/local_includes/mtinfo.h index 03aabbf..46f8b1b 100644 --- a/winsup/cygwin/local_includes/mtinfo.h +++ b/winsup/cygwin/local_includes/mtinfo.h @@ -101,7 +101,7 @@ class mtinfo_drive int set_compression (HANDLE mt, int32_t count); int set_blocksize (HANDLE mt, DWORD count); int get_status (HANDLE mt, struct mtget *get); - int set_options (HANDLE mt, int32_t options); + int set_options (HANDLE mt, uint32_t options); int async_wait (HANDLE mt, DWORD *bytes_written); public: diff --git a/winsup/cygwin/local_includes/ntdll.h b/winsup/cygwin/local_includes/ntdll.h index 7737ae5..4497fe5 100644 --- a/winsup/cygwin/local_includes/ntdll.h +++ b/winsup/cygwin/local_includes/ntdll.h @@ -23,7 +23,7 @@ extern GUID __cygwin_socket_guid; /* Custom Cygwin-only status codes. */ #define STATUS_THREAD_SIGNALED ((NTSTATUS)0xe0000001) #define STATUS_THREAD_CANCELED ((NTSTATUS)0xe0000002) -#define STATUS_ILLEGAL_DLL_PSEUDO_RELOCATION ((DWORD) 0xe0000269) +#define STATUS_ILLEGAL_DLL_PSEUDO_RELOCATION ((NTSTATUS) 0xe0000269) /* Simplify checking for a transactional error code. */ #define NT_TRANSACTIONAL_ERROR(s) \ diff --git a/winsup/cygwin/local_includes/select.h b/winsup/cygwin/local_includes/select.h index 4e20212..dea0233 100644 --- a/winsup/cygwin/local_includes/select.h +++ b/winsup/cygwin/local_includes/select.h @@ -139,4 +139,9 @@ public: extern "C" int cygwin_select (int , fd_set *, fd_set *, fd_set *, struct timeval *to); +ssize_t pipe_data_available (int, fhandler_base *, HANDLE, int); + +#define PDA_WRITE 0x01 +#define PDA_SELECT 0x02 + #endif /* _SELECT_H_ */ diff --git a/winsup/cygwin/local_includes/winlean.h b/winsup/cygwin/local_includes/winlean.h index 5bf1be2..62b651b 100644 --- a/winsup/cygwin/local_includes/winlean.h +++ b/winsup/cygwin/local_includes/winlean.h @@ -53,7 +53,10 @@ details. */ #define __undef_CRITICAL #endif +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Warray-bounds" #include <windows.h> +#pragma GCC diagnostic pop #include <wincrypt.h> #include <lmcons.h> #include <ntdef.h> diff --git a/winsup/cygwin/net.cc b/winsup/cygwin/net.cc index 08c584f..737e494 100644 --- a/winsup/cygwin/net.cc +++ b/winsup/cygwin/net.cc @@ -1912,7 +1912,7 @@ freeifaddrs (struct ifaddrs *ifp) } int -get_ifconf (struct ifconf *ifc, int what) +get_ifconf (struct ifconf *ifc, unsigned int what) { __try { diff --git a/winsup/cygwin/nlsfuncs.cc b/winsup/cygwin/nlsfuncs.cc index b32fecc..f57465a 100644 --- a/winsup/cygwin/nlsfuncs.cc +++ b/winsup/cygwin/nlsfuncs.cc @@ -319,8 +319,7 @@ locale_cmp (const void *a, const void *b) return strcmp (*la, *lb); } -/* Helper function to workaround reallocs which move blocks even if they shrink. - Cygwin's realloc is not doing this, but tcsh's, for instance. All lc_foo +/* Helper function to adjust pointers inside an lc_foo buffer. All lc_foo structures consist entirely of pointers so they are practically pointer arrays. What we do here is just treat the lc_foo pointers as char ** and rebase all char * pointers within, up to the given size of the structure. */ @@ -334,6 +333,28 @@ rebase_locale_buf (const void *ptrv, const void *ptrvend, const char *newbase, *ptrs += newbase - oldbase; } +/* Helper function to shrink an lc_foo buffer, adjusting pointers */ +static int +shrink_locale_buf (const void *ptrv, const void *ptrvend, + char *oldbase, const char *oldend, + char **result) +{ + size_t minsize = oldend - oldbase; + char *tmp = (char *) malloc (minsize); + if (!tmp) + { + free (oldbase); + return -1; + } + + memcpy (tmp, oldbase, minsize); + rebase_locale_buf (ptrv, ptrvend, tmp, oldbase, oldend); + free (oldbase); + + *result = tmp; + return 1; +} + static wchar_t * __getlocaleinfo (wchar_t *loc, LCTYPE type, char **ptr, size_t size) { @@ -687,19 +708,20 @@ __set_lc_time_from_win (const char *name, len += (wcslen (era->era_t_fmt) + 1) * sizeof (wchar_t); len += (wcslen (era->alt_digits) + 1) * sizeof (wchar_t); - /* Make sure data fits into the buffer */ + /* If necessary, grow the buffer to ensure data fits into it */ if (lc_time_ptr + len > lc_time_end) { len = lc_time_ptr + len - new_lc_time_buf; - char *tmp = (char *) realloc (new_lc_time_buf, len); + char *tmp = (char *) malloc (len); if (!tmp) era = NULL; else { - if (tmp != new_lc_time_buf) - rebase_locale_buf (_time_locale, _time_locale + 1, tmp, - new_lc_time_buf, lc_time_ptr); + memcpy (tmp, new_lc_time_buf, MAX_TIME_BUFFER_SIZE); + rebase_locale_buf (_time_locale, _time_locale + 1, tmp, + new_lc_time_buf, lc_time_ptr); lc_time_ptr = tmp + (lc_time_ptr - new_lc_time_buf); + free(new_lc_time_buf); new_lc_time_buf = tmp; lc_time_end = new_lc_time_buf + len; } @@ -752,17 +774,9 @@ __set_lc_time_from_win (const char *name, } } - char *tmp = (char *) realloc (new_lc_time_buf, lc_time_ptr - new_lc_time_buf); - if (!tmp) - { - free (new_lc_time_buf); - return -1; - } - if (tmp != new_lc_time_buf) - rebase_locale_buf (_time_locale, _time_locale + 1, tmp, - new_lc_time_buf, lc_time_ptr); - *lc_time_buf = tmp; - return 1; + return shrink_locale_buf(_time_locale, _time_locale + 1, + new_lc_time_buf, lc_time_ptr, + lc_time_buf); } /* Called from newlib's setlocale() via __ctype_load_locale() if category @@ -824,18 +838,9 @@ __set_lc_ctype_from_win (const char *name, } } - char *tmp = (char *) realloc (new_lc_ctype_buf, - lc_ctype_ptr - new_lc_ctype_buf); - if (!tmp) - { - free (new_lc_ctype_buf); - return -1; - } - if (tmp != new_lc_ctype_buf) - rebase_locale_buf (_ctype_locale, _ctype_locale + 1, tmp, - new_lc_ctype_buf, lc_ctype_ptr); - *lc_ctype_buf = tmp; - return 1; + return shrink_locale_buf(_ctype_locale, _ctype_locale + 1, + new_lc_ctype_buf, lc_ctype_ptr, + lc_ctype_buf); } /* Called from newlib's setlocale() via __numeric_load_locale() if category @@ -900,18 +905,9 @@ __set_lc_numeric_from_win (const char *name, _numeric_locale->codeset = lc_numeric_ptr; lc_numeric_ptr = stpcpy (lc_numeric_ptr, charset) + 1; - char *tmp = (char *) realloc (new_lc_numeric_buf, - lc_numeric_ptr - new_lc_numeric_buf); - if (!tmp) - { - free (new_lc_numeric_buf); - return -1; - } - if (tmp != new_lc_numeric_buf) - rebase_locale_buf (_numeric_locale, _numeric_locale + 1, tmp, - new_lc_numeric_buf, lc_numeric_ptr); - *lc_numeric_buf = tmp; - return 1; + return shrink_locale_buf(_numeric_locale, _numeric_locale + 1, + new_lc_numeric_buf, lc_numeric_ptr, + lc_numeric_buf); } /* Called from newlib's setlocale() via __monetary_load_locale() if category @@ -1039,18 +1035,9 @@ __set_lc_monetary_from_win (const char *name, _monetary_locale->codeset = lc_monetary_ptr; lc_monetary_ptr = stpcpy (lc_monetary_ptr, charset) + 1; - char *tmp = (char *) realloc (new_lc_monetary_buf, - lc_monetary_ptr - new_lc_monetary_buf); - if (!tmp) - { - free (new_lc_monetary_buf); - return -1; - } - if (tmp != new_lc_monetary_buf) - rebase_locale_buf (_monetary_locale, _monetary_locale + 1, tmp, - new_lc_monetary_buf, lc_monetary_ptr); - *lc_monetary_buf = tmp; - return 1; + return shrink_locale_buf(_monetary_locale, _monetary_locale + 1, + new_lc_monetary_buf, lc_monetary_ptr, + lc_monetary_buf); } extern "C" int diff --git a/winsup/cygwin/pinfo.cc b/winsup/cygwin/pinfo.cc index 7f1f41d..e31a67d 100644 --- a/winsup/cygwin/pinfo.cc +++ b/winsup/cygwin/pinfo.cc @@ -118,7 +118,7 @@ pinfo_init (char **envp, int envc) DWORD pinfo::status_exit (DWORD x) { - switch (x) + switch ((NTSTATUS) x) { case STATUS_DLL_NOT_FOUND: { diff --git a/winsup/cygwin/release/3.5.4 b/winsup/cygwin/release/3.5.4 index c95ef46..90c324b 100644 --- a/winsup/cygwin/release/3.5.4 +++ b/winsup/cygwin/release/3.5.4 @@ -22,3 +22,9 @@ Fixes: - Fix conflict on shared name in console between sessions. Addresses: https://cygwin.com/pipermail/cygwin/2024-April/255893.html + +- Fix an off-by-one in LC_MESSAGE wide character data. + Addresses: https://sourceware.org/pipermail/newlib/2024/021271.html + +- Improve write pipe behaviour in case the pipe buffer is about to be + filled up. diff --git a/winsup/cygwin/release/3.5.5 b/winsup/cygwin/release/3.5.5 new file mode 100644 index 0000000..904119a --- /dev/null +++ b/winsup/cygwin/release/3.5.5 @@ -0,0 +1,9 @@ +Fixes: +------ + +- Fix undesired behaviour of console master thread in win32-input-mode + which is supported by Windows Termainal. + Addresses: https://cygwin.com/pipermail/cygwin/2024-August/256380.html + +- Fix a regression in 3.5.4 that writing to pipe extremely slows down. + Addresses: https://cygwin.com/pipermail/cygwin/2024-August/256398.html diff --git a/winsup/cygwin/select.cc b/winsup/cygwin/select.cc index 725aab9..bc02c3f 100644 --- a/winsup/cygwin/select.cc +++ b/winsup/cygwin/select.cc @@ -584,14 +584,15 @@ no_verify (select_record *, fd_set *, fd_set *, fd_set *) return 0; } -static int -pipe_data_available (int fd, fhandler_base *fh, HANDLE h, bool writing) +ssize_t +pipe_data_available (int fd, fhandler_base *fh, HANDLE h, int flags) { if (fh->get_device () == FH_PIPER) { DWORD nbytes_in_pipe; - if (!writing && PeekNamedPipe (h, NULL, 0, NULL, &nbytes_in_pipe, NULL)) - return nbytes_in_pipe > 0; + if (!(flags & PDA_WRITE) + && PeekNamedPipe (h, NULL, 0, NULL, &nbytes_in_pipe, NULL)) + return nbytes_in_pipe; return -1; } @@ -609,9 +610,17 @@ pipe_data_available (int fd, fhandler_base *fh, HANDLE h, bool writing) access on the write end. */ select_printf ("fd %d, %s, NtQueryInformationFile failed, status %y", fd, fh->get_name (), status); - return writing ? 1 : -1; + switch (flags) + { + case PDA_WRITE: + return 1; + case PDA_SELECT | PDA_WRITE: + return PIPE_BUF; + default: + return -1; + } } - if (writing) + if (flags & PDA_WRITE) { /* If there is anything available in the pipe buffer then signal that. This means that a pipe could still block since you could @@ -638,20 +647,26 @@ pipe_data_available (int fd, fhandler_base *fh, HANDLE h, bool writing) /* Note: Do not use NtQueryInformationFile() for query_hdl because NtQueryInformationFile() seems to interfere with reading pipes in non-cygwin apps. Instead, use PeekNamedPipe() here. */ + /* Note 2: we return the number of available bytes. Select for writing + returns writable *only* if at least PIPE_BUF bytes are left in the + buffer. If we can't fetch the real number of available bytes, the + number of bytes returned depends on the caller. For select we return + PIPE_BUF to fake writability, for writing we return 1 to allow + handling this fact. */ if (fh->get_device () == FH_PIPEW && fpli.WriteQuotaAvailable == 0) { HANDLE query_hdl = ((fhandler_pipe *) fh)->get_query_handle (); if (!query_hdl) query_hdl = ((fhandler_pipe *) fh)->temporary_query_hdl (); - if (!query_hdl) - return 1; /* We cannot know actual write pipe space. */ + if (!query_hdl) /* We cannot know actual write pipe space. */ + return (flags & PDA_SELECT) ? PIPE_BUF : 1; DWORD nbytes_in_pipe; BOOL res = PeekNamedPipe (query_hdl, NULL, 0, NULL, &nbytes_in_pipe, NULL); if (!((fhandler_pipe *) fh)->get_query_handle ()) CloseHandle (query_hdl); /* Close temporary query_hdl */ - if (!res) - return 1; + if (!res) /* We cannot know actual write pipe space. */ + return (flags & PDA_SELECT) ? PIPE_BUF : 1; fpli.WriteQuotaAvailable = fpli.InboundQuota - nbytes_in_pipe; } if (fpli.WriteQuotaAvailable > 0) @@ -659,7 +674,7 @@ pipe_data_available (int fd, fhandler_base *fh, HANDLE h, bool writing) paranoid_printf ("fd %d, %s, write: size %u, avail %u", fd, fh->get_name (), fpli.InboundQuota, fpli.WriteQuotaAvailable); - return 1; + return fpli.WriteQuotaAvailable; } /* TODO: Buffer really full or non-Cygwin reader? */ } @@ -667,7 +682,7 @@ pipe_data_available (int fd, fhandler_base *fh, HANDLE h, bool writing) { paranoid_printf ("fd %d, %s, read avail %u", fd, fh->get_name (), fpli.ReadDataAvailable); - return 1; + return fpli.ReadDataAvailable; } if (fpli.NamedPipeState & FILE_PIPE_CLOSING_STATE) return -1; @@ -715,10 +730,10 @@ peek_pipe (select_record *s, bool from_select) gotone = s->read_ready = true; goto out; } - int n = pipe_data_available (s->fd, fh, h, false); + ssize_t n = pipe_data_available (s->fd, fh, h, PDA_SELECT); /* On PTY masters, check if input from the echo pipe is available. */ if (n == 0 && fh->get_echo_handle ()) - n = pipe_data_available (s->fd, fh, fh->get_echo_handle (), false); + n = pipe_data_available (s->fd, fh, fh->get_echo_handle (), PDA_SELECT); if (n < 0) { @@ -759,9 +774,9 @@ out: gotone += s->except_ready = true; return gotone; } - int n = pipe_data_available (s->fd, fh, h, true); + ssize_t n = pipe_data_available (s->fd, fh, h, PDA_SELECT | PDA_WRITE); select_printf ("write: %s, n %d", fh->get_name (), n); - gotone += s->write_ready = n; + gotone += s->write_ready = (n >= PIPE_BUF); if (n < 0 && s->except_selected) gotone += s->except_ready = true; } @@ -972,9 +987,10 @@ peek_fifo (select_record *s, bool from_select) out: if (s->write_selected) { - int n = pipe_data_available (s->fd, fh, fh->get_handle (), true); + ssize_t n = pipe_data_available (s->fd, fh, fh->get_handle (), + PDA_SELECT | PDA_WRITE); select_printf ("write: %s, n %d", fh->get_name (), n); - gotone += s->write_ready = n; + gotone += s->write_ready = (n >= PIPE_BUF); if (n < 0 && s->except_selected) gotone += s->except_ready = true; } @@ -1398,9 +1414,9 @@ out: HANDLE h = ptys->get_output_handle (); if (s->write_selected) { - int n = pipe_data_available (s->fd, fh, h, true); + ssize_t n = pipe_data_available (s->fd, fh, h, PDA_SELECT | PDA_WRITE); select_printf ("write: %s, n %d", fh->get_name (), n); - gotone += s->write_ready = n; + gotone += s->write_ready = (n >= PIPE_BUF); if (n < 0 && s->except_selected) gotone += s->except_ready = true; } diff --git a/winsup/cygwin/sigproc.cc b/winsup/cygwin/sigproc.cc index 86e4e60..99fa3c3 100644 --- a/winsup/cygwin/sigproc.cc +++ b/winsup/cygwin/sigproc.cc @@ -1082,7 +1082,7 @@ child_info::proc_retry (HANDLE h) if (!exit_code) return EXITCODE_OK; sigproc_printf ("exit_code %y", exit_code); - switch (exit_code) + switch ((NTSTATUS) exit_code) { case STILL_ACTIVE: /* shouldn't happen */ sigproc_printf ("STILL_ACTIVE? How'd we get here?"); |