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| author | Keith Packard <keithp@keithp.com> | 2020-01-20 22:46:36 -0800 |
|---|---|---|
| committer | Corinna Vinschen <corinna@vinschen.de> | 2020-01-21 10:28:35 +0100 |
| commit | 5377a847764461493c620644f6530892344d1cdd (patch) | |
| tree | fa3d943c9c83db67a13dc29e442a8b63e147b31e /winsup/cygwin/tty.cc | |
| parent | 8e74c7119fb7f95662bb4986570a98496f259400 (diff) | |
| download | newlib-5377a847764461493c620644f6530892344d1cdd.zip newlib-5377a847764461493c620644f6530892344d1cdd.tar.gz newlib-5377a847764461493c620644f6530892344d1cdd.tar.bz2 | |
riscv: Map between ieeefp.h exception bits and RISC-V FCSR bits
If we had architecture-specific exception bits, we could just set them
to match the processor, but instead ieeefp.h is shared by all targets
so we need to map between the public values and the register contents.
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'winsup/cygwin/tty.cc')
0 files changed, 0 insertions, 0 deletions