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authorCorinna Vinschen <corinna@vinschen.de>2014-08-11 12:03:18 +0000
committerCorinna Vinschen <corinna@vinschen.de>2014-08-11 12:03:18 +0000
commit5b4e301b36c6d22a18b16eb544a0305ee94f28fc (patch)
tree910d2756ad221752bcb9f81fdd04c3a3561341ca /winsup/cygwin/cpuid.h
parentf9c956a1ff9f636a6a2cc201d1996231231a7c77 (diff)
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* cpuid.h: Add missing copyright header. Fix formatting. Use uint32_t
instead of unsigned throughout. Change functions to static inline and always inline. (cpuid): Add parameter to set ecx, allowing to request extended CPUID info. * fhandler_proc.cc (format_proc_cpuinfo): Use uint32_t instead of unsigned throughout. Add fake decimal places to MHz info. Handle more feature flags. * fhandler_random.cc (fhandler_dev_random::write): Allow up to 4K input to add entropy. * syscalls.cc: Drop including cpuid.h.
Diffstat (limited to 'winsup/cygwin/cpuid.h')
-rw-r--r--winsup/cygwin/cpuid.h86
1 files changed, 48 insertions, 38 deletions
diff --git a/winsup/cygwin/cpuid.h b/winsup/cygwin/cpuid.h
index ff35322..7053b4d 100644
--- a/winsup/cygwin/cpuid.h
+++ b/winsup/cygwin/cpuid.h
@@ -1,54 +1,64 @@
+/* cpuid.h: Define cpuid instruction
+
+ Copyright 2003, 2012, 2014 Red Hat, Inc.
+
+This file is part of Cygwin.
+
+This software is a copyrighted work licensed under the terms of the
+Cygwin license. Please consult the file "CYGWIN_LICENSE" for
+details. */
+
#ifndef CPUID_H
#define CPUID_H
-extern inline void
-cpuid (unsigned *a, unsigned *b, unsigned *c, unsigned *d, unsigned in)
+static inline void __attribute ((always_inline))
+cpuid (uint32_t *a, uint32_t *b, uint32_t *c, uint32_t *d, uint32_t ain,
+ uint32_t cin = 0)
{
- asm ("cpuid"
- : "=a" (*a),
- "=b" (*b),
- "=c" (*c),
- "=d" (*d)
- : "a" (in));
+ asm volatile ("cpuid"
+ : "=a" (*a), "=b" (*b), "=c" (*c), "=d" (*d)
+ : "a" (ain), "c" (cin));
}
#ifdef __x86_64__
-extern inline bool
-can_set_flag (register unsigned long flag)
+static inline bool __attribute ((always_inline))
+can_set_flag (register uint32_t long flag)
{
- register unsigned long r1, r2;
- asm("pushfq\n"
- "popq %0\n"
- "movq %0, %1\n"
- "xorq %2, %0\n"
- "pushq %0\n"
- "popfq\n"
- "pushfq\n"
- "popq %0\n"
- "pushq %1\n"
- "popfq\n"
- : "=&r" (r1), "=&r" (r2)
- : "ir" (flag)
+ register uint32_t long r1, r2;
+
+ asm volatile ("pushfq\n"
+ "popq %0\n"
+ "movq %0, %1\n"
+ "xorq %2, %0\n"
+ "pushq %0\n"
+ "popfq\n"
+ "pushfq\n"
+ "popq %0\n"
+ "pushq %1\n"
+ "popfq\n"
+ : "=&r" (r1), "=&r" (r2)
+ : "ir" (flag)
);
return ((r1 ^ r2) & flag) != 0;
}
#else
-extern inline bool
-can_set_flag (register unsigned flag)
+static inline bool __attribute ((always_inline))
+can_set_flag (register uint32_t flag)
{
- register unsigned r1, r2;
- asm("pushfl\n"
- "popl %0\n"
- "movl %0, %1\n"
- "xorl %2, %0\n"
- "pushl %0\n"
- "popfl\n"
- "pushfl\n"
- "popl %0\n"
- "pushl %1\n"
- "popfl\n"
- : "=&r" (r1), "=&r" (r2)
- : "ir" (flag)
+ register uint32_t r1, r2;
+
+ asm volatile ("pushfl\n"
+ "popl %0\n"
+ "movl %0, %1\n"
+ "xorl %2, %0\n"
+ "pushl %0\n"
+ "popfl\n"
+ "pushfl\n"
+ "popl %0\n"
+ "pushl %1\n"
+ "popfl\n"
+ : "=&r" (r1), "=&r" (r2)
+ : "ir" (flag)
);
return ((r1 ^ r2) & flag) != 0;
}