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authorJeff Law <law@redhat.com>1999-09-23 13:10:07 +0000
committerJeff Law <law@redhat.com>1999-09-23 13:10:07 +0000
commitf026123d83b4c981efa359d251903775c2fb10ab (patch)
tree1d2e98ecd73c3752f69f705ff3e17201743a684a
parent27421fd0849ed8791ef61e69ea8f0f55debaee0a (diff)
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* hppa.h: Update comments about character usage.
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/hppa.h5
2 files changed, 8 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index c73b592..f9e6c2e 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * hppa.h: Update comments about character usage.
+
Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
* hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h
index 0900a0d..a9a834a 100644
--- a/include/opcode/hppa.h
+++ b/include/opcode/hppa.h
@@ -107,7 +107,10 @@ Also these:
31-p
~ 6 bit shift count at 20,22:26 encoded as 63-~.
P 5 bit bit position at 26
+ q 6 bit bit position at 20,22:26
T 5 bit field length at 31 (encoded as 32-T)
+ % 6 bit field length at 23,27:31 (variable extract/deposit)
+ | 6 bit field length at 19,27:31 (fixed extract/deposit)
A 13 bit immediate at 18 (to support the BREAK instruction)
^ like b, but describes a control register
! sar (cr11) register
@@ -222,7 +225,7 @@ Condition operands all have '?' as the prefix:
?U 64 bit unit conditions
Floating point registers all have 'f' as a prefix:
-
+
ft target register at 31
fT target register with L/R halves at 31
fa operand 1 register at 10