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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
define i32 @test(i32 %mul) {
; CHECK-LABEL: define i32 @test(
; CHECK-SAME: i32 [[MUL:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[H:%.*]] = alloca [4 x i32], align 16
; CHECK-NEXT: [[ADD:%.*]] = add i32 0, 0
; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[ADD]], 0
; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @f1(i32 [[ADD4]])
; CHECK-NEXT: [[MUL1:%.*]] = shl i32 0, 1
; CHECK-NEXT: [[ADD5:%.*]] = add i32 [[CALL]], [[MUL1]]
; CHECK-NEXT: store i32 [[ADD5]], ptr [[H]], align 16
; CHECK-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr i8, ptr [[H]], i64 4
; CHECK-NEXT: [[ADD6:%.*]] = add i32 0, 0
; CHECK-NEXT: [[ADD7:%.*]] = add i32 [[ADD6]], [[MUL]]
; CHECK-NEXT: [[ADD9:%.*]] = add i32 [[ADD7]], [[ADD4]]
; CHECK-NEXT: store i32 [[ADD9]], ptr [[ARRAYINIT_ELEMENT]], align 4
; CHECK-NEXT: [[ARRAYINIT_ELEMENT10:%.*]] = getelementptr i8, ptr [[H]], i64 8
; CHECK-NEXT: [[ADD11:%.*]] = or i32 [[ADD]], 0
; CHECK-NEXT: [[ADD12:%.*]] = add i32 [[ADD11]], [[ADD4]]
; CHECK-NEXT: store i32 [[ADD12]], ptr [[ARRAYINIT_ELEMENT10]], align 8
; CHECK-NEXT: [[ARRAYINIT_ELEMENT13:%.*]] = getelementptr i8, ptr [[H]], i64 12
; CHECK-NEXT: store i32 0, ptr [[ARRAYINIT_ELEMENT13]], align 4
; CHECK-NEXT: ret i32 0
;
entry:
%h = alloca [4 x i32], align 16
%add = add i32 0, 0
%add4 = add i32 %add, 0
%call = tail call i32 @f1(i32 %add4)
%mul1 = shl i32 0, 1
%add5 = add i32 %call, %mul1
store i32 %add5, ptr %h, align 16
%arrayinit.element = getelementptr i8, ptr %h, i64 4
%add6 = add i32 0, 0
%add7 = add i32 %add6, %mul
%add9 = add i32 %add7, %add4
store i32 %add9, ptr %arrayinit.element, align 4
%arrayinit.element10 = getelementptr i8, ptr %h, i64 8
%add11 = or i32 %add, 0
%add12 = add i32 %add11, %add4
store i32 %add12, ptr %arrayinit.element10, align 8
%arrayinit.element13 = getelementptr i8, ptr %h, i64 12
store i32 0, ptr %arrayinit.element13, align 4
ret i32 0
}
declare i32 @f1(i32)
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