llvm/test/CodeGen/SystemZ/int-abs-03.ll


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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; Test 128-bit absolute value in vector registers on z17
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s

define i128 @f1(i128 %src) {
; CHECK-LABEL: f1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vl %v0, 0(%r3), 3
; CHECK-NEXT:    vlpq %v0, %v0
; CHECK-NEXT:    vst %v0, 0(%r2), 3
; CHECK-NEXT:    br %r14
  %cmp = icmp slt i128 %src, 0
  %neg = sub i128 0, %src
  %res = select i1 %cmp, i128 %neg, i128 %src
  ret i128 %res
}