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path: root/llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-frame-offset-reg.mir

blob: e189e4dcb2f4fa8ac4fe353e6abfea0450e2307b (plain)

# RUN: not llc -mtriple=amdgcn -run-pass none -filetype=null %s 2>&1 | FileCheck %s
---
name: empty_frame_offset_reg
machineFunctionInfo:
  frameOffsetReg:  ''
# CHECK: :[[@LINE-1]]:{{[0-9]+}}: expected a named register
body:             |
  bb.0:

    S_ENDPGM
...