aboutsummaryrefslogtreecommitdiff
path: root/llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
blob: 66a8b424b5763c83bc476527201ef735f6ccb3da (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -O1 %s -o - | FileCheck %s

define amdgpu_ps <4 x float> @caller(ptr %ptr) {
; CHECK-LABEL: caller:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    flat_load_dword v1, v[0:1]
; CHECK-NEXT:    s_mov_b32 s0, 0
; CHECK-NEXT:    s_mov_b32 s1, 0
; CHECK-NEXT:    s_mov_b32 s2, 0
; CHECK-NEXT:    s_mov_b32 s5, fn@abs32@hi
; CHECK-NEXT:    s_mov_b32 s4, fn@abs32@lo
; CHECK-NEXT:    s_mov_b64 s[8:9], 0
; CHECK-NEXT:    v_mov_b32_e32 v0, 0
; CHECK-NEXT:    s_mov_b32 s3, 0
; CHECK-NEXT:    v_mov_b32_e32 v2, 0
; CHECK-NEXT:    s_mov_b32 s32, 0
; CHECK-NEXT:    s_swappc_b64 s[30:31], s[4:5]
; CHECK-NEXT:    ; return to shader part epilog
  %L = load i32, ptr %ptr, align 4
  %R = call <4 x float> @fn(<4 x i32> zeroinitializer, i32 0, i32 %L, i32 0)
  ret <4 x float> %R
}

declare hidden <4 x float> @fn(<4 x i32> inreg, i32, i32, i32)