1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64 -o - %s -mattr=+neon,+fullfp16 | FileCheck %s
define double @t1(double %x) {
; CHECK-LABEL: t1:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs d0, d0
; CHECK-NEXT: scvtf d0, d0
; CHECK-NEXT: ret
entry:
%conv = fptosi double %x to i64
%conv1 = sitofp i64 %conv to double
ret double %conv1
}
define float @t2(float %x) {
; CHECK-LABEL: t2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs s0, s0
; CHECK-NEXT: scvtf s0, s0
; CHECK-NEXT: ret
entry:
%conv = fptosi float %x to i32
%conv1 = sitofp i32 %conv to float
ret float %conv1
}
define half @t3(half %x) {
; CHECK-LABEL: t3:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs h0, h0
; CHECK-NEXT: scvtf h0, h0
; CHECK-NEXT: ret
entry:
%conv = fptosi half %x to i32
%conv1 = sitofp i32 %conv to half
ret half %conv1
}
define double @t4(double %x) {
; CHECK-LABEL: t4:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu d0, d0
; CHECK-NEXT: ucvtf d0, d0
; CHECK-NEXT: ret
entry:
%conv = fptoui double %x to i64
%conv1 = uitofp i64 %conv to double
ret double %conv1
}
define float @t5(float %x) {
; CHECK-LABEL: t5:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu s0, s0
; CHECK-NEXT: ucvtf s0, s0
; CHECK-NEXT: ret
entry:
%conv = fptoui float %x to i32
%conv1 = uitofp i32 %conv to float
ret float %conv1
}
define half @t6(half %x) {
; CHECK-LABEL: t6:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu h0, h0
; CHECK-NEXT: ucvtf h0, h0
; CHECK-NEXT: ret
entry:
%conv = fptoui half %x to i32
%conv1 = uitofp i32 %conv to half
ret half %conv1
}
define bfloat @t7(bfloat %x) {
; CHECK-LABEL: t7:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h0 killed $h0 def $d0
; CHECK-NEXT: mov w8, #32767 // =0x7fff
; CHECK-NEXT: shll v0.4s, v0.4h, #16
; CHECK-NEXT: fcvtzs w9, s0
; CHECK-NEXT: scvtf d0, w9
; CHECK-NEXT: fcvtxn s0, d0
; CHECK-NEXT: fmov w9, s0
; CHECK-NEXT: ubfx w10, w9, #16, #1
; CHECK-NEXT: add w8, w9, w8
; CHECK-NEXT: add w8, w10, w8
; CHECK-NEXT: lsr w8, w8, #16
; CHECK-NEXT: fmov s0, w8
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
; CHECK-NEXT: ret
entry:
%conv = fptosi bfloat %x to i32
%conv1 = sitofp i32 %conv to bfloat
ret bfloat %conv1
}
define bfloat @t8(bfloat %x) {
; CHECK-LABEL: t8:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h0 killed $h0 def $d0
; CHECK-NEXT: mov w8, #32767 // =0x7fff
; CHECK-NEXT: shll v0.4s, v0.4h, #16
; CHECK-NEXT: fcvtzu w9, s0
; CHECK-NEXT: ucvtf d0, w9
; CHECK-NEXT: fcvtxn s0, d0
; CHECK-NEXT: fmov w9, s0
; CHECK-NEXT: ubfx w10, w9, #16, #1
; CHECK-NEXT: add w8, w9, w8
; CHECK-NEXT: add w8, w10, w8
; CHECK-NEXT: lsr w8, w8, #16
; CHECK-NEXT: fmov s0, w8
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
; CHECK-NEXT: ret
entry:
%conv = fptoui bfloat %x to i32
%conv1 = uitofp i32 %conv to bfloat
ret bfloat %conv1
}
define i64 @testu_f64_multiuse(double %x) {
; CHECK-LABEL: testu_f64_multiuse:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu x8, d0
; CHECK-NEXT: ucvtf d1, x8
; CHECK-NEXT: fcmp d0, d1
; CHECK-NEXT: csel x0, x8, xzr, eq
; CHECK-NEXT: ret
entry:
%conv = fptoui double %x to i64
%conv1 = uitofp i64 %conv to double
%cmp = fcmp oeq double %x, %conv1
%cond = select i1 %cmp, i64 %conv, i64 0
ret i64 %cond
}
define i32 @testu_f32_multiuse(float %x) {
; CHECK-LABEL: testu_f32_multiuse:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu w8, s0
; CHECK-NEXT: ucvtf s1, w8
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: csel w0, w8, wzr, eq
; CHECK-NEXT: ret
entry:
%conv = fptoui float %x to i32
%conv1 = uitofp i32 %conv to float
%cmp = fcmp oeq float %x, %conv1
%cond = select i1 %cmp, i32 %conv, i32 0
ret i32 %cond
}
define i32 @testu_f16_multiuse(half %x) {
; CHECK-LABEL: testu_f16_multiuse:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu w8, h0
; CHECK-NEXT: ucvtf h1, w8
; CHECK-NEXT: fcmp h0, h1
; CHECK-NEXT: csel w0, w8, wzr, eq
; CHECK-NEXT: ret
entry:
%conv = fptoui half %x to i32
%conv1 = uitofp i32 %conv to half
%cmp = fcmp oeq half %x, %conv1
%cond = select i1 %cmp, i32 %conv, i32 0
ret i32 %cond
}
define i64 @tests_f64_multiuse(double %x) {
; CHECK-LABEL: tests_f64_multiuse:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs x8, d0
; CHECK-NEXT: scvtf d1, x8
; CHECK-NEXT: fcmp d0, d1
; CHECK-NEXT: csel x0, x8, xzr, eq
; CHECK-NEXT: ret
entry:
%conv = fptosi double %x to i64
%conv1 = sitofp i64 %conv to double
%cmp = fcmp oeq double %x, %conv1
%cond = select i1 %cmp, i64 %conv, i64 0
ret i64 %cond
}
define i32 @tests_f32_multiuse(float %x) {
; CHECK-LABEL: tests_f32_multiuse:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs w8, s0
; CHECK-NEXT: scvtf s1, w8
; CHECK-NEXT: fcmp s0, s1
; CHECK-NEXT: csel w0, w8, wzr, eq
; CHECK-NEXT: ret
entry:
%conv = fptosi float %x to i32
%conv1 = sitofp i32 %conv to float
%cmp = fcmp oeq float %x, %conv1
%cond = select i1 %cmp, i32 %conv, i32 0
ret i32 %cond
}
define i32 @tests_f16_multiuse(half %x) {
; CHECK-LABEL: tests_f16_multiuse:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs w8, h0
; CHECK-NEXT: scvtf h1, w8
; CHECK-NEXT: fcmp h0, h1
; CHECK-NEXT: csel w0, w8, wzr, eq
; CHECK-NEXT: ret
entry:
%conv = fptosi half %x to i32
%conv1 = sitofp i32 %conv to half
%cmp = fcmp oeq half %x, %conv1
%cond = select i1 %cmp, i32 %conv, i32 0
ret i32 %cond
}
define double @t1_strict(double %x) #0 {
; CHECK-LABEL: t1_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs d0, d0
; CHECK-NEXT: scvtf d0, d0
; CHECK-NEXT: ret
entry:
%conv = call i64 @llvm.experimental.constrained.fptosi.i64.f64(double %x, metadata !"fpexcept.strict") #0
%conv1 = call double @llvm.experimental.constrained.sitofp.f64.i64(i64 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret double %conv1
}
define float @t2_strict(float %x) #0 {
; CHECK-LABEL: t2_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs s0, s0
; CHECK-NEXT: scvtf s0, s0
; CHECK-NEXT: ret
entry:
%conv = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %x, metadata !"fpexcept.strict") #0
%conv1 = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret float %conv1
}
define half @t3_strict(half %x) #0 {
; CHECK-LABEL: t3_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzs h0, h0
; CHECK-NEXT: scvtf h0, h0
; CHECK-NEXT: ret
entry:
%conv = call i32 @llvm.experimental.constrained.fptosi.i32.f16(half %x, metadata !"fpexcept.strict") #0
%conv1 = call half @llvm.experimental.constrained.sitofp.f16.i32(i32 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret half %conv1
}
define double @t4_strict(double %x) #0 {
; CHECK-LABEL: t4_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu d0, d0
; CHECK-NEXT: ucvtf d0, d0
; CHECK-NEXT: ret
entry:
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f64(double %x, metadata !"fpexcept.strict") #0
%conv1 = call double @llvm.experimental.constrained.uitofp.f64.i64(i64 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret double %conv1
}
define float @t5_strict(float %x) #0 {
; CHECK-LABEL: t5_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu s0, s0
; CHECK-NEXT: ucvtf s0, s0
; CHECK-NEXT: ret
entry:
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %x, metadata !"fpexcept.strict") #0
%conv1 = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret float %conv1
}
define half @t6_strict(half %x) #0 {
; CHECK-LABEL: t6_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcvtzu h0, h0
; CHECK-NEXT: ucvtf h0, h0
; CHECK-NEXT: ret
entry:
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %x, metadata !"fpexcept.strict") #0
%conv1 = call half @llvm.experimental.constrained.uitofp.f16.i32(i32 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret half %conv1
}
define bfloat @t7_strict(bfloat %x) #0 {
; CHECK-LABEL: t7_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h0 killed $h0 def $d0
; CHECK-NEXT: mov w8, #32767 // =0x7fff
; CHECK-NEXT: shll v0.4s, v0.4h, #16
; CHECK-NEXT: fcvtzs w9, s0
; CHECK-NEXT: scvtf d0, w9
; CHECK-NEXT: fcvtxn s0, d0
; CHECK-NEXT: fmov w9, s0
; CHECK-NEXT: ubfx w10, w9, #16, #1
; CHECK-NEXT: add w8, w9, w8
; CHECK-NEXT: add w8, w10, w8
; CHECK-NEXT: lsr w8, w8, #16
; CHECK-NEXT: fmov s0, w8
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
; CHECK-NEXT: ret
entry:
%conv = call i32 @llvm.experimental.constrained.fptosi.i32.bf16(bfloat %x, metadata !"fpexcept.strict") #0
%conv1 = call bfloat @llvm.experimental.constrained.sitofp.bf16.i32(i32 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret bfloat %conv1
}
define bfloat @t8_strict(bfloat %x) #0 {
; CHECK-LABEL: t8_strict:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h0 killed $h0 def $d0
; CHECK-NEXT: mov w8, #32767 // =0x7fff
; CHECK-NEXT: shll v0.4s, v0.4h, #16
; CHECK-NEXT: fcvtzu w9, s0
; CHECK-NEXT: ucvtf d0, w9
; CHECK-NEXT: fcvtxn s0, d0
; CHECK-NEXT: fmov w9, s0
; CHECK-NEXT: ubfx w10, w9, #16, #1
; CHECK-NEXT: add w8, w9, w8
; CHECK-NEXT: add w8, w10, w8
; CHECK-NEXT: lsr w8, w8, #16
; CHECK-NEXT: fmov s0, w8
; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
; CHECK-NEXT: ret
entry:
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.bf16(bfloat %x, metadata !"fpexcept.strict") #0
%conv1 = call bfloat @llvm.experimental.constrained.uitofp.bf16.i32(i32 %conv, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
ret bfloat %conv1
}
attributes #0 = { strictfp }
declare i32 @llvm.experimental.constrained.fptosi.i32.bf16(bfloat, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.bf16(bfloat, metadata)
declare i32 @llvm.experimental.constrained.fptosi.i32.f16(half, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f16(half, metadata)
declare i32 @llvm.experimental.constrained.fptosi.i32.f32(float, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata)
declare i64 @llvm.experimental.constrained.fptosi.i64.f64(double, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f64(double, metadata)
declare bfloat @llvm.experimental.constrained.sitofp.bf16.i32(i32, metadata, metadata)
declare bfloat @llvm.experimental.constrained.uitofp.bf16.i32(i32, metadata, metadata)
declare half @llvm.experimental.constrained.sitofp.f16.i32(i32, metadata, metadata)
declare half @llvm.experimental.constrained.uitofp.f16.i32(i32, metadata, metadata)
declare float @llvm.experimental.constrained.sitofp.f32.i32(i32, metadata, metadata)
declare float @llvm.experimental.constrained.uitofp.f32.i32(i32, metadata, metadata)
declare double @llvm.experimental.constrained.sitofp.f64.i64(i64, metadata, metadata)
declare double @llvm.experimental.constrained.uitofp.f64.i64(i64, metadata, metadata)
|
