blob: cbf8867d569cb371e15cecd0872a6d5963ea6e30 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
|
//===----------------------- MIRNamer.cpp - MIR Namer ---------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The purpose of this pass is to rename virtual register operands with the goal
// of making it easier to author easier to read tests for MIR. This pass reuses
// the vreg renamer used by MIRCanonicalizerPass.
//
// Basic Usage:
//
// llc -o - -run-pass mir-namer example.mir
//
//===----------------------------------------------------------------------===//
#include "MIRVRegNamerUtils.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/InitializePasses.h"
using namespace llvm;
#define DEBUG_TYPE "mir-namer"
namespace {
class MIRNamer : public MachineFunctionPass {
public:
static char ID;
MIRNamer() : MachineFunctionPass(ID) {}
StringRef getPassName() const override {
return "Rename virtual register operands";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) override {
bool Changed = false;
if (MF.empty())
return Changed;
VRegRenamer Renamer(MF.getRegInfo());
ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
for (const auto &[BBIndex, MBB] : enumerate(RPOT))
Changed |= Renamer.renameVRegs(MBB, BBIndex);
return Changed;
}
};
} // end anonymous namespace
char MIRNamer::ID;
INITIALIZE_PASS(MIRNamer, "mir-namer", "Rename Register Operands", false, false)
|
