1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
|
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir
// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll
// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG
int test_builtin_clrsb(int x) {
return __builtin_clrsb(x);
}
// CIR-LABEL: _Z18test_builtin_clrsbi
// CIR: [[TMP:%.+]] = cir.clrsb %{{.+}} : !s32i
// LLVM-LABEL: _Z18test_builtin_clrsbi
// LLVM: %[[X:.+]] = load i32, ptr %{{.+}}, align 4
// LLVM-NEXT: %[[X_NEG:.+]] = icmp slt i32 %[[X]], 0
// LLVM-NEXT: %[[X_NOT:.+]] = xor i32 %[[X]], -1
// LLVM-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i32 %[[X_NOT]], i32 %[[X]]
// LLVM-NEXT: %[[LZ:.+]] = call i32 @llvm.ctlz.i32(i32 %[[P]], i1 false)
// LLVM-NEXT: %{{.+}} = sub i32 %[[LZ]], 1
// OGCG-LABEL: _Z18test_builtin_clrsbi
// OGCG: %[[X:.+]] = load i32, ptr %{{.+}}, align 4
// OGCG-NEXT: %[[X_NEG:.+]] = icmp slt i32 %[[X]], 0
// OGCG-NEXT: %[[X_NOT:.+]] = xor i32 %[[X]], -1
// OGCG-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i32 %[[X_NOT]], i32 %[[X]]
// OGCG-NEXT: %[[LZ:.+]] = call i32 @llvm.ctlz.i32(i32 %[[P]], i1 false)
// OGCG-NEXT: %{{.+}} = sub i32 %[[LZ]], 1
int test_builtin_clrsbl(long x) {
return __builtin_clrsbl(x);
}
// CIR-LABEL: _Z19test_builtin_clrsbll
// CIR: [[TMP:%.+]] = cir.clrsb %{{.+}} : !s64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !s64i), !s32i
// LLVM-LABEL: _Z19test_builtin_clrsbll
// LLVM: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[X_NEG:.+]] = icmp slt i64 %[[X]], 0
// LLVM-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1
// LLVM-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]]
// LLVM-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false)
// LLVM-NEXT: %{{.+}} = sub i64 %[[LZ]], 1
// OGCG-LABEL: _Z19test_builtin_clrsbll
// OGCG: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[X_NEG:.+]] = icmp slt i64 %[[X]], 0
// OGCG-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1
// OGCG-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]]
// OGCG-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false)
// OGCG-NEXT: %{{.+}} = sub i64 %[[LZ]], 1
int test_builtin_clrsbll(long long x) {
return __builtin_clrsbll(x);
}
// CIR-LABEL: _Z20test_builtin_clrsbllx
// CIR: [[TMP:%.+]] = cir.clrsb %{{.+}} : !s64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !s64i), !s32i
// LLVM-LABEL: _Z20test_builtin_clrsbllx
// LLVM: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[X_NEG:.+]] = icmp slt i64 %[[X]], 0
// LLVM-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1
// LLVM-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]]
// LLVM-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false)
// LLVM-NEXT: %{{.+}} = sub i64 %[[LZ]], 1
// OGCG-LABEL: _Z20test_builtin_clrsbllx
// OGCG: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[X_NEG:.+]] = icmp slt i64 %[[X]], 0
// OGCG-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1
// OGCG-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]]
// OGCG-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false)
// OGCG-NEXT: %{{.+}} = sub i64 %[[LZ]], 1
int test_builtin_ctzs(unsigned short x) {
return __builtin_ctzs(x);
}
// CIR-LABEL: _Z17test_builtin_ctzst
// CIR: [[TMP:%.+]] = cir.ctz %{{.+}} poison_zero : !u16i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u16i), !s32i
// LLVM-LABEL: _Z17test_builtin_ctzst
// LLVM: %{{.+}} = call i16 @llvm.cttz.i16(i16 %{{.+}}, i1 true)
// OGCG-LABEL: _Z17test_builtin_ctzst
// OGCG: %{{.+}} = call i16 @llvm.cttz.i16(i16 %{{.+}}, i1 true)
int test_builtin_ctz(unsigned x) {
return __builtin_ctz(x);
}
// CIR-LABEL: _Z16test_builtin_ctzj
// CIR: [[TMP:%.+]] = cir.ctz %{{.+}} poison_zero : !u32i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u32i), !s32i
// LLVM-LABEL: _Z16test_builtin_ctzj
// LLVM: %{{.+}} = call i32 @llvm.cttz.i32(i32 %{{.+}}, i1 true)
// OGCG-LABEL: _Z16test_builtin_ctzj
// OGCG: %{{.+}} = call i32 @llvm.cttz.i32(i32 %{{.+}}, i1 true)
int test_builtin_ctzl(unsigned long x) {
return __builtin_ctzl(x);
}
// CIR-LABEL: _Z17test_builtin_ctzlm
// CIR: [[TMP:%.+]] = cir.ctz %{{.+}} poison_zero : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z17test_builtin_ctzlm
// LLVM: %{{.+}} = call i64 @llvm.cttz.i64(i64 %{{.+}}, i1 true)
// OGCG-LABEL: _Z17test_builtin_ctzlm
// OGCG: %{{.+}} = call i64 @llvm.cttz.i64(i64 %{{.+}}, i1 true)
int test_builtin_ctzll(unsigned long long x) {
return __builtin_ctzll(x);
}
// CIR-LABEL: _Z18test_builtin_ctzlly
// CIR: [[TMP:%.+]] = cir.ctz %{{.+}} poison_zero : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z18test_builtin_ctzlly
// LLVM: %{{.+}} = call i64 @llvm.cttz.i64(i64 %{{.+}}, i1 true)
// OGCG-LABEL: _Z18test_builtin_ctzlly
// OGCG: %{{.+}} = call i64 @llvm.cttz.i64(i64 %{{.+}}, i1 true)
int test_builtin_ctzg(unsigned x) {
return __builtin_ctzg(x);
}
// CIR-LABEL: _Z17test_builtin_ctzgj
// CIR: [[TMP:%.+]] = cir.ctz %{{.+}} poison_zero : !u32i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u32i), !s32i
// LLVM-LABEL: _Z17test_builtin_ctzgj
// LLVM: %{{.+}} = call i32 @llvm.cttz.i32(i32 %{{.+}}, i1 true)
// OGCG-LABEL: _Z17test_builtin_ctzgj
// OGCG: %{{.+}} = call i32 @llvm.cttz.i32(i32 %{{.+}}, i1 true)
int test_builtin_clzs(unsigned short x) {
return __builtin_clzs(x);
}
// CIR-LABEL: _Z17test_builtin_clzst
// CIR: [[TMP:%.+]] = cir.clz %{{.+}} poison_zero : !u16i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u16i), !s32i
// LLVM-LABEL: _Z17test_builtin_clzst
// LLVM: %{{.+}} = call i16 @llvm.ctlz.i16(i16 %{{.+}}, i1 true)
// OGCG-LABEL: _Z17test_builtin_clzst
// OGCG: %{{.+}} = call i16 @llvm.ctlz.i16(i16 %{{.+}}, i1 true)
int test_builtin_clz(unsigned x) {
return __builtin_clz(x);
}
// CIR-LABEL: _Z16test_builtin_clzj
// CIR: [[TMP:%.+]] = cir.clz %{{.+}} poison_zero : !u32i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u32i), !s32i
// LLVM-LABEL: _Z16test_builtin_clzj
// LLVM: %{{.+}} = call i32 @llvm.ctlz.i32(i32 %{{.+}}, i1 true)
// OGCG-LABEL: _Z16test_builtin_clzj
// OGCG: %{{.+}} = call i32 @llvm.ctlz.i32(i32 %{{.+}}, i1 true)
int test_builtin_clzl(unsigned long x) {
return __builtin_clzl(x);
}
// CIR-LABEL: _Z17test_builtin_clzlm
// CIR: [[TMP:%.+]] = cir.clz %{{.+}} poison_zero : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z17test_builtin_clzlm
// LLVM: %{{.+}} = call i64 @llvm.ctlz.i64(i64 %{{.+}}, i1 true)
// OGCG-LABEL: _Z17test_builtin_clzlm
// OGCG: %{{.+}} = call i64 @llvm.ctlz.i64(i64 %{{.+}}, i1 true)
int test_builtin_clzll(unsigned long long x) {
return __builtin_clzll(x);
}
// CIR-LABEL: _Z18test_builtin_clzlly
// CIR: [[TMP:%.+]] = cir.clz %{{.+}} poison_zero : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z18test_builtin_clzlly
// LLVM: %{{.+}} = call i64 @llvm.ctlz.i64(i64 %{{.+}}, i1 true)
// OGCG-LABEL: _Z18test_builtin_clzlly
// OGCG: %{{.+}} = call i64 @llvm.ctlz.i64(i64 %{{.+}}, i1 true)
int test_builtin_clzg(unsigned x) {
return __builtin_clzg(x);
}
// CIR-LABEL: _Z17test_builtin_clzgj
// CIR: [[TMP:%.+]] = cir.clz %{{.+}} poison_zero : !u32i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u32i), !s32i
// LLVM-LABEL: _Z17test_builtin_clzgj
// LLVM: %{{.+}} = call i32 @llvm.ctlz.i32(i32 %{{.+}}, i1 true)
// OGCG-LABEL: _Z17test_builtin_clzgj
// OGCG: %{{.+}} = call i32 @llvm.ctlz.i32(i32 %{{.+}}, i1 true)
int test_builtin_ffs(int x) {
return __builtin_ffs(x);
}
// CIR-LABEL: _Z16test_builtin_ffsi
// CIR: %{{.+}} = cir.ffs %{{.+}} : !s32i
// CIR: }
// LLVM-LABEL: _Z16test_builtin_ffsi
// LLVM: %[[INPUT:.+]] = load i32, ptr %{{.+}}, align 4
// LLVM-NEXT: %[[CTZ:.+]] = call i32 @llvm.cttz.i32(i32 %[[INPUT]], i1 true)
// LLVM-NEXT: %[[R1:.+]] = add i32 %[[CTZ]], 1
// LLVM-NEXT: %[[IS_ZERO:.+]] = icmp eq i32 %[[INPUT]], 0
// LLVM-NEXT: %{{.+}} = select i1 %[[IS_ZERO]], i32 0, i32 %[[R1]]
// LLVM: }
// OGCG-LABEL: _Z16test_builtin_ffsi
// OGCG: %[[INPUT:.+]] = load i32, ptr %{{.+}}, align 4
// OGCG-NEXT: %[[CTZ:.+]] = call i32 @llvm.cttz.i32(i32 %[[INPUT]], i1 true)
// OGCG-NEXT: %[[R1:.+]] = add i32 %[[CTZ]], 1
// OGCG-NEXT: %[[IS_ZERO:.+]] = icmp eq i32 %[[INPUT]], 0
// OGCG-NEXT: %{{.+}} = select i1 %[[IS_ZERO]], i32 0, i32 %[[R1]]
// OGCG: }
int test_builtin_ffsl(long x) {
return __builtin_ffsl(x);
}
// CIR-LABEL: _Z17test_builtin_ffsll
// CIR: %{{.+}} = cir.ffs %{{.+}} : !s64i
// CIR: }
// LLVM-LABEL: _Z17test_builtin_ffsll
// LLVM: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[CTZ:.+]] = call i64 @llvm.cttz.i64(i64 %[[INPUT]], i1 true)
// LLVM-NEXT: %[[R1:.+]] = add i64 %[[CTZ]], 1
// LLVM-NEXT: %[[IS_ZERO:.+]] = icmp eq i64 %[[INPUT]], 0
// LLVM-NEXT: %{{.+}} = select i1 %[[IS_ZERO]], i64 0, i64 %[[R1]]
// LLVM: }
// OGCG-LABEL: _Z17test_builtin_ffsll
// OGCG: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[CTZ:.+]] = call i64 @llvm.cttz.i64(i64 %[[INPUT]], i1 true)
// OGCG-NEXT: %[[R1:.+]] = add i64 %[[CTZ]], 1
// OGCG-NEXT: %[[IS_ZERO:.+]] = icmp eq i64 %[[INPUT]], 0
// OGCG-NEXT: %{{.+}} = select i1 %[[IS_ZERO]], i64 0, i64 %[[R1]]
// OGCG: }
int test_builtin_ffsll(long long x) {
return __builtin_ffsll(x);
}
// CIR-LABEL: _Z18test_builtin_ffsllx
// CIR: %{{.+}} = cir.ffs %{{.+}} : !s64i
// CIR: }
// LLVM-LABEL: _Z18test_builtin_ffsllx
// LLVM: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[CTZ:.+]] = call i64 @llvm.cttz.i64(i64 %[[INPUT]], i1 true)
// LLVM-NEXT: %[[R1:.+]] = add i64 %[[CTZ]], 1
// LLVM-NEXT: %[[IS_ZERO:.+]] = icmp eq i64 %[[INPUT]], 0
// LLVM-NEXT: %{{.+}} = select i1 %[[IS_ZERO]], i64 0, i64 %[[R1]]
// LLVM: }
// OGCG-LABEL: _Z18test_builtin_ffsllx
// OGCG: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[CTZ:.+]] = call i64 @llvm.cttz.i64(i64 %[[INPUT]], i1 true)
// OGCG-NEXT: %[[R1:.+]] = add i64 %[[CTZ]], 1
// OGCG-NEXT: %[[IS_ZERO:.+]] = icmp eq i64 %[[INPUT]], 0
// OGCG-NEXT: %{{.+}} = select i1 %[[IS_ZERO]], i64 0, i64 %[[R1]]
// OGCG: }
int test_builtin_parity(unsigned x) {
return __builtin_parity(x);
}
// CIR-LABEL: _Z19test_builtin_parityj
// CIR: [[TMP:%.+]] = cir.parity %{{.+}} : !u32i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u32i), !s32i
// LLVM-LABEL: _Z19test_builtin_parityj
// LLVM: %[[X:.+]] = load i32, ptr %{{.+}}, align 4
// LLVM-NEXT: %[[POPCNT:.+]] = call i32 @llvm.ctpop.i32(i32 %[[X]])
// LLVM-NEXT: %{{.+}} = and i32 %[[POPCNT]], 1
// OGCG-LABEL: _Z19test_builtin_parityj
// OGCG: %[[X:.+]] = load i32, ptr %{{.+}}, align 4
// OGCG-NEXT: %[[POPCNT:.+]] = call i32 @llvm.ctpop.i32(i32 %[[X]])
// OGCG-NEXT: %{{.+}} = and i32 %[[POPCNT]], 1
int test_builtin_parityl(unsigned long x) {
return __builtin_parityl(x);
}
// CIR-LABEL: _Z20test_builtin_paritylm
// CIR: [[TMP:%.+]] = cir.parity %{{.+}} : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z20test_builtin_paritylm
// LLVM: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[POPCNT:.+]] = call i64 @llvm.ctpop.i64(i64 %[[X]])
// LLVM-NEXT: %{{.+}} = and i64 %[[POPCNT]], 1
// OGCG-LABEL: _Z20test_builtin_paritylm
// OGCG: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[POPCNT:.+]] = call i64 @llvm.ctpop.i64(i64 %[[X]])
// OGCG-NEXT: %{{.+}} = and i64 %[[POPCNT]], 1
int test_builtin_parityll(unsigned long long x) {
return __builtin_parityll(x);
}
// CIR-LABEL: _Z21test_builtin_paritylly
// CIR: [[TMP:%.+]] = cir.parity %{{.+}} : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z21test_builtin_paritylly
// LLVM: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[POPCNT:.+]] = call i64 @llvm.ctpop.i64(i64 %[[X]])
// LLVM-NEXT: %{{.+}} = and i64 %[[POPCNT]], 1
// OGCG-LABEL: _Z21test_builtin_paritylly
// OGCG: %[[X:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[POPCNT:.+]] = call i64 @llvm.ctpop.i64(i64 %[[X]])
// OGCG-NEXT: %{{.+}} = and i64 %[[POPCNT]], 1
int test_builtin_popcount(unsigned x) {
return __builtin_popcount(x);
}
// CIR-LABEL: _Z21test_builtin_popcountj
// CIR: [[TMP:%.+]] = cir.popcount %{{.+}} : !u32i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u32i), !s32i
// LLVM-LABEL: _Z21test_builtin_popcountj
// LLVM: %{{.+}} = call i32 @llvm.ctpop.i32(i32 %{{.+}})
// OGCG-LABEL: _Z21test_builtin_popcountj
// OGCG: %{{.+}} = call i32 @llvm.ctpop.i32(i32 %{{.+}})
int test_builtin_popcountl(unsigned long x) {
return __builtin_popcountl(x);
}
// CIR-LABEL: _Z22test_builtin_popcountlm
// CIR: [[TMP:%.+]] = cir.popcount %{{.+}} : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z22test_builtin_popcountlm
// LLVM: %{{.+}} = call i64 @llvm.ctpop.i64(i64 %{{.+}})
// OGCG-LABEL: _Z22test_builtin_popcountlm
// OGCG: %{{.+}} = call i64 @llvm.ctpop.i64(i64 %{{.+}})
int test_builtin_popcountll(unsigned long long x) {
return __builtin_popcountll(x);
}
// CIR-LABEL: _Z23test_builtin_popcountlly
// CIR: [[TMP:%.+]] = cir.popcount %{{.+}} : !u64i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u64i), !s32i
// LLVM-LABEL: _Z23test_builtin_popcountlly
// LLVM: %{{.+}} = call i64 @llvm.ctpop.i64(i64 %{{.+}})
// OGCG-LABEL: _Z23test_builtin_popcountlly
// OGCG: %{{.+}} = call i64 @llvm.ctpop.i64(i64 %{{.+}})
int test_builtin_popcountg(unsigned x) {
return __builtin_popcountg(x);
}
// CIR-LABEL: _Z22test_builtin_popcountgj
// CIR: [[TMP:%.+]] = cir.popcount %{{.+}} : !u32i
// CIR: {{%.+}} = cir.cast(integral, [[TMP]] : !u32i), !s32i
// LLVM-LABEL: _Z22test_builtin_popcountgj
// LLVM: %{{.+}} = call i32 @llvm.ctpop.i32(i32 %{{.+}})
// OGCG-LABEL: _Z22test_builtin_popcountgj
// OGCG: %{{.+}} = call i32 @llvm.ctpop.i32(i32 %{{.+}})
unsigned char test_builtin_bitreverse8(unsigned char x) {
return __builtin_bitreverse8(x);
}
// CIR-LABEL: @_Z24test_builtin_bitreverse8h
// CIR: %{{.+}} = cir.bitreverse %{{.+}} : !u8i
// LLVM-LABEL: @_Z24test_builtin_bitreverse8h
// LLVM: %{{.+}} = call i8 @llvm.bitreverse.i8(i8 %{{.+}})
// OGCG-LABEL: @_Z24test_builtin_bitreverse8h
// OGCG: %{{.+}} = call i8 @llvm.bitreverse.i8(i8 %{{.+}})
unsigned short test_builtin_bitreverse16(unsigned short x) {
return __builtin_bitreverse16(x);
}
// CIR-LABEL: @_Z25test_builtin_bitreverse16t
// CIR: %{{.+}} = cir.bitreverse %{{.+}} : !u16i
// LLVM-LABEL: @_Z25test_builtin_bitreverse16t
// LLVM: %{{.+}} = call i16 @llvm.bitreverse.i16(i16 %{{.+}})
// OGCG-LABEL: @_Z25test_builtin_bitreverse16t
// OGCG: %{{.+}} = call i16 @llvm.bitreverse.i16(i16 %{{.+}})
unsigned test_builtin_bitreverse32(unsigned x) {
return __builtin_bitreverse32(x);
}
// CIR-LABEL: @_Z25test_builtin_bitreverse32j
// CIR: %{{.+}} = cir.bitreverse %{{.+}} : !u32i
// LLVM-LABEL: @_Z25test_builtin_bitreverse32j
// LLVM: %{{.+}} = call i32 @llvm.bitreverse.i32(i32 %{{.+}})
// OGCG-LABEL: @_Z25test_builtin_bitreverse32j
// OGCG: %{{.+}} = call i32 @llvm.bitreverse.i32(i32 %{{.+}})
unsigned long long test_builtin_bitreverse64(unsigned long long x) {
return __builtin_bitreverse64(x);
}
// CIR-LABEL: @_Z25test_builtin_bitreverse64y
// CIR: %{{.+}} = cir.bitreverse %{{.+}} : !u64i
// LLVM-LABEL: @_Z25test_builtin_bitreverse64y
// LLVM: %{{.+}} = call i64 @llvm.bitreverse.i64(i64 %{{.+}})
// OGCG-LABEL: @_Z25test_builtin_bitreverse64y
// OGCG: %{{.+}} = call i64 @llvm.bitreverse.i64(i64 %{{.+}})
unsigned short test_builtin_bswap16(unsigned short x) {
return __builtin_bswap16(x);
}
// CIR-LABEL: @_Z20test_builtin_bswap16t
// CIR: %{{.+}} = cir.byte_swap %{{.+}} : !u16i
// LLVM-LABEL: @_Z20test_builtin_bswap16t
// LLVM: %{{.+}} = call i16 @llvm.bswap.i16(i16 %{{.+}})
// OGCG-LABEL: @_Z20test_builtin_bswap16t
// OGCG: %{{.+}} = call i16 @llvm.bswap.i16(i16 %{{.+}})
unsigned test_builtin_bswap32(unsigned x) {
return __builtin_bswap32(x);
}
// CIR-LABEL: @_Z20test_builtin_bswap32j
// CIR: %{{.+}} = cir.byte_swap %{{.+}} : !u32i
// LLVM-LABEL: @_Z20test_builtin_bswap32j
// LLVM: %{{.+}} = call i32 @llvm.bswap.i32(i32 %{{.+}})
// OGCG-LABEL: @_Z20test_builtin_bswap32j
// OGCG: %{{.+}} = call i32 @llvm.bswap.i32(i32 %{{.+}})
unsigned long long test_builtin_bswap64(unsigned long long x) {
return __builtin_bswap64(x);
}
// CIR-LABEL: @_Z20test_builtin_bswap64y
// CIR: %{{.+}} = cir.byte_swap %{{.+}} : !u64i
// LLVM-LABEL: @_Z20test_builtin_bswap64y
// LLVM: %{{.+}} = call i64 @llvm.bswap.i64(i64 %{{.+}})
// OGCG-LABEL: @_Z20test_builtin_bswap64y
// OGCG: %{{.+}} = call i64 @llvm.bswap.i64(i64 %{{.+}})
unsigned char test_builtin_rotateleft8(unsigned char x, unsigned char y) {
return __builtin_rotateleft8(x, y);
}
// CIR-LABEL: @_Z24test_builtin_rotateleft8hh
// CIR: %{{.+}} = cir.rotate left %{{.+}}, %{{.+}} : !u8i
// LLVM-LABEL: @_Z24test_builtin_rotateleft8hh
// LLVM: %[[INPUT:.+]] = load i8, ptr %{{.+}}, align 1
// LLVM-NEXT: %[[AMOUNT:.+]] = load i8, ptr %{{.+}}, align 1
// LLVM-NEXT: %{{.+}} = call i8 @llvm.fshl.i8(i8 %[[INPUT]], i8 %[[INPUT]], i8 %[[AMOUNT]])
// OGCG-LABEL: @_Z24test_builtin_rotateleft8hh
// OGCG: %[[INPUT:.+]] = load i8, ptr %{{.+}}, align 1
// OGCG-NEXT: %[[AMOUNT:.+]] = load i8, ptr %{{.+}}, align 1
// OGCG-NEXT: %{{.+}} = call i8 @llvm.fshl.i8(i8 %[[INPUT]], i8 %[[INPUT]], i8 %[[AMOUNT]])
unsigned short test_builtin_rotateleft16(unsigned short x, unsigned short y) {
return __builtin_rotateleft16(x, y);
}
// CIR-LABEL: @_Z25test_builtin_rotateleft16tt
// CIR: %{{.+}} = cir.rotate left %{{.+}}, %{{.+}} : !u16i
// LLVM-LABEL: @_Z25test_builtin_rotateleft16tt
// LLVM: %[[INPUT:.+]] = load i16, ptr %{{.+}}, align 2
// LLVM-NEXT: %[[AMOUNT:.+]] = load i16, ptr %{{.+}}, align 2
// LLVM-NEXT: %{{.+}} = call i16 @llvm.fshl.i16(i16 %[[INPUT]], i16 %[[INPUT]], i16 %[[AMOUNT]])
// OGCG-LABEL: @_Z25test_builtin_rotateleft16tt
// OGCG: %[[INPUT:.+]] = load i16, ptr %{{.+}}, align 2
// OGCG-NEXT: %[[AMOUNT:.+]] = load i16, ptr %{{.+}}, align 2
// OGCG-NEXT: %{{.+}} = call i16 @llvm.fshl.i16(i16 %[[INPUT]], i16 %[[INPUT]], i16 %[[AMOUNT]])
unsigned test_builtin_rotateleft32(unsigned x, unsigned y) {
return __builtin_rotateleft32(x, y);
}
// CIR-LABEL: @_Z25test_builtin_rotateleft32jj
// CIR: %{{.+}} = cir.rotate left %{{.+}}, %{{.+}} : !u32i
// LLVM-LABEL: @_Z25test_builtin_rotateleft32jj
// LLVM: %[[INPUT:.+]] = load i32, ptr %{{.+}}, align 4
// LLVM-NEXT: %[[AMOUNT:.+]] = load i32, ptr %{{.+}}, align 4
// LLVM-NEXT: %{{.+}} = call i32 @llvm.fshl.i32(i32 %[[INPUT]], i32 %[[INPUT]], i32 %[[AMOUNT]])
// OGCG-LABEL: @_Z25test_builtin_rotateleft32jj
// OGCG: %[[INPUT:.+]] = load i32, ptr %{{.+}}, align 4
// OGCG-NEXT: %[[AMOUNT:.+]] = load i32, ptr %{{.+}}, align 4
// OGCG-NEXT: %{{.+}} = call i32 @llvm.fshl.i32(i32 %[[INPUT]], i32 %[[INPUT]], i32 %[[AMOUNT]])
unsigned long long test_builtin_rotateleft64(unsigned long long x,
unsigned long long y) {
return __builtin_rotateleft64(x, y);
}
// CIR-LABEL: @_Z25test_builtin_rotateleft64yy
// CIR: %{{.+}} = cir.rotate left %{{.+}}, %{{.+}} : !u64i
// LLVM-LABEL: @_Z25test_builtin_rotateleft64yy
// LLVM: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[AMOUNT:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %{{.+}} = call i64 @llvm.fshl.i64(i64 %[[INPUT]], i64 %[[INPUT]], i64 %[[AMOUNT]])
// OGCG-LABEL: @_Z25test_builtin_rotateleft64yy
// OGCG: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[AMOUNT:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %{{.+}} = call i64 @llvm.fshl.i64(i64 %[[INPUT]], i64 %[[INPUT]], i64 %[[AMOUNT]])
unsigned char test_builtin_rotateright8(unsigned char x, unsigned char y) {
return __builtin_rotateright8(x, y);
}
// CIR-LABEL: @_Z25test_builtin_rotateright8hh
// CIR: %{{.+}} = cir.rotate right %{{.+}}, %{{.+}} : !u8i
// LLVM-LABEL: @_Z25test_builtin_rotateright8hh
// LLVM: %[[INPUT:.+]] = load i8, ptr %{{.+}}, align 1
// LLVM-NEXT: %[[AMOUNT:.+]] = load i8, ptr %{{.+}}, align 1
// LLVM-NEXT: %{{.+}} = call i8 @llvm.fshr.i8(i8 %[[INPUT]], i8 %[[INPUT]], i8 %[[AMOUNT]])
// OGCG-LABEL: @_Z25test_builtin_rotateright8hh
// OGCG: %[[INPUT:.+]] = load i8, ptr %{{.+}}, align 1
// OGCG-NEXT: %[[AMOUNT:.+]] = load i8, ptr %{{.+}}, align 1
// OGCG-NEXT: %{{.+}} = call i8 @llvm.fshr.i8(i8 %[[INPUT]], i8 %[[INPUT]], i8 %[[AMOUNT]])
unsigned short test_builtin_rotateright16(unsigned short x, unsigned short y) {
return __builtin_rotateright16(x, y);
}
// CIR-LABEL: @_Z26test_builtin_rotateright16tt
// CIR: %{{.+}} = cir.rotate right %{{.+}}, %{{.+}} : !u16i
// LLVM-LABEL: @_Z26test_builtin_rotateright16tt
// LLVM: %[[INPUT:.+]] = load i16, ptr %{{.+}}, align 2
// LLVM-NEXT: %[[AMOUNT:.+]] = load i16, ptr %{{.+}}, align 2
// LLVM-NEXT: %{{.+}} = call i16 @llvm.fshr.i16(i16 %[[INPUT]], i16 %[[INPUT]], i16 %[[AMOUNT]])
// OGCG-LABEL: @_Z26test_builtin_rotateright16tt
// OGCG: %[[INPUT:.+]] = load i16, ptr %{{.+}}, align 2
// OGCG-NEXT: %[[AMOUNT:.+]] = load i16, ptr %{{.+}}, align 2
// OGCG-NEXT: %{{.+}} = call i16 @llvm.fshr.i16(i16 %[[INPUT]], i16 %[[INPUT]], i16 %[[AMOUNT]])
unsigned test_builtin_rotateright32(unsigned x, unsigned y) {
return __builtin_rotateright32(x, y);
}
// CIR-LABEL: @_Z26test_builtin_rotateright32jj
// CIR: %{{.+}} = cir.rotate right %{{.+}}, %{{.+}} : !u32i
// LLVM-LABEL: @_Z26test_builtin_rotateright32jj
// LLVM: %[[INPUT:.+]] = load i32, ptr %{{.+}}, align 4
// LLVM-NEXT: %[[AMOUNT:.+]] = load i32, ptr %{{.+}}, align 4
// LLVM-NEXT: %{{.+}} = call i32 @llvm.fshr.i32(i32 %[[INPUT]], i32 %[[INPUT]], i32 %[[AMOUNT]])
// OGCG-LABEL: @_Z26test_builtin_rotateright32jj
// OGCG: %[[INPUT:.+]] = load i32, ptr %{{.+}}, align 4
// OGCG-NEXT: %[[AMOUNT:.+]] = load i32, ptr %{{.+}}, align 4
// OGCG-NEXT: %{{.+}} = call i32 @llvm.fshr.i32(i32 %[[INPUT]], i32 %[[INPUT]], i32 %[[AMOUNT]])
unsigned long long test_builtin_rotateright64(unsigned long long x,
unsigned long long y) {
return __builtin_rotateright64(x, y);
}
// CIR-LABEL: @_Z26test_builtin_rotateright64yy
// CIR: %{{.+}} = cir.rotate right %{{.+}}, %{{.+}} : !u64i
// LLVM-LABEL: @_Z26test_builtin_rotateright64yy
// LLVM: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %[[AMOUNT:.+]] = load i64, ptr %{{.+}}, align 8
// LLVM-NEXT: %{{.+}} = call i64 @llvm.fshr.i64(i64 %[[INPUT]], i64 %[[INPUT]], i64 %[[AMOUNT]])
// OGCG-LABEL: @_Z26test_builtin_rotateright64yy
// OGCG: %[[INPUT:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %[[AMOUNT:.+]] = load i64, ptr %{{.+}}, align 8
// OGCG-NEXT: %{{.+}} = call i64 @llvm.fshr.i64(i64 %[[INPUT]], i64 %[[INPUT]], i64 %[[AMOUNT]])
|
