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path: root/llvm/utils/TableGen/X86RecognizableInstr.cpp
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2016-08-22[X86] Create a new instruction format to handle 4VOp3 encoding. This saves on...Craig Topper1-16/+25
2016-08-22[X86] Create a new instruction format to handle MemOp4 encoding. This saves o...Craig Topper1-15/+28
2016-08-22[X86] Space out the encodings of X86 instruction formats. I plan to add some ...Craig Topper1-83/+83
2016-08-22[X86] Merge small helper function into the switch that calls it since they bo...Craig Topper1-17/+9
2016-08-22[X86] Explicitly list all X86 instruction forms in switch statement so its ea...Craig Topper1-1/+10
2016-02-25AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Ch...Igor Breger1-16/+20
2016-02-20[X86] Remove some unused encoding checks from the disassembler table building.Craig Topper1-4/+0
2016-02-18[TableGen,X86] Add NDEBUG check to a variable initialization that's only used...Craig Topper1-0/+2
2016-02-18[TableGen,X86] Remove extra optional operand from RawFrm. RawFrm with 2 immed...Craig Topper1-3/+1
2016-02-16[TableGen] Fix inconsistent spacing. NFCCraig Topper1-2/+2
2016-02-16[TableGen] Stop passing by reference an integer that doesn't get modified. NFCCraig Topper1-1/+1
2016-02-16[TableGen] Remove unused member variable. NFCCraig Topper1-1/+0
2015-12-24[X86][PKU] Add {RD,WR}PKRU encodingAsaf Badouh1-6/+6
2015-12-14[X86] Part 2 to fix x86-64 fp128 calling convention.Chih-Hung Hsieh1-0/+5
2015-06-28AVX-512: Added all SKX forms of GATHER instructions.Elena Demikhovsky1-0/+6
2015-06-09X86-MPX: Implemented encoding for MPX instructions.Elena Demikhovsky1-0/+3
2015-04-21AVX-512: Added VPMOVx2M instructions for SKX,Elena Demikhovsky1-0/+6
2015-02-15[X86] Add the remaining 11 possible exact ModRM formats. This makes their enc...Craig Topper1-51/+62
2015-02-13[X86] Add support for parsing and printing the mnemonic aliases for the XOP V...Craig Topper1-0/+2
2015-01-28[X86] Teach disassembler to handle illegal immediates on AVX512 integer compa...Craig Topper1-0/+2
2015-01-25[X86] Replace i32i8imm on SSE/AVX instructions with i32u8imm which will make ...Craig Topper1-0/+3
2015-01-21[X86] Convert all the i8imm used by SSE and AVX instructions to u8imm.Craig Topper1-0/+3
2015-01-15Replace size method call of containers to empty method where appropriateAlexander Kornienko1-1/+1
2015-01-08[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LE...Craig Topper1-1/+2
2015-01-07[X86] Remove some unused TYPE enums from the disassembler.Craig Topper1-1/+0
2015-01-06[X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.Craig Topper1-2/+4
2015-01-05[X86] Remove unused operand type from disassembler handling. NFCCraig Topper1-1/+0
2015-01-03[X86] Disassembler support for move to/from %rax with a 32-bit memory offset ...Craig Topper1-0/+4
2015-01-02[X86] Make the instructions that use AdSize16/32/64 co-exist together without...Craig Topper1-11/+30
2014-12-31[X86] Fix disassembly of absolute moves to work correctly in 16 and 32-bit mo...Craig Topper1-0/+4
2014-12-24[X86] Remove the single AdSize indicator and replace it with separate AdSize1...Craig Topper1-3/+7
2014-10-08[AVX512] Support mask register in MRMDestReg formatAdam Nemet1-0/+2
2014-10-01[X86 disasm tblegen backend] Clean up numPhysicalOperands assertsAdam Nemet1-42/+35
2014-09-06[x86] Fix a pretty horrible bug and inconsistency in the x86 asmChandler Carruth1-2/+0
2014-08-25[SKX] avx512_icmp_packed multiclass extensionRobert Khasanov1-0/+2
2014-07-31Add support for the X86 secure guard extensions instructions in assembler (SGX).Kevin Enderby1-56/+59
2014-07-28[SKX] Enabling mask logic instructions: encoding, loweringRobert Khasanov1-0/+2
2014-07-23[SKX] Enabling mask instructions: encoding, loweringRobert Khasanov1-0/+4
2014-07-21[SKX] Enabling SKX target and AVX512BW, AVX512DQ, AVX512VL features.Robert Khasanov1-0/+14
2014-07-17[X86] AVX512: Add disassembler support for compressed displacementAdam Nemet1-2/+15
2014-04-15[C++11] More 'nullptr' conversion. In some cases just using a boolean check i...Craig Topper1-1/+1
2014-02-26[x86] Simplify disassembler code slightly.Craig Topper1-4/+4
2014-02-20[x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remo...Craig Topper1-2/+1
2014-02-19Remove special FP opcode maps and instead add enough MRM_XX formats to handle...Craig Topper1-47/+46
2014-02-19Put some of the X86 formats in a more logical order.Craig Topper1-20/+20
2014-02-19Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0x...Craig Topper1-7/+6
2014-02-18Add an x86 prefix encoding for instructions that would decode to a different ...Craig Topper1-10/+38
2014-02-13Remove filtering concept from X86 disassembler table generation. It's no long...Craig Topper1-47/+14
2014-02-12Remove special case filtering for instructions with lock prefix as they are a...Craig Topper1-6/+0
2014-02-12Mark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly so they'll disappear ...Craig Topper1-6/+0
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