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path: root/llvm/utils/TableGen/CodeEmitterGen.cpp
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6 days[NFC][MC][CodeEmitterGen] Extract error reporting into a helper function ↵Rahul Joshi1-16/+7
(#159778) Extract error reporting code emitted by CodeEmitterGen into MCCodeEmitter static members functions. Additionally, remove unused ErrorHandling.h header from several files.
13 days[TableGen][CodeEmitter] Refactor addCodeToMergeInOperand (NFC) (#158674)Sergei Barannikov1-87/+31
* Use streams to avoid dealing with std::string * Print operand masks in hex * Make the output more succinct
2025-09-14[TableGen][CodeEmitterGen] Cache Target/CGH in class (NFC) (#158517)Sergei Barannikov1-37/+32
To avoid passing them to member functions.
2025-09-10[LLVM][MC][CodeEmitterGen] Reduce various `InstBits` table sizes (#156213)Rahul Joshi1-129/+127
Change various `InstBits` tables have an entry only for non-pseudo target instructions and adjust the indexing into these tables accordingly. Some minor refactoring related to this: - Use early return after handling variable length encodings - Reduce the scope of anonymous namespace to just the class declaration. Example reductions in these table sizes for some targets: ``` Target FirstSupportedOpcode Reduction in size AMDGPU 10813 10813 * 16 = 168KB RISCV 12051 12051 * 8 = 94KB ```
2025-08-30[TableGen][CodeGen] Remove DisableEncoding field of Instruction class (#156098)Sergei Barannikov1-6/+0
I believe it became no-op with the removal of the "positionally encoded operands" functionality (b87dc356 is the last commit in the series). There are no changes in the generated files.
2025-08-21[TableGen] Remove unnecessary use of utostr when writing to raw_ostream. NFC ↵Craig Topper1-7/+5
(#154800) raw_ostream is capable of printing unsigned or uint64_t directly.
2025-08-21[TableGen] Remove dummy UINT64_C(0) from end of InstBits table. NFC (#154778)Craig Topper1-1/+1
I suspect this originally existed to avoid a trailing comma from the previous entry. C++ allows trailing commas in arrays so this isn't necessary.
2025-08-12[TableGen] Use getValueAsOptionalDef to simplify code (NFC) (#153170)Sergei Barannikov1-67/+60
2025-07-07[NFC][TableGen] Rename `CodeGenTarget` instruction accessors (#146767)Rahul Joshi1-1/+1
Rename `getXYZInstructionsByEnumValue()` to just `getXYZInstructions` and drop the `ByEnumValue` in the name.
2025-06-24[LLVM][TableGen] Minor cleanup in CGIOperandList (#142721)Rahul Joshi1-5/+4
- Change `hadOperandNamed` to return index as std::optional and rename it to `findOperandNamed`. - Change `SubOperandAlias` to return std::optional and rename it to `findSubOperandAlias`.
2025-05-21[LLVM][TableGen] Use StringRef for various members ↵Rahul Joshi1-5/+6
`CGIOperandList::OperandInfo` (#140625) - Change `Name`, `SubopNames`, `PrinterMethodName`, and `EncoderMethodNames` to be stored as StringRef. - Also changed `CheckComplexPatMatcher::Name` to StringRef as a fallout from the above. Verified that all the tablegen generated files within LLVM are unchanged.
2025-05-12[NFC][TableGen] Use StringRef::str() instead of casting (#139332)Rahul Joshi1-3/+2
- Also eliminate unneeded std::string() around some literal strings.
2025-01-16[TableGen] Use std::pair instead of std::make_pair. NFC. (#123174)Jay Foad1-2/+2
Also use brace initialization and emplace to avoid explicitly constructing std::pair, and the same for std::tuple.
2024-10-29[TableGen] [NFC] Refine TableGen code to comply with `clang-tidy` checks ↵Jerry Sun1-116/+116
(#113318) Code cleanups for TableGen files, changes includes function names, variable names and unused imports. --------- Co-authored-by: Matt Arsenault <Matthew.Arsenault@amd.com>
2024-10-18[LLVM][TableGen] Change all `Init` pointers to const (#112705)Rahul Joshi1-1/+1
This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-18[LLVM][TableGen] Change CodeEmitterGen to use const RecordKeeper (#109025)Rahul Joshi1-37/+38
Change CodeEmitterGen to use const RecordKeeper. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-11[TableGen] Change CodeGenInstruction record members to const (#107921)Rahul Joshi1-2/+2
Change CodeGenInstruction::{TheDef, InfereredFrom} to const pointers. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-09[TableGen] Migrate CodeGenHWModes to use const RecordKeeper (#107851)Rahul Joshi1-4/+4
Migrate CodeGenHWModes to use const RecordKeeper and const Record pointers. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-05-04[TableGen] Use bitwise operations to access HwMode ID. (#88377)superZWT1231-23/+60
1. Bitwise operations are used to access HwMode, allowing for the coexistence of HwMode IDs for different features (such as RegInfo and EncodingInfo). This will provide better scalability for HwMode. Currently, most users utilize HwMode primarily for configuring Register-related information, and few use it for configuring Encoding. The limited scalability of HwMode has been a significant factor in this usage pattern. 2. Sink the HwMode Encodings selection logic down to per instruction level, this makes the logic for choosing encodings clearer and provides better error messages. 3. Add some HwMode ID conflict detection to the getHwMode() interface.
2024-03-25[RFC][TableGen] Restructure TableGen Source (#80847)Pierre van Houtryve1-5/+5
Refactor of the llvm-tblgen source into: - a "Basic" library, which contains the bare minimum utilities to build `llvm-min-tablegen` - a "Common" library which contains all of the helpers for TableGen backends. Such helpers can be shared by more than one backend, and even unit tested (e.g. CodeExpander is, maybe we can add more over time) Fixes #80647
2024-03-11[TableGen] More efficiency improvements for encode/decode emission. (#84647)Jason Eckhardt1-4/+1
DecoderEmitter and CodeEmitterGen perform repeated linear walks over the entire instruction list. This patch eliminates two more such walks. The eliminated traversals visit every instruction merely to determine whether the target has variable length encodings. For a target with variable length encodings, the original any_of will terminate quickly. But all targets other than M68k use fixed length encodings and thus any_of must visit the entire instruction list.
2024-02-29[TableGen] Add support for DefaultMode in per-HwMode encode/decode. (#83029)Jason Eckhardt1-4/+4
Currently the decoder and encoder emitters will crash if DefaultMode is used within an EncodingByHwMode. As can be done today for RegInfoByHwMode and ValueTypeByHwMode, this patch adds support for this usage in EncodingByHwMode: let EncodingInfos = EncodingByHwMode<[ModeA, DefaultMode], [EncA, EncDefault]>;
2024-02-14[TableGen] Stop using make_pair and make_tuple. NFC. (#81730)Jay Foad1-2/+2
These are unnecessary since C++17.
2024-02-09[NFC] clang-format utils/TableGen (#80973)Pierre van Houtryve1-17/+24
``` find llvm/utils/TableGen -iname "*.h" -o -iname "*.cpp" | xargs clang-format-16 -i ``` Split from #80847
2023-07-20[TableGen][CodeEmitterGen] Avoid empty OpNum switches in getOperandBitOffset()Ilya Leoshkevich1-1/+7
getOperandBitOffset() causes the following warning on MSVC: E:\llvm\ninja\lib\Target\SystemZ\SystemZGenMCCodeEmitter.inc(15414): warning C4060: switch statement contains no 'case' or 'default' labels Do not emit empty OpNum switches. Reviewed By: RKSimon, uweigand Differential Revision: https://reviews.llvm.org/D155805
2023-07-20[TableGen][CodeEmitterGen] Add support for querying operand bit offsetsIlya Leoshkevich1-45/+104
In order to generate relocations or to apply fixups after the layout has been computed, the targets need to know the offsets of the respective operands. There are indirect ways to figure them out in some cases, for example, on SystemZ, the first memory operand is always at offset 2, and the second one is always at offset 4. But there are no such tricks for the immediate operands on SystemZ, so one has to refer to individual instruction encodings. This information, however, is available to TableGen. Generate the getOperandBitOffset() method to access it, and use it to simplify getting memory operand offsets on SystemZ. This also paves the way for implementing symbolic immediates on this platform. For the multi-lit operands, getOperandBitOffset() returns the offset of the first lit. An alternative way to obtain offsets would be to pass them to the encoder methods, but this would require reworking all targets. Also, VarLenCodeEmitter already does this, but adopting it requires reworking the respective targets without other significant benefits. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D155329
2023-04-21[Coverity] Fix uninitialized scalar members in TableGenAkshay Khadse1-2/+2
This change fixes static code analysis warnings Reviewed By: skan Differential Revision: https://reviews.llvm.org/D148815
2023-03-21llvm-tblgen: Rewrite emitters to use `TableGen::Emitter`NAKAMURA Takumi1-8/+2
Each emitter became self-contained since it has the registration of option. Differential Revision: https://reviews.llvm.org/D144351
2023-03-21llvm-tblgen: Cleanup for each EmitterClass to be invoked by uniform signature.NAKAMURA Takumi1-1/+2
Differential Revision: https://reviews.llvm.org/D144351
2023-03-07[TableGen] Delete support for deprecated positional matching.James Y Knight1-68/+5
After the work in a538d1f13a13 5351878ba196 372240dfe3d5, and subsequently cleanup of all the in-tree targets, we can now delete the support for positional operand matching! This removes three options which could previously be set in a Target's "InstrInfo" tablegen definition: - useDeprecatedPositionallyEncodedOperands - decodePositionallyEncodedOperands - noNamedPositionallyEncodedOperands (Also announced at https://discourse.llvm.org/t/tablegen-deleting-deprecated-positional-instruction-operand-matching-support/68524) Differential Revision: https://reviews.llvm.org/D144210
2023-02-19llvm-tblgen: Add "TableGenBackends.h" to each emitter.NAKAMURA Takumi1-0/+1
"TableGenBackends.h" has declarations of emitters.
2023-02-17llvm-tblgen: Apply IWYU partiallyNAKAMURA Takumi1-2/+2
2023-01-05Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ partserge-sans-paille1-3/+2
Use deduction guides instead of helper functions. The only non-automatic changes have been: 1. ArrayRef(some_uint8_pointer, 0) needs to be changed into ArrayRef(some_uint8_pointer, (size_t)0) to avoid an ambiguous call with ArrayRef((uint8_t*), (uint8_t*)) 2. CVSymbol sym(makeArrayRef(symStorage)); needed to be rewritten as CVSymbol sym{ArrayRef(symStorage)}; otherwise the compiler is confused and thinks we have a (bad) function prototype. There was a few similar situation across the codebase. 3. ADL doesn't seem to work the same for deduction-guides and functions, so at some point the llvm namespace must be explicitly stated. 4. The "reference mode" of makeArrayRef(ArrayRef<T> &) that acts as no-op is not supported (a constructor cannot achieve that). Per reviewers' comment, some useless makeArrayRef have been removed in the process. This is a follow-up to https://reviews.llvm.org/D140896 that introduced the deduction guides. Differential Revision: https://reviews.llvm.org/D140955
2022-12-07[TableGen] More named sub-operands work.James Y Knight1-19/+16
Commit a538d1f13a13 first added support for named sub-operands in CodeEmitterGen. We now add a few more features to that, enabling further target cleanups. 1. Adds support for handling an EncoderMethod in a sub-operand in CodeEmitterGen. Previously, the specified encoder of a sub-operand was ignored, and only the default used. 2. Adds support for sub-operands in DecoderEmitter, along with support for tied sub-operands. The changes to the decoder required a few minor tweaks to a few targets, where existing brokeness was exposed. In order to keep this patch small, I left FIXMEs which will be addressed in upcoming patches. (Except MIPS16, since its object file emission/decoding is totally broken). Differential Revision: https://reviews.llvm.org/D137653
2022-09-24[TableGen] Add useDeprecatedPositionallyEncodedOperands option.James Y Knight1-18/+57
Summary: The existing undefined-bitfield-to-operand matching behavior is very hard to understand, due to the combination of positional and named matching. This can make it difficult to track down a bug in a target's instruction definitions. Over the last decade, folks have tried to work-around this in various ways, but it's time to finally ditch the positional matching. With https://reviews.llvm.org/D131003, there are no longer cases that _require_ positional matching, and it's time to start removing usage and support for it. Therefore: add a (default-false) option, and set it to true only in those targets that require positional matching today. Subsequent changes will start cleaning up additional in-tree targets. NOTE TO OUT OF TREE TARGET MAINTAINERS: If this change breaks your build, you may restore the previous behavior simply by adding: let useDeprecatedPositionallyEncodedOperands = 1; to your target's InstrInfo tablegen definition. However, this is temporary -- the option will be removed in the future. If your target does not set 'decodePositionallyEncodedOperands', you may thus start migrating to named operands. However, if you _do_ currently set that option, I recommend waiting until a subsequent change lands, which adds decoder support for named sub-operands. Differential Revision: https://reviews.llvm.org/D134073
2022-09-24[TableGen][CodeEmitterGen] Allow local names for sub-operands in a operand list.James Y Knight1-2/+5
These names can then be matched by name against 'bits' fields in a record, to populate an instruction's encoding. This does _not_ yet change DecoderEmitter to allow by-name matching of sub-operands. Unlike the encoder, the decoder already defaulted to not supporting positional matching, and backends had workarounds in place for the missing decoding support. Additionally, use this new capability to allow the ARM and AArch64 backends not to require any positional operand matching. Differential Revision: https://reviews.llvm.org/D131003
2022-09-18[TableGen] Optimize APInt |= with setBit. NFCFangrui Song1-2/+2
2022-07-14[CodeGen] Move instruction predicate verification to emitInstructionDavid Green1-133/+0
D25618 added a method to verify the instruction predicates for an emitted instruction, through verifyInstructionPredicates added into <Target>MCCodeEmitter::encodeInstruction. This is a very useful idea, but the implementation inside MCCodeEmitter made it only fire for object files, not assembly which most of the llvm test suite uses. This patch moves the code into the <Target>_MC::verifyInstructionPredicates method, inside the InstrInfo. The allows it to be called from other places, such as in this patch where it is called from the <Target>AsmPrinter::emitInstruction methods which should trigger for both assembly and object files. It can also be called from other places such as verifyInstruction, but that is not done here (it tends to catch errors earlier, but in reality just shows all the mir tests that have incorrect feature predicates). The interface was also simplified slightly, moving computeAvailableFeatures into the function so that it does not need to be called externally. The ARM, AMDGPU (but not R600), AVR, Mips and X86 backends all currently show errors in the test-suite, so have been disabled with FIXME comments. Recommitted with some fixes for the leftover MCII variables in release builds. Differential Revision: https://reviews.llvm.org/D129506
2022-07-13Revert "Move instruction predicate verification to emitInstruction"David Green1-0/+133
This reverts commit e2fb8c0f4b940e0285ee36c112469fa75d4b60ff as it does not build for Release builds, and some buildbots are giving more warning than I saw locally. Reverting to fix those issues.
2022-07-13Move instruction predicate verification to emitInstructionDavid Green1-133/+0
D25618 added a method to verify the instruction predicates for an emitted instruction, through verifyInstructionPredicates added into <Target>MCCodeEmitter::encodeInstruction. This is a very useful idea, but the implementation inside MCCodeEmitter made it only fire for object files, not assembly which most of the llvm test suite uses. This patch moves the code into the <Target>_MC::verifyInstructionPredicates method, inside the InstrInfo. The allows it to be called from other places, such as in this patch where it is called from the <Target>AsmPrinter::emitInstruction methods which should trigger for both assembly and object files. It can also be called from other places such as verifyInstruction, but that is not done here (it tends to catch errors earlier, but in reality just shows all the mir tests that have incorrect feature predicates). The interface was also simplified slightly, moving computeAvailableFeatures into the function so that it does not need to be called externally. The ARM, AMDGPU (but not R600), AVR, Mips and X86 backends all currently show errors in the test-suite, so have been disabled with FIXME comments. Differential Revision: https://reviews.llvm.org/D129506
2022-06-10[TableGen][CodeEmitterGen] Do not crash on insufficient positional ↵Ivan Kosarev1-9/+10
instruction operands. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D126288
2022-06-07[CodeEmitter] Fix encoding wide instructions on big-endian hostsJay Foad1-5/+3
For instructions wider than 64 bits the InstBits table is initialized in 64-bit chunks from APInt::getRawData, but it was being read with LoadIntFromMemory which is byte-based. Fix this by reading the table with the APInt constructor that takes an ArrayRef to the raw data instead. This is currently NFC for in-tree targets but fixes AMDGPU failures on big-endian hosts that were caused by D126483 until it was reverted. Differential Revision: https://reviews.llvm.org/D127195
2022-02-11[TableGen][CodeEmitter] Introducing the VarLenCodeEmitterGen infrastructureMin-Yih Hsu1-112/+121
Full write up: https://gist.github.com/mshockwave/66e98d099256deefc062633909bb7b5b The existing CodeEmitterGen infrastructure is unable to generate encoder function for ISAs with variable-length instructions. This patch introduces a new infrastructure to support variable-length instruction encoding, including a new TableGen syntax for writing instruction encoding directives and a new TableGen backend component, VarLenCodeEmitterGen, built on top of CodeEmitterGen. Differential Revision: https://reviews.llvm.org/D115128
2021-12-10utils: Remove some no-op raw_string_ostream flush calls, NFCDuncan P. N. Exon Smith1-1/+1
Since 65b13610a5226b84889b923bae884ba395ad084d, raw_string_ostream has been unbuffered by default. Based on an audit of llvm/utils/, this commit removes every call to `raw_string_ostream::flush()` and any call to `raw_string_ostream::str()` whose result is ignored or that doesn't help with clarity. I left behind a few calls to `str()`. In these cases, the underlying std::string was declared pretty far away and never used again, whereas stream recently had its last write. The code is easier to read as-is; the no-op call to `flush()` inside `str()` isn't harmful, and when https://reviews.llvm.org/D115421 lands it'll be gone anyway.
2021-10-05[TableGen] CodeEmitterGen - emit report_fatal_error(const char*) instead of ↵Simon Pilgrim1-2/+2
report_fatal_error(std::string&) As described on D111049, we're trying to remove the <string> dependency from error handling. In most cases the plan is to use the Twine() variant directly but to reduce introducing additional headers for the generated files, I'm using the const char* variant here instead.
2021-03-04[TableGen] Fix warning when compiling generated MCCodeEmitterJay Foad1-2/+2
This fixes an instance of: warning: cast from 'const unsigned long *' to 'unsigned char *' drops const qualifier [-Wcast-qual] when compiling the generated MCCodeEmitter for an out-of-tree target that uses the optional support for instruction widths > 64 bits. Differential Revision: https://reviews.llvm.org/D97942
2021-02-11[TableGen] Make the map in InfoByHwMode protected. NFCICraig Topper1-2/+2
Switch some for loops to just use the begin()/end() implementations in the InfoByHwMode struct. Add a method to insert into the map for the one case that was modifying the map directly.
2021-02-01[TableGen] Use range-based for loops (NFC)Kazu Hirata1-3/+1
2021-01-07[TableGen] Add field kind to the RecordVal class.Paul C. Anagnostopoulos1-1/+1
Differential Revision: https://reviews.llvm.org/D93969
2020-11-06[TableGen] Indentation and whitespace fixes in generated code. NFC.Jay Foad1-3/+3
Some of these were found by running clang-format over the generated code, although that complains about far more issues than I have fixed here. Differential Revision: https://reviews.llvm.org/D90937