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path: root/llvm/utils/TableGen/CodeEmitterGen.cpp
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2014-09-02Reinstate "Nuke the old JIT."Eric Christopher1-20/+6
Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reinstates commits r215111, 215115, 215116, 215117, 215136. llvm-svn: 216982
2014-08-07Temporarily Revert "Nuke the old JIT." as it's not quite ready toEric Christopher1-6/+20
be deleted. This will be reapplied as soon as possible and before the 3.6 branch date at any rate. Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reverts commits r215111, 215115, 215116, 215117, 215136. llvm-svn: 215154
2014-08-07Nuke the old JIT.Rafael Espindola1-20/+6
I am sure we will be finding bits and pieces of dead code for years to come, but this is a good start. Thanks to Lang Hames for making MCJIT a good replacement! llvm-svn: 215111
2014-06-26Revert "Introduce a string_ostream string builder facilty"Alp Toker1-1/+2
Temporarily back out commits r211749, r211752 and r211754. llvm-svn: 211814
2014-06-26Introduce a string_ostream string builder faciltyAlp Toker1-2/+1
string_ostream is a safe and efficient string builder that combines opaque stack storage with a built-in ostream interface. small_string_ostream<bytes> additionally permits an explicit stack storage size other than the default 128 bytes to be provided. Beyond that, storage is transferred to the heap. This convenient class can be used in most places an std::string+raw_string_ostream pair or SmallString<>+raw_svector_ostream pair would previously have been used, in order to guarantee consistent access without byte truncation. The patch also converts much of LLVM to use the new facility. These changes include several probable bug fixes for truncated output, a programming error that's no longer possible with the new interface. llvm-svn: 211749
2014-03-23remove a bunch of unused private methodsNuno Lopes1-2/+0
found with a smarter version of -Wunused-member-function that I'm playwing with. Appologies in advance if I removed someone's WIP code. include/llvm/CodeGen/MachineSSAUpdater.h | 1 include/llvm/IR/DebugInfo.h | 3 lib/CodeGen/MachineSSAUpdater.cpp | 10 -- lib/CodeGen/PostRASchedulerList.cpp | 1 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 -- lib/IR/DebugInfo.cpp | 12 -- lib/MC/MCAsmStreamer.cpp | 2 lib/Support/YAMLParser.cpp | 39 --------- lib/TableGen/TGParser.cpp | 16 --- lib/TableGen/TGParser.h | 1 lib/Target/AArch64/AArch64TargetTransformInfo.cpp | 9 -- lib/Target/ARM/ARMCodeEmitter.cpp | 12 -- lib/Target/ARM/ARMFastISel.cpp | 84 -------------------- lib/Target/Mips/MipsCodeEmitter.cpp | 11 -- lib/Target/Mips/MipsConstantIslandPass.cpp | 12 -- lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 21 ----- lib/Target/NVPTX/NVPTXISelDAGToDAG.h | 2 lib/Target/PowerPC/PPCFastISel.cpp | 1 lib/Transforms/Instrumentation/AddressSanitizer.cpp | 2 lib/Transforms/Instrumentation/BoundsChecking.cpp | 2 lib/Transforms/Instrumentation/MemorySanitizer.cpp | 1 lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 8 - lib/Transforms/Scalar/SCCP.cpp | 1 utils/TableGen/CodeEmitterGen.cpp | 2 24 files changed, 2 insertions(+), 261 deletions(-) llvm-svn: 204560
2014-03-22[TableGen] Don't assert, produce an error, when an instruction has too few ↵Hal Finkel1-1/+12
operands When an instruction's operand list does not have a sufficient number of operands to match with all of the variables that contribute to its encoding, instead of asserting inside a call to getSubOperandNumber, produce an informative error. llvm-svn: 204542
2014-03-13[TableGen] Optionally forbid overlap between named and positional operandsHal Finkel1-2/+22
There are currently two schemes for mapping instruction operands to instruction-format variables for generating the instruction encoders and decoders for the assembler and disassembler respectively: a) to map by name and b) to map by position. In the long run, we'd like to remove the position-based scheme and use only name-based mapping. Unfortunately, the name-based scheme currently cannot deal with complex operands (those with suboperands), and so we currently must use the position-based scheme for those. On the other hand, the position-based scheme cannot deal with (register) variables that are split into multiple ranges. An upcoming commit to the PowerPC backend (adding VSX support) will require this capability. While we could teach the position-based scheme to handle that, since we'd like to move away from the position-based mapping generally, it seems silly to teach it new tricks now. What makes more sense is to allow for partial transitioning: use the name-based mapping when possible, and only use the position-based scheme when necessary. Now the problem is that mixing the two sensibly was not possible: the position-based mapping would map based on position, but would not skip those variables that were mapped by name. Instead, the two sets of assignments would overlap. However, I cannot currently change the current behavior, because there are some backends that rely on it [I think mistakenly, but I'll send a message to llvmdev about that]. So I've added a new TableGen bit variable: noNamedPositionallyEncodedOperands, that can be used to cause the position-based mapping to skip variables mapped by name. llvm-svn: 203767
2014-01-28Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()David Woodhouse1-5/+10
llvm-svn: 200349
2013-12-17Support little-endian encodings in the FixedLenDecoderEmitterHal Finkel1-37/+1
The convention used to specify the PowerPC ISA is that bits are numbered in reverse order (0 is the index of the high bit). To support this "little endian" encoding convention, CodeEmitterGen will reverse the bit numberings prior to generating the encoding tables. In order to generate a disassembler, FixedLenDecoderEmitter needs to do the same. This moves the bit reversal logic out of CodeEmitterGen and into CodeGenTarget (where it can be used by both CodeEmitterGen and FixedLenDecoderEmitter). This is prep work for disassembly support in the PPC backend (which is the only in-tree user of this little-endian encoding support). llvm-svn: 197532
2012-12-04Sort the #include lines for utils/...Chandler Carruth1-1/+1
I've tried to find main moudle headers where possible, but the TableGen stuff may warrant someone else looking at it. llvm-svn: 169251
2012-11-09Fix issue with invalid flat operand numberEvandro Menezes1-3/+1
Avoid iterating over list of operands beyond the number of operands in it. PS: this fixes issue with revision #167634. llvm-svn: 167635
2012-11-09Fix issue with invalid flat operand numberEvandro Menezes1-1/+6
Avoid iterating over list of operands beyond the number of operands in it. llvm-svn: 167634
2012-10-10tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.Sean Silva1-4/+4
Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>. That will happen in a future patch. There are also two dyn_cast_or_null<>'s slipped in instead of dyn_cast<>'s, since they were causing crashes with just dyn_cast<>. llvm-svn: 165646
2012-09-06Re-work bit/bits value resolving in tblgenMichael Liao1-1/+1
- This patch is inspired by the failure of the following code snippet which is used to convert enumerable values into encoding bits to improve the readability of td files. class S<int s> { bits<2> V = !if(!eq(s, 8), {0, 0}, !if(!eq(s, 16), {0, 1}, !if(!eq(s, 32), {1, 0}, !if(!eq(s, 64), {1, 1}, {?, ?})))); } Later, PR8330 is found to report not exactly the same bug relevant issue to bit/bits values. - Instead of resolving bit/bits values separately through resolveBitReference(), this patch adds getBit() for all Inits and resolves bit value by resolving plus getting the specified bit. This unifies the resolving of bit with other values and removes redundant logic for resolving bit only. In addition, BitsInit::resolveReferences() is optimized to take advantage of this origanization by resolving VarBitInit's variable reference first and then getting bits from it. - The type interference in '!if' operator is revised to support possible combinations of int and bits/bit in MHS and RHS. - As there may be illegal assignments from integer value to bit, says assign 2 to a bit, but we only check this during instantiation in some cases, e.g. bit V = !if(!eq(x, 17), 0, 2); Verbose diagnostic message is generated when invalid value is resolveed to help locating the error. - PR8330 is fixed as well. llvm-svn: 163360
2012-06-11Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen1-2/+35
The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! llvm-svn: 158311
2012-03-09TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask.NAKAMURA Takumi1-1/+1
~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF. llvm-svn: 152407
2012-03-06Fix support for encodings up to 64-bits in length. TableGen was silently ↵Owen Anderson1-6/+6
truncating them to 32-bits prior to this. llvm-svn: 152148
2012-01-24Widen the instruction encoder that TblGen emits to a 64 bits, which should ↵Owen Anderson1-7/+7
accomodate every target I can think of offhand. llvm-svn: 148833
2011-10-01Move TableGen's parser and entry point into a libraryPeter Collingbourne1-1/+1
This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951
2011-07-29Unconstify InitsDavid Greene1-13/+13
Remove const qualifiers from Init references, per Chris' request. llvm-svn: 136531
2011-07-29[AVX] Create Inits Via Factory MethodDavid Greene1-1/+1
Replace uses of new *Init with *Init::get. This hides the allocation implementation so that we can unique Inits in various ways. llvm-svn: 136486
2011-07-29[AVX] Constify InitsDavid Greene1-13/+13
Make references to Inits const everywhere. This is the final step before making them unique. llvm-svn: 136485
2011-07-29[AVX] Remove Mutating Members from InitsDavid Greene1-4/+8
Get rid of all Init members that modify internal state. This is in preparation for making references to Inits const. llvm-svn: 136483
2011-07-11Revert r134921, 134917, 134908 and 134907. They're causing failuresEric Christopher1-22/+16
in multiple buildbots. llvm-svn: 134936
2011-07-11Use get(0 Instead of Create()David Greene1-1/+1
Respond to some feedback asking for a name change. llvm-svn: 134921
2011-07-11[AVX] Make Inits FoldableDavid Greene1-16/+22
Manage Inits in a FoldingSet. This provides several benefits: - Memory for Inits is properly managed - Duplicate Inits are folded into Flyweights, saving memory - It enforces const-correctness, protecting against certain classes of bugs The above benefits allow Inits to be used in more contexts, which in turn provides more dynamism to TableGen. This enhanced capability will be used by the AVX code generator to a fold common patterns together. llvm-svn: 134907
2011-07-06Don't require pseudo-instructions to carry encoding information.Jim Grosbach1-3/+6
For now this is distinct from isCodeGenOnly, as code-gen-only instructions can (and often do) still have encoding information associated with them. Once we've migrated all of them over to true pseudo-instructions that are lowered to real instructions prior to the printer/emitter, we can remove isCodeGenOnly and just use isPseudo. llvm-svn: 134539
2011-04-28Fix a bug in tblgen that caused incorrect encodings on instructions that ↵Owen Anderson1-1/+5
specified operands with "bit" instead of "bits<1>". Unfortunately, my only testcase for this is fragile, and the ARM AsmParser can't round trip the instruction in question. <rdar://problem/9345702> llvm-svn: 130410
2011-02-03Tidy up a bit.Jim Grosbach1-3/+3
llvm-svn: 124832
2011-01-27Fix a comment typo.Bob Wilson1-1/+1
llvm-svn: 124450
2010-12-23Change all self assignments X=X to (void)X, so that we can turn on aJeffrey Yasskin1-1/+1
new gcc warning that complains on self-assignments and self-initializations. llvm-svn: 122458
2010-12-13Move <map> include out of .h and into .cpp.Bill Wendling1-0/+1
llvm-svn: 121661
2010-12-13eliminate the Records global variable, patch by Garrison Venn!Chris Lattner1-1/+1
llvm-svn: 121659
2010-11-15pull the code to get the operand value out of the loop.Chris Lattner1-48/+58
llvm-svn: 119130
2010-11-15split the giant encoder loop into two new helper functions.Chris Lattner1-112/+122
llvm-svn: 119129
2010-11-15reduce nesting and minor cleanups, no functionality change.Chris Lattner1-87/+88
llvm-svn: 119128
2010-11-15add fields to the .td files unconditionally, simplifying tblgen a bit.Chris Lattner1-3/+3
Switch the ARM backend to use 'let' instead of 'set' with this change. llvm-svn: 119120
2010-11-11Add support for specifying a PostEncoderMethod, which can perform ↵Owen Anderson1-0/+4
post-processing after the automated encoding of an instruction. Not yet used. llvm-svn: 118759
2010-11-03Support generating an MC'ized CodeEmitter directly. Maintain a reference to theJim Grosbach1-5/+18
Fixups list for the instruction so the operand encoders can add to it as needed. llvm-svn: 118206
2010-11-02Revert r114340 (improvements in Darwin function prologue/epilogue), as it brokeJim Grosbach1-0/+6
assumptions about stack layout. Specifically, LR must be saved next to FP. llvm-svn: 118026
2010-11-02Tidy up.Jim Grosbach1-3/+0
llvm-svn: 117987
2010-11-01factor the operand list (and related fields/operations) out of Chris Lattner1-6/+7
CodeGenInstruction into its own helper class. No functionality change. llvm-svn: 117893
2010-10-12Allow targets to optionally specify custom binary encoder functions forJim Grosbach1-5/+20
operand values. This is useful for operands which require additional trickery to encode into the instruction. For example, the ARM shifted immediate and shifted register operands. llvm-svn: 116353
2010-10-11The assert() should reference to machine instr operand number, too.Jim Grosbach1-2/+2
llvm-svn: 116243
2010-10-11Make sure to use the machine instruction operand number. It doesn't alwaysJim Grosbach1-0/+2
map one-to-one with the CodeGenInstruction operand number. llvm-svn: 116238
2010-10-11When figuring out which operands match which encoding fields in an instruction,Jim Grosbach1-6/+17
try to match them by name first. If there is no by-name match, fall back to assuming they are in order (this was the previous behavior). llvm-svn: 116211
2010-10-08Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.Jim Grosbach1-1/+1
llvm-svn: 116018
2010-10-07trailing whitespaceJim Grosbach1-17/+17
llvm-svn: 115923
2010-07-02Clean up TargetOpcodes.h a bit, and limit the number of places where the fullJakob Stoklund Olesen1-40/+5
list of predefined instructions appear. Add some consistency checks. Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it is hardly worth the effort. llvm-svn: 107520
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