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29 hours[AMDPGU] Auto-upgrade ELF mangling in the data layout (#163644)Joseph Huber1-25/+26
Summary: The changes in https://github.com/llvm/llvm-project/pull/163011 caused all ELF platforms to default to ELF mangling. We want to auto upgrade this for linking in new programs to old ones.
2025-05-19[AMDGPU] Set AS8 address width to 48 bitsAlexander Richardson1-23/+32
Of the 128-bits of buffer descriptor only 48 bits are address bits, so following the discussion on https://discourse.llvm.org/t/clarifiying-the-semantics-of-ptrtoint/83987/54, the logic conclusion is to set the index width to 48 bits instead of the current value of 128. Most of the test changes are mechanical datalayout updates, but there is one actual change: the ptrmask test now uses .i48 instead of .i128 and I had to update SelectionDAGBuilder to correctly extend the mask. Reviewed By: krzysz00 Pull Request: https://github.com/llvm/llvm-project/pull/139419
2024-12-10[WebAssembly] Add `-i128:128` to the `datalayout` string. (#119204)Dan Gohman1-0/+12
Clang [defaults to aligning `__int128_t` to 16 bytes], while LLVM `datalayout` strings [default to aligning `i128` to 8 bytes]. Wasm is currently using the defaults for both, so it's inconsistent. Fix this by adding `-i128:128` to Wasm's `datalayout` string so that it aligns `i128` to 16 bytes too. This is similar to [llvm/llvm-project@dbad963](https://github.com/llvm/llvm-project/commit/dbad963a69fd7b16c6838f81b61167fbf00a413c) for SPARC. This fixes rust-lang/rust#133991; see that issue for further discussion. [defaults to aligning `__int128_t` to 16 bytes]: https://github.com/llvm/llvm-project/blob/f8b4182f076f8fe55f9d5f617b5a25008a77b22f/clang/lib/Basic/TargetInfo.cpp#L77 [default to aligning `i128` to 8 bytes]: https://llvm.org/docs/LangRef.html#langref-datalayout
2024-12-09[PowerPC] Update data layout aligment of i128 to 16 (#118004)Lei Huang1-3/+18
Fix 64-bit PowerPC part of https://github.com/llvm/llvm-project/issues/102783.
2024-11-06[MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)yingopq1-0/+12
Fix parts of #102783.
2024-10-15[clang][aarch64] Add support for the MSVC qualifiers __ptr32, __ptr64, ↵Daniel Paoliello1-3/+10
__sptr, __uptr for AArch64 (#111879) MSVC has a set of qualifiers to allow using 32-bit signed/unsigned pointers when building 64-bit targets. This is useful for WoW code (i.e., the part of Windows that handles running 32-bit application on a 64-bit OS). Currently this is supported on x64 using the 270, 271 and 272 address spaces, but does not work for AArch64 at all. This change adds the same 270, 271 and 272 address spaces to AArch64 and adjusts the data layout string accordingly. Clang will generate the correct address space casts, but these will currently be ignored until the AArch64 backend is updated to handle them. Partially fixes #62536 This is a resurrected version of <https://reviews.llvm.org/D158857> (originally created by @a_vorobev) - I've cleaned it up a little, fixed the rest of the tests and added to auto-upgrade for the data layout.
2024-09-30[SPARC] Align i128 to 16 bytes in SPARC datalayouts (#106951)Koakuma1-0/+7
Align i128s to 16 bytes, following the example at https://reviews.llvm.org/D86310. clang already does this implicitly, but do it in backend code too for the benefit of other frontends (see e.g https://github.com/llvm/llvm-project/issues/102783 & https://github.com/rust-lang/rust/issues/128950).
2024-09-13[llvm][unittests] Strip unneeded uses of raw_string_ostream::str() (NFC)JOE19941-1/+1
Avoid excess layer of indirection.
2024-06-06[LoongArch] Adjust LA64 data layout by using n32:64 in layout string (#93814)hev1-0/+5
Although i32 type is illegal in the backend, LA64 has pretty good support for i32 types by using W instructions. By adding n32 to the DataLayout string, middle end optimizations will consider i32 to be a native type. One known effect of this is enabling LoopStrengthReduce on loops with i32 induction variables. This can be beneficial because C/C++ code often has loops with i32 induction variables due to the use of `int` or `unsigned int`. If this patch exposes performance issues, those are better addressed by tuning LSR or other passes.
2024-05-05[clang backend] In AArch64's DataLayout, specify a minimum function ↵Doug Wyatt1-3/+6
alignment of 4. (#90702) This addresses an issue where the explicit alignment of 2 (for C++ ABI reasons) was being propagated to the back end and causing under-aligned functions (in special sections). This is an alternate approach suggested by @efriedma-quic in PR #90415. Fixes #90358
2024-04-16[clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (#88455)Alex Voicu1-0/+27
Currently neither the SPIR nor the SPIRV targets specify the AS for globals in their datalayout strings. This is problematic because CodeGen/LLVM will default to AS0 in this case, which produces Globals that end up in the private address space for e.g. OCL, HIPSPV or SYCL. This patch addresses it by completing the datalayout string.
2024-04-10[FPEnv][BitcodeReader] Correct strictfp test.Kevin P. Neal1-1/+1
Correct a strictfp test to follow the rules documented in the LangRef: https://llvm.org/docs/LangRef.html#constrained-floating-point-intrinsics This test needed the strictfp attribute added to a function definition. Test changes verified with D146845.
2023-12-15[AMDGPU] - Add address space for strided buffers (#74471)Jessica Del1-15/+21
This is an experimental address space for strided buffers. These buffers can have structs as elements and a stride > 1. These pointers allow the indexed access in units of stride, i.e., they point at `buffer[index * stride]`. Thus, we can use the `idxen` modifier for buffer loads. We assign address space 9 to 192-bit buffer pointers which contain a 128-bit descriptor, a 32-bit offset and a 32-bit index. Essentially, they are fat buffer pointers with an additional 32-bit index.
2023-11-10[llvm] Stop including llvm/ADT/MapVector.h (NFC)Kazu Hirata1-1/+0
Identified with clangd.
2023-10-11[X86] Align i128 to 16 bytes in x86 datalayoutsHarald van Dijk1-18/+21
This is an attempt at rebooting https://reviews.llvm.org/D28990 I've included AutoUpgrade changes to modify the data layout to satisfy the compatible layout check. But this does mean alloca, loads, stores, etc in old IR will automatically get this new alignment. This should fix PR46320. Reviewed By: echristo, rnk, tmgross Differential Revision: https://reviews.llvm.org/D86310
2023-05-03Re-land "[AMDGPU] Define data layout entries for buffers""Krzysztof Drewniak1-5/+35
Re-land D145441 with data layout upgrade code fixed to not break OpenMP. This reverts commit 3f2fbe92d0f40bcb46db7636db9ec3f7e7899b27. Differential Revision: https://reviews.llvm.org/D149776
2023-05-03Revert "[AMDGPU] Define data layout entries for buffers"Krzysztof Drewniak1-29/+5
This reverts commit f9c1ede2543b37fabe9f2d8f8fed5073c475d850. Differential Revision: https://reviews.llvm.org/D149758
2023-05-03[AMDGPU] Define data layout entries for buffersKrzysztof Drewniak1-5/+29
Per discussion at https://discourse.llvm.org/t/representing-buffer-descriptors-in-the-amdgpu-target-call-for-suggestions/68798, we define two new address spaces for AMDGCN targets. The first is address space 7, a non-integral address space (which was already in the data layout) that has 160-bit pointers (which are 256-bit aligned) and uses a 32-bit offset. These pointers combine a 128-bit buffer descriptor and a 32-bit offset, and will be usable with normal LLVM operations (load, store, GEP). However, they will be rewritten out of existence before code generation. The second of these is address space 8, the address space for "buffer resources". These will be used to represent the resource arguments to buffer instructions, and new buffer intrinsics will be defined that take them instead of <4 x i32> as resource arguments. ptr addrspace(8). These pointers are 128-bits long (with the same alignment). They must not be used as the arguments to getelementptr or otherwise used in address computations, since they can have arbitrarily complex inherent addressing semantics that can't be represented in LLVM. Even though, like their address space 7 cousins, these pointers have deterministic ptrtoint/inttoptr semantics, they are defined to be non-integral in order to prevent optimizations that rely on pointers being a [0, [addr_max]] value from applying to them. Future work includes: - Defining new buffer intrinsics that take ptr addrspace(8) resources. - A late rewrite to turn address space 7 operations into buffer intrinsics and offset computations. This commit also updates the "fallback address space" for buffer intrinsics to the buffer resource, and updates the alias analysis table. Depends on D143437 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D145441
2023-01-18[BitcodeReader] Allow reading pointer types from old IRSebastian Neubauer2-0/+449
When opaque pointers are enabled and old IR with typed pointers is read, the BitcodeReader automatically upgrades all typed pointers to opaque pointers. This is a lossy conversion, i.e. when a function argument is a pointer and unused, it’s impossible to reconstruct the original type behind the pointer. There are cases where the type information of pointers is needed. One is reading DXIL, which is bitcode of old LLVM IR and makes a lot of use of pointers in function signatures. We’d like to keep using up-to-date llvm to read in and process DXIL, so in the face of opaque pointers, we need some way to access the type information of pointers from the read bitcode. This patch allows extracting type information by supplying functions to parseBitcodeFile that get called for each function signature or metadata value. The function can access the type information via the reader’s type IDs and the getTypeByID and getContainedTypeID functions. The tests exemplarily shows how type info from pointers can be stored in metadata for use after the BitcodeReader finished. Differential Revision: https://reviews.llvm.org/D127728
2023-01-18Revert "[BitcodeReader] Allow reading pointer types from old IR"Nikita Popov1-204/+0
This reverts commit b56df190b01335506ce30a4559d880da76d1a181. The unit tests are implemented in a way that requires support for writing typed pointer bitcode, which is going away soon. Please rewrite it in a way that not have requirement, e.g. by shipping pre-compiled bitcode, as we do for integration tests.
2023-01-17[BitcodeReader] Allow reading pointer types from old IRSebastian Neubauer1-0/+204
When opaque pointers are enabled and old IR with typed pointers is read, the BitcodeReader automatically upgrades all typed pointers to opaque pointers. This is a lossy conversion, i.e. when a function argument is a pointer and unused, it’s impossible to reconstruct the original type behind the pointer. There are cases where the type information of pointers is needed. One is reading DXIL, which is bitcode of old LLVM IR and makes a lot of use of pointers in function signatures. We’d like to keep using up-to-date llvm to read in and process DXIL, so in the face of opaque pointers, we need some way to access the type information of pointers from the read bitcode. This patch allows extracting type information by supplying functions to parseBitcodeFile that get called for each function signature or metadata value. The function can access the type information via the reader’s type IDs and the getTypeByID and getContainedTypeID functions. The tests exemplarily shows how type info from pointers can be stored in metadata for use after the BitcodeReader finished. Differential Revision: https://reviews.llvm.org/D127728
2022-10-28[RISCV] Adjust RV64I data layout by using n32:64 in layout stringCraig Topper1-0/+5
Although i32 type is illegal in the backend, RV64I has pretty good support for i32 types by using W instructions. By adding n32 to the DataLayout string, middle end optimizations will consider i32 to be a native type. One known effect of this is enabling LoopStrengthReduce on loops with i32 induction variables. This can be beneficial because C/C++ code often has loops with i32 induction variables due to the use of `int` or `unsigned int`. If this patch exposes performance issues, those are better addressed by tuning LSR or other passes. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D116735
2022-01-23[X86][MS] Change the alignment of f80 to 16 bytes on Windows 32bits to match ↵Phoebe Wang1-1/+1
with ICC MSVC currently doesn't support 80 bits long double. ICC supports it when the option `/Qlong-double` is specified. Changing the alignment of f80 to 16 bytes so that we can be compatible with ICC's option. Reviewed By: rnk, craig.topper Differential Revision: https://reviews.llvm.org/D115942
2022-01-15Revert "[X86][MS] Change the alignment of f80 to 16 bytes on Windows 32bits ↵Phoebe Wang1-1/+1
to match with ICC" This reverts commit 1bb0caf561688681be67cc91560348c9e43fcbf3.
2022-01-12[X86][MS] Change the alignment of f80 to 16 bytes on Windows 32bits to match ↵Phoebe Wang1-1/+1
with ICC MSVC currently doesn't support 80 bits long double. ICC supports it when the option `/Qlong-double` is specified. Changing the alignment of f80 to 16 bytes so that we can be compatible with ICC's option. Reviewed By: rnk, craig.topper Differential Revision: https://reviews.llvm.org/D115942
2020-11-20[AMDGPU] Set the default globals address space to 1Alex Richardson1-0/+15
This will ensure that passes that add new global variables will create them in address space 1 once the passes have been updated to no longer default to the implicit address space zero. This also changes AutoUpgrade.cpp to add -G1 to the DataLayout if it wasn't already to present to ensure bitcode backwards compatibility. Reviewed by: arsenm Differential Revision: https://reviews.llvm.org/D84345
2020-06-15[strictfp] Replace dangling strictfp attrs with nobuiltinKevin P. Neal1-0/+65
In preparation for a patch that will enforce new rules for the usage of the strictfp attribute, this patch introduces auto-upgrade behavior that will replace the strictfp attribute on callsites with nobuiltin if the enclosing function declaration doesn't also have the strictfp attribute. This auto-upgrade isn't being performed on .ll files because that would prevent us from writing a test for the forthcoming verifier behavior. Differential Revision: https://reviews.llvm.org/D70096
2019-09-18Add AutoUpgrade function to add new address space datalayout string to ↵Amy Huang2-0/+60
existing datalayouts. Summary: Add function to AutoUpgrade to change the datalayout of old X86 datalayout strings. This adds "-p270:32:32-p271:32:32-p272:64:64" to X86 datalayouts that are otherwise valid and don't already contain it. This also removes the compatibility changes in https://reviews.llvm.org/D66843. Datalayout change in https://reviews.llvm.org/D64931. Reviewers: rnk, echristo Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67631 llvm-svn: 372267
2019-07-03[Bitcode] Move Bitstream to a separate libraryFrancis Visoiu Mistrih3-227/+0
This moves Bitcode/Bitstream*, Bitcode/BitCodes.h to Bitstream/. This is needed to avoid a circular dependency when using the bitstream code for parsing optimization remarks. Since Bitcode uses Core for the IR part: libLLVMRemarks -> Bitcode -> Core and Core uses libLLVMRemarks to generate remarks (see IR/RemarkStreamer.cpp): Core -> libLLVMRemarks we need to separate the Bitstream and Bitcode part. For clang-doc, it seems that it doesn't need the whole bitcode layer, so I updated the CMake to only use the bitstream part. Differential Revision: https://reviews.llvm.org/D63899 llvm-svn: 365091
2019-06-26BitStream reader: propagate errorsJF Bastien1-11/+25
The bitstream reader handles errors poorly. This has two effects: * Bugs in file handling (especially modules) manifest as an "unexpected end of file" crash * Users of clang as a library end up aborting because the code unconditionally calls `report_fatal_error` The bitstream reader should be more resilient and return Expected / Error as soon as an error is encountered, not way late like it does now. This patch starts doing so and adopting the error handling where I think it makes sense. There's plenty more to do: this patch propagates errors to be minimally useful, and follow-ups will propagate them further and improve diagnostics. https://bugs.llvm.org/show_bug.cgi?id=42311 <rdar://problem/33159405> Differential Revision: https://reviews.llvm.org/D63518 llvm-svn: 364464
2019-01-20Replace llvm::isPodLike<...> by llvm::is_trivially_copyable<...>Serge Guelton1-0/+3
As noted in https://bugs.llvm.org/show_bug.cgi?id=36651, the specialization for isPodLike<std::pair<...>> did not match the expectation of std::is_trivially_copyable which makes the memcpy optimization invalid. This patch renames the llvm::isPodLike trait into llvm::is_trivially_copyable. Unfortunately std::is_trivially_copyable is not portable across compiler / STL versions. So a portable version is provided too. Note that the following specialization were invalid: std::pair<T0, T1> llvm::Optional<T> Tests have been added to assert that former specialization are respected by the standard usage of llvm::is_trivially_copyable, and that when a decent version of std::is_trivially_copyable is available, llvm::is_trivially_copyable is compared to std::is_trivially_copyable. As of this patch, llvm::Optional is no longer considered trivially copyable, even if T is. This is to be fixed in a later patch, as it has impact on a long-running bug (see r347004) Note that GCC warns about this UB, but this got silented by https://reviews.llvm.org/D50296. Differential Revision: https://reviews.llvm.org/D54472 llvm-svn: 351701
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth3-12/+9
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
2018-02-14Pass a reference to a module to the bitcode writer.Rafael Espindola1-1/+1
This simplifies most callers as they are already using references or std::unique_ptr. llvm-svn: 325155
2017-12-13Remove redundant includes from unittests.Michael Zolotukhin1-4/+0
llvm-svn: 320630
2017-06-06Re-sort #include lines for unittests. This uses a slightly modifiedChandler Carruth2-2/+2
clang-format (https://reviews.llvm.org/D33932) to keep primary headers at the top and handle new utility headers like 'gmock' consistently with other utility headers. No other change was made. I did no manual edits, all of this is clang-format. This should allow other changes to have more clear and focused diffs, and is especially motivated by moving some headers into more focused libraries. llvm-svn: 304786
2017-01-04Reapply "Make BitCodeAbbrev ownership explicit using shared_ptr rather than ↵David Blaikie1-2/+2
IntrusiveRefCntPtr"" If this is a problem for anyone (shared_ptr is two pointers in size, whereas IntrusiveRefCntPtr is 1 - and the ref count control block that make_shared adds is probably larger than the one int in RefCountedBase) I'd prefer to address this by adding a lower-overhead version of shared_ptr (possibly refactoring IntrusiveRefCntPtr into such a thing) to avoid the intrusiveness - this allows memory ownership to remain orthogonal to types and at least to me, seems to make code easier to understand (since no implicit ownership acquisition can happen). This recommits 291006, reverted in r291007. llvm-svn: 291016
2017-01-04Revert "Make BitCodeAbbrev ownership explicit using shared_ptr rather than ↵David Blaikie1-2/+2
IntrusiveRefCntPtr" Breaks Clang's use of bitcode. Reverting until I have a fix to go with it there. This reverts commit r291006. llvm-svn: 291007
2017-01-04Make BitCodeAbbrev ownership explicit using shared_ptr rather than ↵David Blaikie1-2/+2
IntrusiveRefCntPtr If this is a problem for anyone (shared_ptr is two pointers in size, whereas IntrusiveRefCntPtr is 1 - and the ref count control block that make_shared adds is probably larger than the one int in RefCountedBase) I'd prefer to address this by adding a lower-overhead version of shared_ptr (possibly refactoring IntrusiveRefCntPtr into such a thing) to avoid the intrusiveness - this allows memory ownership to remain orthogonal to types and at least to me, seems to make code easier to understand (since no implicit ownership acquisition can happen). llvm-svn: 291006
2016-11-13Bitcode: Change module reader functions to return an llvm::Expected.Peter Collingbourne1-1/+3
Differential Revision: https://reviews.llvm.org/D26562 llvm-svn: 286752
2016-11-11Split Bitcode/ReaderWriter.h into separate reader and writer headersTeresa Johnson1-2/+3
Summary: Split ReaderWriter.h which contains the APIs into both the BitReader and BitWriter libraries into BitcodeReader.h and BitcodeWriter.h. This is to address Chandler's concern about sharing the same API header between multiple libraries (BitReader and BitWriter). That concern is why we create a single bitcode library in our downstream build of clang, which led to r286297 being reverted as it added a dependency that created a cycle only when there is a single bitcode library (not two as in upstream). Reviewers: mehdi_amini Subscribers: dlj, mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D26502 llvm-svn: 286566
2016-11-09Bitcode: Change the materializer interface to return llvm::Error.Peter Collingbourne1-4/+5
Differential Revision: https://reviews.llvm.org/D26439 llvm-svn: 286382
2016-11-08IR, Bitcode: Change bitcode reader to no longer own its memory buffer.Peter Collingbourne1-3/+1
Unique ownership is just one possible ownership pattern for the memory buffer underlying the bitcode reader. In practice, as this patch shows, ownership can often reside at a higher level. With the upcoming change to allow multiple modules in a single bitcode file, it will no longer be appropriate for modules to generally have unique ownership of their memory buffer. The C API exposes the ownership relation via the LLVMGetBitcodeModuleInContext and LLVMGetBitcodeModuleInContext2 functions, so we still need some way for the module to own the memory buffer. This patch does so by adding an owned memory buffer field to Module, and using it in a few other places where it is convenient. Differential Revision: https://reviews.llvm.org/D26384 llvm-svn: 286214
2016-11-08Bitcode: Decouple block info block state from reader.Peter Collingbourne1-27/+8
As proposed on llvm-dev: http://lists.llvm.org/pipermail/llvm-dev/2016-October/106630.html Move block info block state to a new class, BitstreamBlockInfo. Clients may set the block info for a particular cursor with the BitstreamCursor::setBlockInfo() method. At this point BitstreamReader is not much more than a container for an ArrayRef<uint8_t>, so remove it and replace all uses with direct uses of memory buffers. Differential Revision: https://reviews.llvm.org/D26259 llvm-svn: 286207
2016-11-02Bitcode: Fix short read implementation.Peter Collingbourne1-0/+9
We need to zero extend the byte in order to correctly shift it into a 64-bit value. llvm-svn: 285785
2016-11-02Bitcode: Change reader interface to take memory buffers.Peter Collingbourne2-170/+11
As proposed on llvm-dev: http://lists.llvm.org/pipermail/llvm-dev/2016-October/106595.html This change also fixes an API oddity where BitstreamCursor::Read() would return zero for the first read past the end of the bitstream, but would report_fatal_error for subsequent reads. Now we always report_fatal_error for all reads past the end. Updated clients to check for the end of the bitstream before reading from it. I also needed to add padding to the invalid bitcode tests in test/Bitcode/. This is because the streaming interface was not checking that the file size is a multiple of 4. Differential Revision: https://reviews.llvm.org/D26219 llvm-svn: 285773
2016-04-14Remove every uses of getGlobalContext() in LLVM (but the C API)Mehdi Amini1-5/+5
At the same time, fixes InstructionsTest::CastInst unittest: yes you can leave the IR in an invalid state and exit when you don't destroy the context (like the global one), no longer now. This is the first part of http://reviews.llvm.org/D19094 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266379
2016-03-28Explicitly test BitstreamReader::setArtificialByteLimit, NFCDuncan P. N. Exon Smith1-1/+7
Explicitly check that artificial byte limit is rounded correctly by exposing BitstreamReader::Size through a new accessor, getSizeIfKnown. The original code for rounding (from r264547) wasn't obviously correct, and even though r264623 cleaned it up (by calling llvm::alignTo) I think it's worth testing. llvm-svn: 264650
2016-03-28Remove accidentally duplicated testDuncan P. N. Exon Smith1-13/+0
This was identical to setArtificialByteLimitNotWordBoundary. llvm-svn: 264646
2016-03-27Bitcode: Fix MSVC bot failure from r264549Duncan P. N. Exon Smith1-2/+3
make_unique => llvm::make_unique llvm-svn: 264553
2016-03-27BitcodeWriter: Simplify and test writing blobs, NFCDuncan P. N. Exon Smith2-0/+60
Split helper out of EmitRecordWithAbbrevImpl called emitBlob to reduce code duplication, and add a few tests for it. No functionality change intended. llvm-svn: 264550