aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
AgeCommit message (Expand)AuthorFilesLines
2016-09-09[X86][XOP] Fix VPERMIL2PD mask creation on 32-bit targetsSimon Pilgrim1-5/+5
2016-09-08Win64: Don't use REX prefix for direct tail callsHans Wennborg1-1/+0
2016-09-07Don't reduce the width of vector mul if the target doesn't support SSE2.Wei Mi1-1/+2
2016-09-07[x86] move combines of 'select of 2 constants' to its own function; NFCSanjay Patel1-92/+103
2016-09-07AVX512F: FMA intrinsic + FNEG - sequence optimizationElena Demikhovsky1-90/+102
2016-09-06[AVX-512] Fix masked VPERMI2PS isel when the index comes from a bitcast.Craig Topper1-3/+5
2016-09-06[X86] Remove unused encoding from IntrinsicType enum.Craig Topper1-3/+0
2016-09-06[X86] Fix indentation. NFCCraig Topper1-2/+2
2016-09-06[AVX-512] Fix v8i64 shift by immediate lowering on 32-bit targets.Craig Topper1-1/+2
2016-09-04revert r279960. Igor Breger1-19/+5
2016-09-03Strip trailing whitespaceSimon Pilgrim1-2/+2
2016-09-01[SelectionDAG] Generate vector_shuffle nodes for undersized result vector sizesMichael Kuperstein1-0/+57
2016-09-01Optimized FMA intrinsic + FNEG , likeElena Demikhovsky1-21/+86
2016-08-29Fix typo in comment. NFC.Michael Kuperstein1-1/+1
2016-08-29Fix -Wunused-but-set-variable warning.Haojian Wu1-4/+0
2016-08-29[AVX512] In some cases KORTEST instruction may be used instead of ZEXT + TEST...Igor Breger1-5/+19
2016-08-29[X86] Don't lower FABS/FNEG masking directly to a ConstantPool load. Just cre...Craig Topper1-9/+4
2016-08-29[AVX-512] Always use v8i64 when converting 512-bit FAND/FOR/FXOR/FANDN to int...Craig Topper1-5/+3
2016-08-28[X86][AVX512] Only combine EVEX targets shuffles to shuffles of the same numb...Simon Pilgrim1-4/+12
2016-08-28[AVX-512] Promote AND/OR/XOR to v2i64/v4i64/v8i64 even when we have AVX512F/A...Craig Topper1-12/+8
2016-08-25Revert r274613 because it breaks the test suite with AVX512Michael Kuperstein1-23/+23
2016-08-25Revert r279782 due to debug buildbot breakage.Michael Kuperstein1-27/+22
2016-08-25Revert r274613 because it breaks the test suite with AVX512Michael Kuperstein1-22/+27
2016-08-25[X86] 512-bit VPAVG requires AVX512BWMichael Kuperstein1-4/+4
2016-08-25[X86][SSE] INSERTPS is only combined on v4f32 types. NFCI.Simon Pilgrim1-2/+1
2016-08-25[X86][AVX] Provide SubVectorBroadcast fallback if load fold fails (PR29133)Simon Pilgrim1-2/+1
2016-08-24[X86][SSE] Add support for combining VZEXT_MOVL target shufflesSimon Pilgrim1-12/+31
2016-08-24[X86][AVX2] Ensure on 32-bit targets that we broadcast f64 types not i64 (PR2...Simon Pilgrim1-0/+7
2016-08-24[X86][SSE] Add support for 32-bit element vectors to X86ISD::VZEXT_LOADSimon Pilgrim1-18/+6
2016-08-22[X86][AVX] Don't use SubVectorBroadcast if there are additional users of the ...Simon Pilgrim1-4/+6
2016-08-22[X86] Only accept SM_SentinelUndef (-1) as an undefined shuffle mask in rangeSimon Pilgrim1-3/+3
2016-08-22[X86][SSE] Avoid specifying unused arguments in SHUFPD loweringSimon Pilgrim1-2/+5
2016-08-21[X86][AVX] Dropped combineShuffle256 - this can now be performed by EltsFromC...Simon Pilgrim1-82/+0
2016-08-19[X86][SSE] Generalised combining to VZEXT_MOVL to any vector sizeSimon Pilgrim1-6/+8
2016-08-19[X86][SSE] Add support for matching commuted insertps patternsSimon Pilgrim1-45/+67
2016-08-18fix typo; NFCSanjay Patel1-1/+1
2016-08-17Replace a few more "fall through" comments with LLVM_FALLTHROUGHJustin Bogner1-3/+3
2016-08-17Replace "fallthrough" comments with LLVM_FALLTHROUGHJustin Bogner1-16/+19
2016-08-16[X86][SSE] Add support for combining v2f64 target shuffles to VZEXT_MOVL byte...Simon Pilgrim1-3/+3
2016-08-16[X86][SSE] Add support for combining target shuffles to PALIGNR byte rotationsSimon Pilgrim1-22/+55
2016-08-16[X86] Add xgetbv/xsetbv intrinsics to non-windows platformsGuy Blank1-0/+54
2016-08-14[AVX512] Fix VFPCLASSSD/VFPCLASSSS intrinsic lowering. The i1 result should b...Igor Breger1-1/+1
2016-08-14[AVX512] Fix insertelement i1 lowering.Igor Breger1-6/+48
2016-08-12[x86] X86ISelLowering zext(add_nuw(x, C)) --> add(zext(x), C_zext)Artur Pilipenko1-16/+33
2016-08-12[X86][SSE] Add support for combining target shuffles to PSLLDQ/PSRLDQ byte sh...Simon Pilgrim1-1/+61
2016-08-12[X86][SSE] Fixed PALIGNR target shuffle decodeSimon Pilgrim1-0/+3
2016-08-12Use the range variant of find/find_if instead of unpacking begin/endDavid Majnemer1-3/+2
2016-08-12Use the range variant of find_if instead of unpacking begin/endDavid Majnemer1-6/+4
2016-08-11Use the range variant of find instead of unpacking begin/endDavid Majnemer1-6/+3
2016-08-11Use range algorithms instead of unpacking begin/endDavid Majnemer1-20/+15
generated by cgit v1.1 at 2025-10-17 18:35:27 +0000