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path: root/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
AgeCommit message (Expand)AuthorFilesLines
2014-09-15Fix a lot of confusion around inserting nops on empty functions.Rafael Espindola1-5/+0
2014-09-11Provide an implementation of getNoopForMachoTarget for SPARC.Brad Smith1-0/+5
2014-04-25[C++] Use 'nullptr'. Target edition.Craig Topper1-5/+5
2014-04-22[cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth1-3/+2
2014-03-02[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer1-2/+2
2014-03-01[Sparc] Add support for parsing annulled branch instructions.Venkatraman Govindaraju1-0/+4
2014-01-29[SparcV9] Use correct register class (I64RegClass) to hold the address of _G...Venkatraman Govindaraju1-2/+3
2013-11-19[weak vtables] Remove a bunch of weak vtablesJuergen Ributzka1-1/+5
2013-11-18Revert r194865 and r194874.Alexey Samsonov1-5/+1
2013-11-15[weak vtables] Remove a bunch of weak vtablesJuergen Ributzka1-1/+5
2013-10-04[Sparc] Correct the floating point conditional code mapping in GetOppositeBra...Venkatraman Govindaraju1-8/+8
2013-09-02[Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju1-18/+64
2013-06-26[Sparc]: Add memory operands for the frame references in the storeRegToStackSlotVenkatraman Govindaraju1-8/+30
2013-06-16DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie1-12/+0
2013-06-08[Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc bac...Venkatraman Govindaraju1-4/+22
2013-06-07Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling1-1/+1
2013-06-04Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju1-8/+8
2013-05-20Implement spill and fill of I64Regs.Jakob Stoklund Olesen1-2/+9
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-2/+2
2012-04-20Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper1-6/+6
2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu1-1/+1
2012-01-10Fix some leftover control reaches end of non-void function warnings.Benjamin Kramer1-0/+1
2012-01-10Remove unnecessary default cases in switches that cover all enum values.David Blaikie1-1/+0
2011-12-25Sparc: Implement emitFrameIndexDebugValue and getDebugValue Location hooks.Venkatraman Govindaraju1-0/+11
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng1-1/+1
2011-12-03Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() sinceVenkatraman Govindaraju1-1/+1
2011-08-24Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng1-1/+1
2011-07-14Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng1-11/+0
2011-07-11- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng1-4/+15
2011-07-01Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng1-2/+2
2011-06-28Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng1-1/+2
2011-06-28Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng1-1/+4
2011-01-16Implement AnalyzeBranch in Sparc Backend.Venkatraman Govindaraju1-5/+190
2010-07-16Remove the isMoveInstr() hook.Jakob Stoklund Olesen1-40/+0
2010-07-11RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen1-55/+0
2010-07-11Replace copyRegToReg with copyPhysReg for Sparc.Jakob Stoklund Olesen1-22/+14
2010-06-17Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings1-4/+3
2010-05-06Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman1-4/+2
2010-05-06Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng1-2/+4
2010-04-02use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner1-5/+5
2009-09-15several major improvements to the sparc backend: support for weak linkageChris Lattner1-0/+24
2009-07-24Remove unused member functions.Eli Friedman1-44/+0
2009-07-14llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin1-4/+4
2009-07-11assert(0) -> LLVM_UNREACHABLE.Torok Edwin1-4/+5
2009-07-01Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng1-2/+5
2009-05-13Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling1-6/+6
2009-02-18Factor out the code to add a MachineOperand to a MachineInstrBuilder.Dan Gohman1-22/+4
2009-02-13Remove non-DebugLoc versions of buildMI from Sparc.Dale Johannesen1-1/+3
2009-02-12Eliminate a couple of non-DebugLoc BuildMI variants.Dale Johannesen1-2/+4
2009-02-12Move debug loc info along when the spiller creates new instructions.Bill Wendling1-26/+45