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path: root/llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp
AgeCommit message (Expand)AuthorFilesLines
2014-10-03Eliminate some deep std::vector copies. NFC.Benjamin Kramer1-3/+2
2014-08-05Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher1-2/+1
2014-08-04Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher1-1/+3
2014-04-29[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper1-3/+3
2014-04-25[C++] Use 'nullptr'. Target edition.Craig Topper1-1/+1
2014-04-22[Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth1-1/+2
2014-03-13Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson1-8/+9
2014-01-07Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth1-2/+2
2013-12-10Use llvm_unreachable instead of assert(0)Matt Arsenault1-1/+1
2013-08-16R600: Enable folding of inline literals into REQ_SEQUENCE instructionsTom Stellard1-0/+3
2013-07-31R600: Do not mergevector after a vector reg is usedVincent Lejeune1-1/+10
2013-07-09R600: Fix wrong export reswizzlingVincent Lejeune1-4/+0
2013-06-07Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling1-1/+2
2013-06-07Vincent says the element is at most once in the vector, so we don't need a fu...Benjamin Kramer1-3/+7
2013-06-07R600: Fix a potential iterator invalidation issue.Benjamin Kramer1-5/+3
2013-06-07R600: Remove an extra break in R600OptimizeVectorRegisters.cppVincent Lejeune1-3/+1
2013-06-06R600: Rewrite an awkward loop in R600MachineSchedulerVincent Lejeune1-7/+15
2013-06-06R600OptimizeVectorRegisters.cpp: Tweak a warning. [-Wsometimes-uninitialized]NAKAMURA Takumi1-1/+1
2013-06-06R600OptimizeVectorRegisters.cpp: Suppress a warning. [-Wunused-variable]NAKAMURA Takumi1-0/+1
2013-06-06Trailing linefeed.NAKAMURA Takumi1-1/+0
2013-06-05R600: Add a pass that merge Vector RegisterVincent Lejeune1-0/+363
2013-06-05Revert "R600: Add a pass that merge Vector Register"Rafael Espindola1-363/+0
2013-06-04R600: Add a pass that merge Vector RegisterVincent Lejeune1-0/+363
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